]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arm: dts: rockchip: rk3288: partial sync vop/lvds/mipi/hdmi nodes
authorJohan Jonker <jbx6244@gmail.com>
Wed, 15 Mar 2023 18:34:01 +0000 (19:34 +0100)
committerKever Yang <kever.yang@rock-chips.com>
Fri, 21 Apr 2023 07:16:01 +0000 (15:16 +0800)
In order to better compare the Linux rk3288.dtsi
version 6.3 -rc2 with the U-Boot version partial
sync the vop/lvds/mipi/hdmi nodes.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org> # chromebook-jerry
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
arch/arm/dts/rk3288.dtsi

index 9f924466542bf7d925b81148285f2817541ed731..f24e9ba52e6c310b69d1a9adfc7317319b21bfe4 100644 (file)
 
        vopb: vop@ff930000 {
                compatible = "rockchip,rk3288-vop";
-               reg = <0xff930000 0x19c>;
+               reg = <0xff930000 0x19c>, <0xff931000 0x1000>;
                interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
                clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
                        #address-cells = <1>;
                        #size-cells = <0>;
 
-                       vopb_out_edp: endpoint@0 {
+                       vopb_out_hdmi: endpoint@0 {
                                reg = <0>;
-                               remote-endpoint = <&edp_in_vopb>;
+                               remote-endpoint = <&hdmi_in_vopb>;
                        };
 
-                       vopb_out_hdmi: endpoint@1 {
+                       vopb_out_edp: endpoint@1 {
                                reg = <1>;
-                               remote-endpoint = <&hdmi_in_vopb>;
+                               remote-endpoint = <&edp_in_vopb>;
                        };
 
-                       vopb_out_lvds: endpoint@2 {
+                       vopb_out_mipi: endpoint@2 {
                                reg = <2>;
-                               remote-endpoint = <&lvds_in_vopb>;
+                               remote-endpoint = <&mipi_in_vopb>;
                        };
 
-                       vopb_out_mipi: endpoint@3 {
+                       vopb_out_lvds: endpoint@3 {
                                reg = <3>;
-                               remote-endpoint = <&mipi_in_vopb>;
+                               remote-endpoint = <&lvds_in_vopb>;
                        };
                };
        };
 
        vopl: vop@ff940000 {
                compatible = "rockchip,rk3288-vop";
-               reg = <0xff940000 0x19c>;
+               reg = <0xff940000 0x19c>, <0xff941000 0x1000>;
                interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>;
                clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
                        #address-cells = <1>;
                        #size-cells = <0>;
 
-                       vopl_out_edp: endpoint@0 {
+                       vopl_out_hdmi: endpoint@0 {
                                reg = <0>;
-                               remote-endpoint = <&edp_in_vopl>;
+                               remote-endpoint = <&hdmi_in_vopl>;
                        };
 
-                       vopl_out_hdmi: endpoint@1 {
+                       vopl_out_edp: endpoint@1 {
                                reg = <1>;
-                               remote-endpoint = <&hdmi_in_vopl>;
+                               remote-endpoint = <&edp_in_vopl>;
                        };
 
-                       vopl_out_lvds: endpoint@2 {
+                       vopl_out_mipi: endpoint@2 {
                                reg = <2>;
-                               remote-endpoint = <&lvds_in_vopl>;
+                               remote-endpoint = <&mipi_in_vopl>;
                        };
 
-                       vopl_out_mipi: endpoint@3 {
+                       vopl_out_lvds: endpoint@3 {
                                reg = <3>;
-                               remote-endpoint = <&mipi_in_vopl>;
+                               remote-endpoint = <&lvds_in_vopl>;
                        };
                };
        };
        };
 
        mipi_dsi: mipi@ff960000 {
-               compatible = "rockchip,rk3288_mipi_dsi";
+               compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";
                reg = <0xff960000 0x4000>;
                interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&cru PCLK_MIPI_DSI0>;
-               clock-names = "pclk_mipi";
+               clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_DSI0>;
+               clock-names = "ref", "pclk";
                power-domains = <&power RK3288_PD_VIO>;
                rockchip,grf = <&grf>;
                status = "disabled";
                reg = <0xff96c000 0x4000>;
                clocks = <&cru PCLK_LVDS_PHY>;
                clock-names = "pclk_lvds";
-               pinctrl-names = "default";
+               pinctrl-names = "lcdc";
                pinctrl-0 = <&lcdc_ctl>;
                power-domains = <&power RK3288_PD_VIO>;
                rockchip,grf = <&grf>;
                #sound-dai-cells = <0>;
                rockchip,grf = <&grf>;
                interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&cru  PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>;
-               clock-names = "iahb", "isfr";
+               clocks = <&cru  PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>, <&cru SCLK_HDMI_CEC>;
+               clock-names = "iahb", "isfr", "cec";
                power-domains = <&power RK3288_PD_VIO>;
                status = "disabled";