arm: mach-omap2: am33xx: Disable EMIF_DEVOFF immediately before hw leveling

In case of RTC+DDR resume, need to restore EMIF context
before initiating hardware leveling.

Signed-off-by: Brad Griffis <bgriffis@ti.com>
[j-keerthy@ti.com Fixed the am335x build issues]
Signed-off-by: Keerthy <j-keerthy@ti.com>

diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c
index fe7b8e1e5575b76b37a8d102dc1758117b6fe7ad..5507348981b9f4ebd6992f930fd4bee4354a0816 100644 (file)
--- a/arch/arm/mach-omap2/am33xx/board.c
+++ b/arch/arm/mach-omap2/am33xx/board.c
@@ -481,9 +481,6 @@ static void rtc_only(void)
        rtc_only_prcm_init();
        sdram_init();
 
-       /* Disable EMIF_DEVOFF for normal operation and to exit self-refresh */
-       writel(0, &prm_device->emif_ctrl);
-
        /* Check EMIF4D_SDRAM_CONFIG[31:29] SDRAM_TYPE */
        /* Only perform leveling if SDRAM_TYPE = 3 (DDR3) */
        sdrc = readl(AM43XX_EMIF_BASE + AM43XX_SDRAM_CONFIG_OFFSET);

diff --git a/arch/arm/mach-omap2/am33xx/ddr.c b/arch/arm/mach-omap2/am33xx/ddr.c
index 5d947a68c3deac731fd019b4599977e3b133fe01..c70b6fe31b0d8705ec05e4f2810989cb5058c828 100644 (file)
--- a/arch/arm/mach-omap2/am33xx/ddr.c
+++ b/arch/arm/mach-omap2/am33xx/ddr.c
@@ -80,6 +80,11 @@ static void configure_mr(int nr, u32 cs)
  */
 void config_sdram_emif4d5(const struct emif_regs *regs, int nr)
 {
+#ifdef CONFIG_AM43XX
+       struct prm_device_inst *prm_device =
+                       (struct prm_device_inst *)PRM_DEVICE_INST;
+#endif
+
        writel(0xA0, &emif_reg[nr]->emif_pwr_mgmt_ctrl);
        writel(0xA0, &emif_reg[nr]->emif_pwr_mgmt_ctrl_shdw);
        writel(regs->zq_config, &emif_reg[nr]->emif_zq_config);
@@ -126,6 +131,15 @@ void config_sdram_emif4d5(const struct emif_regs *regs, int nr)
        writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl);
        writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl_shdw);
 
+#ifdef CONFIG_AM43XX
+       /*
+        * Disable EMIF_DEVOFF
+        * -> Cold Boot: This is just rewriting the default register value.
+        * -> RTC Resume: Must disable DEVOFF before leveling.
+        */
+       writel(0, &prm_device->emif_ctrl);
+#endif
+
        /* Perform hardware leveling for DDR3 */
        if (emif_sdram_type(regs->sdram_config) == EMIF_SDRAM_TYPE_DDR3) {
                writel(readl(&emif_reg[nr]->emif_ddr_ext_phy_ctrl_36) |