return 0;
}
+static int rk3328_set_schmitt(struct rockchip_pin_bank *bank,
+ int pin_num, int enable)
+{
+ struct regmap *regmap;
+ int reg;
+ u8 bit;
+ u32 data;
+
+ rk3328_calc_schmitt_reg_and_bit(bank, pin_num, ®map, ®, &bit);
+ /* enable the write to the equivalent lower bits */
+ data = BIT(bit + 16) | (enable << bit);
+
+ return regmap_write(regmap, reg, data);
+}
+
static struct rockchip_pin_bank rk3328_pin_banks[] = {
PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", 0, 0, 0, 0),
PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", 0, 0, 0, 0),
.set_mux = rk3328_set_mux,
.set_pull = rk3328_set_pull,
.set_drive = rk3328_set_drive,
- .schmitt_calc_reg = rk3328_calc_schmitt_reg_and_bit,
+ .set_schmitt = rk3328_set_schmitt,
};
static const struct udevice_id rk3328_pinctrl_ids[] = {
{
struct rockchip_pinctrl_priv *priv = bank->priv;
struct rockchip_pin_ctrl *ctrl = priv->ctrl;
- struct regmap *regmap;
- int reg, ret;
- u8 bit;
- u32 data;
debug("setting input schmitt of GPIO%d-%d to %d\n", bank->bank_num,
pin_num, enable);
- ret = ctrl->schmitt_calc_reg(bank, pin_num, ®map, ®, &bit);
- if (ret)
- return ret;
-
- /* enable the write to the equivalent lower bits */
- data = BIT(bit + 16) | (enable << bit);
+ if (!ctrl->set_schmitt)
+ return -ENOTSUPP;
- return regmap_write(regmap, reg, data);
+ return ctrl->set_schmitt(bank, pin_num, enable);
}
/* set the pin config settings for a specified pin */
static int rockchip_pinconf_set(struct rockchip_pin_bank *bank,
u32 pin, u32 param, u32 arg)
{
- struct rockchip_pinctrl_priv *priv = bank->priv;
- struct rockchip_pin_ctrl *ctrl = priv->ctrl;
int rc;
switch (param) {
break;
case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
- if (!ctrl->schmitt_calc_reg)
- return -ENOTSUPP;
-
rc = rockchip_set_schmitt(bank, pin, arg);
if (rc < 0)
return rc;
int pin_num, int pull);
int (*set_drive)(struct rockchip_pin_bank *bank,
int pin_num, int strength);
- int (*schmitt_calc_reg)(struct rockchip_pin_bank *bank,
- int pin_num, struct regmap **regmap,
- int *reg, u8 *bit);
+ int (*set_schmitt)(struct rockchip_pin_bank *bank,
+ int pin_num, int enable);
};
/**
return 0;
}
+static int rv1108_set_schmitt(struct rockchip_pin_bank *bank,
+ int pin_num, int enable)
+{
+ struct regmap *regmap;
+ int reg;
+ u8 bit;
+ u32 data;
+
+ rv1108_calc_schmitt_reg_and_bit(bank, pin_num, ®map, ®, &bit);
+ /* enable the write to the equivalent lower bits */
+ data = BIT(bit + 16) | (enable << bit);
+
+ return regmap_write(regmap, reg, data);
+}
+
static struct rockchip_pin_bank rv1108_pin_banks[] = {
PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_SOURCE_PMU,
IOMUX_SOURCE_PMU,
.set_mux = rv1108_set_mux,
.set_pull = rv1108_set_pull,
.set_drive = rv1108_set_drive,
- .schmitt_calc_reg = rv1108_calc_schmitt_reg_and_bit,
+ .set_schmitt = rv1108_set_schmitt,
};
static const struct udevice_id rv1108_pinctrl_ids[] = {