ARM: dts: stm32: add CAN support on stm32f429

commit 7355ad1950f41e755e6dc451834be3b94f82acd4 Linux upstream.

Add support for bxcan (Basic eXtended CAN controller) to STM32F429. The
chip contains two CAN peripherals, CAN1 the primary and CAN2 the secondary,
that share some of the required logic like clock and filters. This means
that the secondary CAN can't be used without the primary CAN.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/all/20230328073328.3949796-4-dario.binacchi@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>

diff --git a/arch/arm/dts/stm32f429.dtsi b/arch/arm/dts/stm32f429.dtsi
index e5b13aca40c030dcb562057b616a46ea99afae43..22225104fca85c9d0f239dd6936e289d8cbe75de 100644 (file)
--- a/arch/arm/dts/stm32f429.dtsi
+++ b/arch/arm/dts/stm32f429.dtsi
@@ -321,6 +321,35 @@
                        status = "disabled";
                };
 
+               can1: can@40006400 {
+                       compatible = "st,stm32f4-bxcan";
+                       reg = <0x40006400 0x200>;
+                       interrupts = <19>, <20>, <21>, <22>;
+                       interrupt-names = "tx", "rx0", "rx1", "sce";
+                       resets = <&rcc STM32F4_APB1_RESET(CAN1)>;
+                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>;
+                       st,can-primary;
+                       st,gcan = <&gcan>;
+                       status = "disabled";
+               };
+
+               gcan: gcan@40006600 {
+                       compatible = "st,stm32f4-gcan", "syscon";
+                       reg = <0x40006600 0x200>;
+                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>;
+               };
+
+               can2: can@40006800 {
+                       compatible = "st,stm32f4-bxcan";
+                       reg = <0x40006800 0x200>;
+                       interrupts = <63>, <64>, <65>, <66>;
+                       interrupt-names = "tx", "rx0", "rx1", "sce";
+                       resets = <&rcc STM32F4_APB1_RESET(CAN2)>;
+                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN2)>;
+                       st,gcan = <&gcan>;
+                       status = "disabled";
+               };
+
                dac: dac@40007400 {
                        compatible = "st,stm32f4-dac-core";
                        reg = <0x40007400 0x400>;