ppc/85xx: Remove CONFIG_SYS_DDR_TLB_START

Now that we dynamically determine TLB CAM entries to use we dont need
CONFIG_SYS_DDR_TLB_START anymore.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index 41e4a6e8a5d8fa077796a0502d2691955155056a..78b73695bc38843fd48f036b701ecbc679a295ca 100644 (file)
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -98,7 +98,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #define CONFIG_SYS_PCIE1_ADDR          (CONFIG_SYS_CCSRBAR+0xa000)
 
 /* DDR Setup */
-#define CONFIG_SYS_DDR_TLB_START 9
 #define CONFIG_VERY_BIG_RAM
 #define CONFIG_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE

diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index ddfe7aabdcf9977585bf178548b40f817498fbe1..15bfeefa46cb5f84022cb5cab8de73464d827f60 100644 (file)
--- a/include/configs/P1_P2_RDB.h
+++ b/include/configs/P1_P2_RDB.h
@@ -149,8 +149,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_DDR_ERR_DIS         0x00000000
 #define CONFIG_SYS_DDR_SBE             0x00FF0000
 
-#define CONFIG_SYS_DDR_TLB_START 9
-
 /*
  * Memory map
  *

diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h
index df9ab34e80fbeee799eefa6e72d793f31aea6fd7..f4509bd090a7782b9dcc77cf1120e03563d567f3 100644 (file)
--- a/include/configs/P2020DS.h
+++ b/include/configs/P2020DS.h
@@ -101,7 +101,6 @@ extern unsigned long calculate_board_ddr_clk(unsigned long dummy);
 #define CONFIG_SYS_PCIE1_ADDR          (CONFIG_SYS_CCSRBAR+0xa000)
 
 /* DDR Setup */
-#define CONFIG_SYS_DDR_TLB_START 9
 #define CONFIG_VERY_BIG_RAM
 #define CONFIG_FSL_DDR3                1
 #undef CONFIG_FSL_DDR_INTERACTIVE