riscv: ae350: dts: Add missing "u-boot, dm-spl" for SPL config

At present the AE350 SPL defconfig is using OF_PRIOR_STAGE. The
intention was to use gdb to load device tree before running U-Boot
SPL/proper from RAM. When we switch to OF_SEPARATE we will have to
use our own DT but without "u-boot,dm-spl" in several essential
nodes, SPL does not boot.

Let's add all the required "u-boot,dm-spl" for SPL config.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>

diff --git a/arch/riscv/dts/ae350-u-boot.dtsi b/arch/riscv/dts/ae350-u-boot.dtsi
new file mode 100644 (file)
index 0000000..0d4201c
--- /dev/null
+++ b/arch/riscv/dts/ae350-u-boot.dtsi
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+/ {
+       cpus {
+               u-boot,dm-spl;
+               CPU0: cpu@0 {
+                       u-boot,dm-spl;
+                       CPU0_intc: interrupt-controller {
+                               u-boot,dm-spl;
+                       };
+               };
+               CPU1: cpu@1 {
+                       u-boot,dm-spl;
+                       CPU1_intc: interrupt-controller {
+                               u-boot,dm-spl;
+                       };
+               };
+               CPU2: cpu@2 {
+                       u-boot,dm-spl;
+                       CPU2_intc: interrupt-controller {
+                               u-boot,dm-spl;
+                       };
+               };
+               CPU3: cpu@3 {
+                       u-boot,dm-spl;
+                       CPU3_intc: interrupt-controller {
+                               u-boot,dm-spl;
+                       };
+               };
+       };
+
+       memory@0 {
+               u-boot,dm-spl;
+       };
+
+       soc {
+               u-boot,dm-spl;
+
+               plic1: interrupt-controller@e6400000 {
+                       u-boot,dm-spl;
+               };
+
+               plmt0@e6000000 {
+                       u-boot,dm-spl;
+               };
+       };
+
+       serial0: serial@f0300000 {
+               u-boot,dm-spl;
+       };
+
+};

diff --git a/arch/riscv/dts/ae350_32.dts b/arch/riscv/dts/ae350_32.dts
index 70576846f2430d2ca84adefcdf48a12794327277..083f676333de1f41f7e2633a07686968d535de94 100644 (file)
--- a/arch/riscv/dts/ae350_32.dts
+++ b/arch/riscv/dts/ae350_32.dts
@@ -3,6 +3,7 @@
 /dts-v1/;
 
 #include "binman.dtsi"
+#include "ae350-u-boot.dtsi"
 
 / {
        #address-cells = <1>;

diff --git a/arch/riscv/dts/ae350_64.dts b/arch/riscv/dts/ae350_64.dts
index 564e94a1db8ecee0b3a37d17cf627a427d525afe..74cff9122d4df8e1f6fa4c03946ebc170ba12532 100644 (file)
--- a/arch/riscv/dts/ae350_64.dts
+++ b/arch/riscv/dts/ae350_64.dts
@@ -3,6 +3,7 @@
 /dts-v1/;
 
 #include "binman.dtsi"
+#include "ae350-u-boot.dtsi"
 
 / {
        #address-cells = <2>;