arm64: zynqmp: Add output-enable pins to SOMs

Now that the zynqmp pinctrl driver supports the tri-state registers, make
sure that the pins requiring output-enable are configured appropriately for
SOMs.

Without it, all tristate setting for MIOs, which are not related to SOM
itself, are using default configuration which is not correct setting.
It means SDs, USBs, ethernet, etc. are not working properly.

In past it was fixed through calling tristate configuration via bootcmd:
usb_init=mw 0xFF180208 2020
kv260_gem3=mw 0xFF18020C 0xFC0 && gpio toggle gpio@ff0a000038 && \
  gpio toggle gpio@ff0a000038

Signed-off-by: Neal Frager <neal.frager@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7ecd98b2a302c5c6628e0234482f23c38e721fd6.1693492064.git.michal.simek@amd.com

diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dts b/arch/arm/dts/zynqmp-sck-kr-g-revA.dts
index d318773bd9d60a6c078dd224e1774fb4699f534f..30a0230d476782568fd08dc937255e844fdcdc7b 100644 (file)
--- a/arch/arm/dts/zynqmp-sck-kr-g-revA.dts
+++ b/arch/arm/dts/zynqmp-sck-kr-g-revA.dts
@@ -250,6 +250,7 @@
                conf-tx {
                        pins = "MIO36";
                        bias-disable;
+                       output-enable;
                };
 
                mux {
@@ -301,6 +302,7 @@
                conf-bootstrap {
                        pins = "MIO45", "MIO47", "MIO49";
                        bias-disable;
+                       output-enable;
                        low-power-disable;
                };
 
@@ -308,6 +310,7 @@
                        pins = "MIO38", "MIO39", "MIO40",
                                "MIO41", "MIO42", "MIO43";
                        bias-disable;
+                       output-enable;
                        low-power-enable;
                };
 
@@ -316,6 +319,7 @@
                        slew-rate = <SLEW_RATE_SLOW>;
                        power-source = <IO_STANDARD_LVCMOS18>;
                        bias-disable;
+                       output-enable;
                };
 
                mux-mdio {
@@ -346,6 +350,7 @@
                        pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
                        "MIO60", "MIO61", "MIO62", "MIO63";
                        bias-disable;
+                       output-enable;
                        drive-strength = <4>;
                        slew-rate = <SLEW_RATE_SLOW>;
                };
@@ -373,6 +378,7 @@
                        pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71",
                        "MIO72", "MIO73", "MIO74", "MIO75";
                        bias-disable;
+                       output-enable;
                        drive-strength = <4>;
                        slew-rate = <SLEW_RATE_SLOW>;
                };

diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts
index 69dba0761b3752bd7e2b576199bf6a2d6fbee8d4..8f4c52d6d643264fe351109e913957f9fb9be922 100644 (file)
--- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts
+++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts
@@ -250,6 +250,7 @@
                conf-tx {
                        pins = "MIO36";
                        bias-disable;
+                       output-enable;
                };
 
                mux {
@@ -301,6 +302,7 @@
                conf-bootstrap {
                        pins = "MIO45", "MIO47", "MIO49";
                        bias-disable;
+                       output-enable;
                        low-power-disable;
                };
 
@@ -308,6 +310,7 @@
                        pins = "MIO38", "MIO39", "MIO40",
                                "MIO41", "MIO42", "MIO43";
                        bias-disable;
+                       output-enable;
                        low-power-enable;
                };
 
@@ -316,6 +319,7 @@
                        slew-rate = <SLEW_RATE_SLOW>;
                        power-source = <IO_STANDARD_LVCMOS18>;
                        bias-disable;
+                       output-enable;
                };
 
                mux-mdio {
@@ -346,6 +350,7 @@
                        pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
                        "MIO60", "MIO61", "MIO62", "MIO63";
                        bias-disable;
+                       output-enable;
                        drive-strength = <4>;
                        slew-rate = <SLEW_RATE_SLOW>;
                };
@@ -373,6 +378,7 @@
                        pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71",
                        "MIO72", "MIO73", "MIO74", "MIO75";
                        bias-disable;
+                       output-enable;
                        drive-strength = <4>;
                        slew-rate = <SLEW_RATE_SLOW>;
                };

diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts
index a81b3f6f51ad85c6b831c240f55c09de82276604..55bef1df75d000102f072640652ada68a8841e40 100644 (file)
--- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts
+++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts
@@ -205,6 +205,7 @@
                conf-tx {
                        pins = "MIO36";
                        bias-disable;
+                       output-enable;
                };
 
                mux {
@@ -256,6 +257,7 @@
                conf-bootstrap {
                        pins = "MIO71", "MIO73", "MIO75";
                        bias-disable;
+                       output-enable;
                        low-power-disable;
                };
 
@@ -263,6 +265,7 @@
                        pins = "MIO64", "MIO65", "MIO66",
                                "MIO67", "MIO68", "MIO69";
                        bias-disable;
+                       output-enable;
                        low-power-enable;
                };
 
@@ -271,6 +274,7 @@
                        slew-rate = <SLEW_RATE_SLOW>;
                        power-source = <IO_STANDARD_LVCMOS18>;
                        bias-disable;
+                       output-enable;
                };
 
                mux-mdio {
@@ -301,6 +305,7 @@
                        pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
                        "MIO60", "MIO61", "MIO62", "MIO63";
                        bias-disable;
+                       output-enable;
                        drive-strength = <4>;
                        slew-rate = <SLEW_RATE_SLOW>;
                };

diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts
index f935f25c887f3cbb8bf7d392962b037d84cff096..1b1d9e772f5564ceff47d4afe4e8350d21f3bee5 100644 (file)
--- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts
+++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts
@@ -193,6 +193,7 @@
                conf-tx {
                        pins = "MIO36";
                        bias-disable;
+                       output-enable;
                };
 
                mux {
@@ -244,6 +245,7 @@
                conf-bootstrap {
                        pins = "MIO71", "MIO73", "MIO75";
                        bias-disable;
+                       output-enable;
                        low-power-disable;
                };
 
@@ -251,6 +253,7 @@
                        pins = "MIO64", "MIO65", "MIO66",
                                "MIO67", "MIO68", "MIO69";
                        bias-disable;
+                       output-enable;
                        low-power-enable;
                };
 
@@ -259,6 +262,7 @@
                        slew-rate = <SLEW_RATE_SLOW>;
                        power-source = <IO_STANDARD_LVCMOS18>;
                        bias-disable;
+                       output-enable;
                };
 
                mux-mdio {
@@ -289,6 +293,7 @@
                        pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
                        "MIO60", "MIO61", "MIO62", "MIO63";
                        bias-disable;
+                       output-enable;
                        drive-strength = <4>;
                        slew-rate = <SLEW_RATE_SLOW>;
                };