mpc83xx: spd_sdram.c: Disable memory controller before initializing

The memory controller could already be enabled, when spd_sdram() is
called. This could be the case for example, when the SDRAM is initialized
by the JTAG debugger.

The "sync" after the register access via the accessor function is
still needed, because the macro uses the sync before the real write
is done. So until not all accesses are converted to using accessor
functions, this sync still needs to be made "manually" here.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd.eu>
Acked-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c
index 0f611804a0712e1b41db6e2b5da35b3d3d0293ee..44aaa9abc2130b9b046f06698e93493f6e4fb9bd 100644 (file)
--- a/cpu/mpc83xx/spd_sdram.c
+++ b/cpu/mpc83xx/spd_sdram.c
@@ -29,6 +29,7 @@
 
 #include <common.h>
 #include <asm/processor.h>
+#include <asm/io.h>
 #include <i2c.h>
 #include <spd.h>
 #include <asm/mmu.h>
@@ -150,6 +151,14 @@ long int spd_sdram()
        unsigned int ddrc_ecc_enable;
        unsigned int pvr = get_pvr();
 
+       /*
+        * First disable the memory controller (could be enabled
+        * by the debugger)
+        */
+       clrsetbits_be32(&ddr->sdram_cfg, SDRAM_CFG_MEM_EN, 0);
+       sync();
+       isync();
+
        /* Read SPD parameters with I2C */
        CONFIG_SYS_READ_SPD(SPD_EEPROM_ADDRESS, 0, 1, (uchar *) & spd, sizeof (spd));
 #ifdef SPD_DEBUG