MIPS: malta: add DT bindings for PCI host controller

Add DT binding for GT64120 and MSC01 PCI controllers. Only
GT64120 is enabled by default to support Qemu. The MSC01 node
will be dynamically enabled by Malta board code dependent
on the plugged core card.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

diff --git a/arch/mips/dts/mti,malta.dts b/arch/mips/dts/mti,malta.dts
index d339229c2a82175a2648085a5991018ff9dae165..ef47a340bbfa5e2a3def75c0c0f2b5dc61152684 100644 (file)
--- a/arch/mips/dts/mti,malta.dts
+++ b/arch/mips/dts/mti,malta.dts
@@ -29,4 +29,32 @@
                        u-boot,dm-pre-reloc;
                };
        };
+
+       pci0@1bd00000 {
+               compatible = "mips,pci-msc01";
+               device_type = "pci";
+               reg = <0x1bd00000 0x2000>;
+
+               #address-cells = <3>;
+               #size-cells = <2>;
+               bus-range = <0x0 0x0>;
+               ranges = <0x01000000 0 0x00000000 0x00000000 0 0x800000         /* I/O */
+                         0x02000000 0 0x10000000 0xb0000000 0 0x10000000       /* MEM */>;
+
+               status = "disabled";
+       };
+
+       pci0@1be00000 {
+               compatible = "marvell,pci-gt64120";
+               device_type = "pci";
+               reg = <0x1be00000 0x2000>;
+
+               #address-cells = <3>;
+               #size-cells = <2>;
+               bus-range = <0x0 0x0>;
+               ranges = <0x01000000 0 0x00000000 0x00000000 0 0x20000          /* I/O */
+                         0x02000000 0 0x10000000 0x10000000 0 0x8000000        /* MEM */>;
+
+               status = "okay";
+       };
 };