#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/gpio/sandbox-gpio.h>
#include <dt-bindings/pinctrl/sandbox-pinmux.h>
+#include <dt-bindings/mux/mux.h>
/ {
model = "sandbox";
interrupts-extended = <&irq 3 0>;
acpi,name = "GHIJ";
phandle-value = <&gpio_c 10>, <0xFFFFFFFF 20>, <&gpio_a 30>;
+
+ mux-controls = <&muxcontroller0 0>, <&muxcontroller0 1>,
+ <&muxcontroller0 2>, <&muxcontroller0 3>,
+ <&muxcontroller1>;
+ mux-control-names = "mux0", "mux1", "mux2", "mux3", "mux4";
+ mux-syscon = <&syscon3>;
};
junk {
compatible = "denx,u-boot-fdt-test";
ping-expect = <3>;
ping-add = <3>;
+
+ mux-controls = <&muxcontroller0 0>;
+ mux-control-names = "mux0";
};
phy_provider0: gen_phy@0 {
0x58 8>;
};
+ syscon3: syscon@3 {
+ compatible = "simple-mfd", "syscon";
+ reg = <0x000100 0x10>;
+
+ muxcontroller0: a-mux-controller {
+ compatible = "mmio-mux";
+ #mux-control-cells = <1>;
+
+ mux-reg-masks = <0x0 0x30>, /* 0: reg 0x0, bits 5:4 */
+ <0xc 0x1E>, /* 1: reg 0xc, bits 4:1 */
+ <0x4 0xFF>; /* 2: reg 0x4, bits 7:0 */
+ idle-states = <MUX_IDLE_AS_IS>, <0x02>, <0x73>;
+ u-boot,mux-autoprobe;
+ };
+ };
+
+ muxcontroller1: emul-mux-controller {
+ compatible = "mux-emul";
+ #mux-control-cells = <0>;
+ u-boot,mux-autoprobe;
+ idle-state = <0xabcd>;
+ };
+
timer@0 {
compatible = "sandbox,timer";
clock-frequency = <1000000>;
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
+ * Pratyush Yadav <p.yadav@ti.com>
+ */
+#include <common.h>
+#include <dm.h>
+#include <mux.h>
+#include <mux-internal.h>
+#include <dm/test.h>
+#include <test/ut.h>
+
+struct mux_emul_priv {
+ u32 state;
+};
+
+static int mux_emul_set(struct mux_control *mux, int state)
+{
+ struct mux_emul_priv *priv = dev_get_priv(mux->dev);
+
+ priv->state = state;
+ return 0;
+}
+
+static int mux_emul_probe(struct udevice *dev)
+{
+ struct mux_chip *mux_chip = dev_get_uclass_priv(dev);
+ struct mux_control *mux;
+ u32 idle_state;
+ int ret;
+
+ ret = mux_alloc_controllers(dev, 1);
+ if (ret < 0)
+ return ret;
+
+ mux = &mux_chip->mux[0];
+
+ ret = dev_read_u32(dev, "idle-state", &idle_state);
+ if (ret)
+ return ret;
+
+ mux->idle_state = idle_state;
+ mux->states = 0x100000;
+
+ return 0;
+}
+
+static const struct mux_control_ops mux_emul_ops = {
+ .set = mux_emul_set,
+};
+
+static const struct udevice_id mux_emul_of_match[] = {
+ { .compatible = "mux-emul" },
+ { /* sentinel */ },
+};
+
+U_BOOT_DRIVER(emul_mux) = {
+ .name = "mux-emul",
+ .id = UCLASS_MUX,
+ .of_match = mux_emul_of_match,
+ .ops = &mux_emul_ops,
+ .probe = mux_emul_probe,
+ .priv_auto_alloc_size = sizeof(struct mux_emul_priv),
+};
+
+static int dm_test_mux_emul_default_state(struct unit_test_state *uts)
+{
+ struct udevice *dev;
+ struct mux_control *mux;
+ struct mux_emul_priv *priv;
+
+ ut_assertok(uclass_get_device_by_name(UCLASS_TEST_FDT, "a-test",
+ &dev));
+ ut_assertok(mux_control_get(dev, "mux4", &mux));
+
+ priv = dev_get_priv(mux->dev);
+
+ ut_asserteq(0xabcd, priv->state);
+
+ return 0;
+}
+DM_TEST(dm_test_mux_emul_default_state, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+
+static int dm_test_mux_emul_select_deselect(struct unit_test_state *uts)
+{
+ struct udevice *dev;
+ struct mux_control *mux;
+ struct mux_emul_priv *priv;
+
+ gd->flags &= ~(GD_FLG_SILENT | GD_FLG_RECORD);
+ ut_assertok(uclass_get_device_by_name(UCLASS_TEST_FDT, "a-test",
+ &dev));
+ ut_assertok(mux_control_get(dev, "mux4", &mux));
+
+ priv = dev_get_priv(mux->dev);
+
+ ut_assertok(mux_control_select(mux, 0x1234));
+ ut_asserteq(priv->state, 0x1234);
+
+ ut_assertok(mux_control_deselect(mux));
+ ut_asserteq(priv->state, 0xabcd);
+
+ return 0;
+}
+DM_TEST(dm_test_mux_emul_select_deselect, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
+ * Jean-Jacques Hiblot <jjhiblot@ti.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <mux.h>
+#include <regmap.h>
+#include <syscon.h>
+#include <asm/test.h>
+#include <dm/test.h>
+#include <dm/device-internal.h>
+#include <test/ut.h>
+
+static int dm_test_mux_mmio_select(struct unit_test_state *uts)
+{
+ struct udevice *dev, *dev_b;
+ struct regmap *map;
+ struct mux_control *ctl0_a, *ctl0_b;
+ struct mux_control *ctl1;
+ struct mux_control *ctl_err;
+ u32 val;
+ int i;
+
+ sandbox_set_enable_memio(true);
+
+ ut_assertok(uclass_get_device_by_name(UCLASS_TEST_FDT, "a-test",
+ &dev));
+ ut_assertok(uclass_get_device_by_name(UCLASS_TEST_FDT, "b-test",
+ &dev_b));
+ map = syscon_regmap_lookup_by_phandle(dev, "mux-syscon");
+ ut_assertok_ptr(map);
+ ut_assert(map);
+
+ ut_assertok(mux_control_get(dev, "mux0", &ctl0_a));
+ ut_assertok(mux_control_get(dev, "mux1", &ctl1));
+ ut_asserteq(-ERANGE, mux_control_get(dev, "mux3", &ctl_err));
+ ut_asserteq(-ENODATA, mux_control_get(dev, "dummy", &ctl_err));
+ ut_assertok(mux_control_get(dev_b, "mux0", &ctl0_b));
+
+ for (i = 0; i < mux_control_states(ctl0_a); i++) {
+ /* Select a new state and verify the value in the regmap. */
+ ut_assertok(mux_control_select(ctl0_a, i));
+ ut_assertok(regmap_read(map, 0, &val));
+ ut_asserteq(i, (val & 0x30) >> 4);
+ /*
+ * Deselect the mux and verify that the value in the regmap
+ * reflects the idle state (fixed to MUX_IDLE_AS_IS).
+ */
+ ut_assertok(mux_control_deselect(ctl0_a));
+ ut_assertok(regmap_read(map, 0, &val));
+ ut_asserteq(i, (val & 0x30) >> 4);
+ }
+
+ for (i = 0; i < mux_control_states(ctl1); i++) {
+ /* Select a new state and verify the value in the regmap. */
+ ut_assertok(mux_control_select(ctl1, i));
+ ut_assertok(regmap_read(map, 0xc, &val));
+ ut_asserteq(i, (val & 0x1E) >> 1);
+ /*
+ * Deselect the mux and verify that the value in the regmap
+ * reflects the idle state (fixed to 2).
+ */
+ ut_assertok(mux_control_deselect(ctl1));
+ ut_assertok(regmap_read(map, 0xc, &val));
+ ut_asserteq(2, (val & 0x1E) >> 1);
+ }
+
+ /* Try unbalanced selection/deselection. */
+ ut_assertok(mux_control_select(ctl0_a, 0));
+ ut_asserteq(-EBUSY, mux_control_select(ctl0_a, 1));
+ ut_asserteq(-EBUSY, mux_control_select(ctl0_a, 0));
+ ut_assertok(mux_control_deselect(ctl0_a));
+
+ /* Try concurrent selection. */
+ ut_assertok(mux_control_select(ctl0_a, 0));
+ ut_assert(mux_control_select(ctl0_b, 0));
+ ut_assertok(mux_control_deselect(ctl0_a));
+ ut_assertok(mux_control_select(ctl0_b, 0));
+ ut_assert(mux_control_select(ctl0_a, 0));
+ ut_assertok(mux_control_deselect(ctl0_b));
+ ut_assertok(mux_control_select(ctl0_a, 0));
+ ut_assertok(mux_control_deselect(ctl0_a));
+
+ return 0;
+}
+DM_TEST(dm_test_mux_mmio_select, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+
+/* Test that managed API for mux work correctly */
+static int dm_test_devm_mux_mmio(struct unit_test_state *uts)
+{
+ struct udevice *dev, *dev_b;
+ struct mux_control *ctl0_a, *ctl0_b;
+ struct mux_control *ctl1;
+ struct mux_control *ctl_err;
+
+ sandbox_set_enable_memio(true);
+
+ ut_assertok(uclass_get_device_by_name(UCLASS_TEST_FDT, "a-test",
+ &dev));
+ ut_assertok(uclass_get_device_by_name(UCLASS_TEST_FDT, "b-test",
+ &dev_b));
+
+ ctl0_a = devm_mux_control_get(dev, "mux0");
+ ut_assertok_ptr(ctl0_a);
+ ut_assert(ctl0_a);
+ ctl1 = devm_mux_control_get(dev, "mux1");
+ ut_assertok_ptr(ctl1);
+ ut_assert(ctl1);
+ ctl_err = devm_mux_control_get(dev, "mux3");
+ ut_asserteq(-ERANGE, PTR_ERR(ctl_err));
+ ctl_err = devm_mux_control_get(dev, "dummy");
+ ut_asserteq(-ENODATA, PTR_ERR(ctl_err));
+
+ ctl0_b = devm_mux_control_get(dev_b, "mux0");
+ ut_assertok_ptr(ctl0_b);
+ ut_assert(ctl0_b);
+
+ /* Try concurrent selection. */
+ ut_assertok(mux_control_select(ctl0_a, 0));
+ ut_assert(mux_control_select(ctl0_b, 0));
+ ut_assertok(mux_control_deselect(ctl0_a));
+ ut_assertok(mux_control_select(ctl0_b, 0));
+ ut_assert(mux_control_select(ctl0_a, 0));
+ ut_assertok(mux_control_deselect(ctl0_b));
+
+ /* Remove one device and check that the mux is released. */
+ ut_assertok(mux_control_select(ctl0_a, 0));
+ ut_assert(mux_control_select(ctl0_b, 0));
+ device_remove(dev, DM_REMOVE_NORMAL);
+ ut_assertok(mux_control_select(ctl0_b, 0));
+
+ device_remove(dev_b, DM_REMOVE_NORMAL);
+ return 0;
+}
+DM_TEST(dm_test_devm_mux_mmio, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);