u-boot: Fix CPU2 errata on MPC8548CDS board

This patch apply workaround of CPU2 errata on MPC8548CDS board.

Signed-off-by:Ebony Zhu <ebony.zhu@freescale.com>

diff --git a/board/cds/mpc8548cds/mpc8548cds.c b/board/cds/mpc8548cds/mpc8548cds.c
index 7433ebf25bc7c96daa838817b07e15279d63efa2..0d3fcebfe2ac8c00517dcc3ad50ae1950348a1ed 100644 (file)
--- a/board/cds/mpc8548cds/mpc8548cds.c
+++ b/board/cds/mpc8548cds/mpc8548cds.c
@@ -51,6 +51,7 @@ int checkboard (void)
 {
        volatile immap_t *immap = (immap_t *) CFG_CCSRBAR;
        volatile ccsr_gur_t *gur = &immap->im_gur;
+       volatile ccsr_local_ecm_t *ecm = &immap->im_local_ecm;
 
        /* PCI slot in USER bits CSR[6:7] by convention. */
        uint pci_slot = get_pci_slot ();
@@ -89,6 +90,12 @@ int checkboard (void)
         */
        local_bus_init ();
 
+       /*
+        * Fix CPU2 errata: A core hang possible while executing a
+        * msync instruction and a snoopable transaction from an I/O
+        * master tagged to make quick forward progress is present.
+        */
+       ecm->eebpcr |= (1 << 16);
 
        /*
         * Hack TSEC 3 and 4 IO voltages.