]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
powerpc: dts: updates socrates board
authorHeiko Schocher <hs@denx.de>
Tue, 24 Jan 2023 17:06:52 +0000 (18:06 +0100)
committerTom Rini <trini@konsulko.com>
Mon, 6 Feb 2023 18:04:53 +0000 (13:04 -0500)
include common e500v2_power_isa.dtsi and rearrange
some nodes.

Signed-off-by: Heiko Schocher <hs@denx.de>
arch/powerpc/dts/socrates.dts

index 452cf58b5e6d35d375ba4035e2b2ed0807edb365..ea75eb6af3df351c5aa0a981a4da7c580921ce73 100644 (file)
@@ -9,6 +9,8 @@
 
 /dts-v1/;
 
+/include/ "e500v2_power_isa.dtsi"
+
 / {
        model = "abb,socrates";
        compatible = "abb,socrates";
                        phy-handle = <&phy0>;
                        tbi-handle = <&tbi0>;
                        phy-connection-type = "rgmii-id";
+               };
 
-                       mdio@520 {
-                               #address-cells = <1>;
-                               #size-cells = <0>;
-                               compatible = "fsl,gianfar-mdio";
-                               reg = <0x520 0x20>;
-
-                               phy0: ethernet-phy@0 {
-                                       interrupt-parent = <&mpic>;
-                                       interrupts = <0 1>;
-                                       reg = <0>;
-                               };
-                               phy1: ethernet-phy@1 {
-                                       interrupt-parent = <&mpic>;
-                                       interrupts = <0 1>;
-                                       reg = <1>;
-                               };
-                               tbi0: tbi-phy@11 {
-                                       reg = <0x11>;
-                               };
+               mdio@24520 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "fsl,gianfar-mdio";
+                       reg = <0x24520 0x20>;
+
+                       phy0: ethernet-phy@0 {
+                               compatible = "ethernet-phy-ieee802.3-c22";
+                               interrupt-parent = <&mpic>;
+                               interrupts = <0 1>;
+                               reg = <0>;
+                       };
+
+                       phy1: ethernet-phy@1 {
+                               compatible = "ethernet-phy-ieee802.3-c22";
+                               interrupt-parent = <&mpic>;
+                               interrupts = <0 1>;
+                               reg = <1>;
+                       };
+                       tbi0: tbi-phy@11 {
+                               reg = <0x11>;
                        };
                };
 
                        phy-handle = <&phy1>;
                        tbi-handle = <&tbi1>;
                        phy-connection-type = "rgmii-id";
+               };
 
-                       mdio@520 {
-                               #address-cells = <1>;
-                               #size-cells = <0>;
-                               compatible = "fsl,gianfar-tbi";
-                               reg = <0x520 0x20>;
+               mdio@26520 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "fsl,gianfar-tbi";
+                       reg = <0x26520 0x20>;
 
-                               tbi1: tbi-phy@11 {
-                                       reg = <0x11>;
-                               };
+                       tbi1: tbi-phy@11 {
+                               reg = <0x11>;
                        };
                };