minor DaVinci clock cleanup

Minor cleanup to clock-related defines for DaVinci DM6446 boards:

 - CONFIG_SYS_CLK_FREQ is unused; remove it.

 - CONFIG_SYS_NS16550_CLK must be the same as CONFIG_SYS_HZ_CLOCK

On DM6446 both of those peripheral clocks actually come from the
same source, the primary oscillator.  Having them use the same
symbol avoids bugs in the clone'n'modify development cycle.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h
index fae430ba6f89dc4aebe465f06179cf9d976862a0..9fe4072b4b323d97c8282705eb09a7598440921f 100644 (file)
--- a/include/configs/davinci_dvevm.h
+++ b/include/configs/davinci_dvevm.h
@@ -56,7 +56,6 @@
 /* SoC Configuration */
 /*===================*/
 #define CONFIG_ARM926EJS                       /* arm926ejs CPU core */
-#define CONFIG_SYS_CLK_FREQ    297000000       /* Arm Clock frequency */
 #define CONFIG_SYS_TIMERBASE           0x01c21400      /* use timer 0 */
 #define CONFIG_SYS_HZ_CLOCK            27000000        /* Timer Input clock freq */
 #define CONFIG_SYS_HZ                  1000
@@ -87,7 +86,7 @@
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE    -4      /* NS16550 register size, byteorder */
 #define CONFIG_SYS_NS16550_COM1        0x01c20000      /* Base address of UART0 */
-#define CONFIG_SYS_NS16550_CLK         27000000        /* Input clock to NS16550 */
+#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK     /* Input clock to NS16550 */
 #define CONFIG_CONS_INDEX      1               /* use UART0 for console */
 #define CONFIG_BAUDRATE                115200          /* Default baud rate */
 #define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }

diff --git a/include/configs/davinci_schmoogie.h b/include/configs/davinci_schmoogie.h
index 923e4777be3e101f5dd66c701d196f4c1a502377..a16ac391b3f3e2dbc20d02de2c8d1af8317e57aa 100644 (file)
--- a/include/configs/davinci_schmoogie.h
+++ b/include/configs/davinci_schmoogie.h
@@ -31,7 +31,6 @@
 /* SoC Configuration */
 /*===================*/
 #define CONFIG_ARM926EJS                       /* arm926ejs CPU core */
-#define CONFIG_SYS_CLK_FREQ    297000000       /* Arm Clock frequency */
 #define CONFIG_SYS_TIMERBASE           0x01c21400      /* use timer 0 */
 #define CONFIG_SYS_HZ_CLOCK            27000000        /* Timer Input clock freq */
 #define CONFIG_SYS_HZ                  1000
@@ -54,7 +53,7 @@
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE    -4      /* NS16550 register size, byteorder */
 #define CONFIG_SYS_NS16550_COM1        0x01c20000      /* Base address of UART0 */
-#define CONFIG_SYS_NS16550_CLK         27000000        /* Input clock to NS16550 */
+#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK     /* Input clock to NS16550 */
 #define CONFIG_CONS_INDEX      1               /* use UART0 for console */
 #define CONFIG_BAUDRATE                115200          /* Default baud rate */
 #define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }

diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h
index 73a59db8713e7414d57a73865f2db4e295755b74..c2ebd97dba19df64e1cc10b7d2eb8112e0901369 100644 (file)
--- a/include/configs/davinci_sffsdr.h
+++ b/include/configs/davinci_sffsdr.h
@@ -32,7 +32,6 @@
                                 * powering ON the DSP. */
 /* SoC Configuration */
 #define CONFIG_ARM926EJS                       /* arm926ejs CPU core */
-#define CONFIG_SYS_CLK_FREQ    297000000       /* Arm Clock frequency */
 #define CONFIG_SYS_TIMERBASE           0x01c21400      /* use timer 0 */
 #define CONFIG_SYS_HZ_CLOCK            27000000        /* Timer Input clock freq */
 #define CONFIG_SYS_HZ                  1000
@@ -56,7 +55,7 @@
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE    -4      /* NS16550 register size, byteorder */
 #define CONFIG_SYS_NS16550_COM1        0x01c20000      /* Base address of UART0 */
-#define CONFIG_SYS_NS16550_CLK         27000000        /* Input clock to NS16550 */
+#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK     /* Input clock to NS16550 */
 #define CONFIG_CONS_INDEX      1               /* use UART0 for console */
 #define CONFIG_BAUDRATE                115200          /* Default baud rate */
 #define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }

diff --git a/include/configs/davinci_sonata.h b/include/configs/davinci_sonata.h
index 70d2c7d0c5eda6cc748fac3c3f5b31bfd0c2152c..0fc6012bace713f41a744cae573659698b614fa8 100644 (file)
--- a/include/configs/davinci_sonata.h
+++ b/include/configs/davinci_sonata.h
@@ -56,7 +56,6 @@
 /* SoC Configuration */
 /*===================*/
 #define CONFIG_ARM926EJS                       /* arm926ejs CPU core */
-#define CONFIG_SYS_CLK_FREQ    297000000       /* Arm Clock frequency */
 #define CONFIG_SYS_TIMERBASE           0x01c21400      /* use timer 0 */
 #define CONFIG_SYS_HZ_CLOCK            27000000        /* Timer Input clock freq */
 #define CONFIG_SYS_HZ                  1000
@@ -87,7 +86,7 @@
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE    -4      /* NS16550 register size, byteorder */
 #define CONFIG_SYS_NS16550_COM1        0x01c20000      /* Base address of UART0 */
-#define CONFIG_SYS_NS16550_CLK         27000000        /* Input clock to NS16550 */
+#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK     /* Input clock to NS16550 */
 #define CONFIG_CONS_INDEX      1               /* use UART0 for console */
 #define CONFIG_BAUDRATE                115200          /* Default baud rate */
 #define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }