]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
ARM: dts: rmobile: Synchronize DTs with Linux 6.1.7
authorMarek Vasut <marek.vasut+renesas@mailbox.org>
Thu, 26 Jan 2023 20:01:32 +0000 (21:01 +0100)
committerMarek Vasut <marek.vasut+renesas@gmail.com>
Thu, 2 Feb 2023 00:49:19 +0000 (01:49 +0100)
Synchronize R-Car device trees with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .

The following script has been used for the synchronization:

$ for i in $(cd arch/arm/dts/ ; ls -1 r8a* | grep -v 'u-boot.dts' ; sed -n '/#include/ s@.*"\(.*\)"@\1@p' $(ls -1 r8a* | grep -v 'u-boot.dts')) ; do
if [ -e /linux-2.6/arch/arm64/boot/dts/renesas/$i ] ; then
cp /linux-2.6/arch/arm64/boot/dts/renesas/$i arch/arm/dts/ ;
elif [ -e /linux-2.6/arch/arm/boot/dts/$i ] ; then
cp /linux-2.6/arch/arm/boot/dts/$i arch/arm/dts/
else
echo "NOT FOUND: $i"
fi
done
$ git add $( ( cd arch/arm/dts/ ; ls -1 r8a* | grep -v 'u-boot.dts' ; sed -n '/#include/ s@.*"\(.*\)"@\1@p' $(ls -1 r8a* | grep -v 'u-boot.dts')) | tr " " "\n" | sed 's@^@arch/arm/dts/@g' )

Move the include/dt-bindings/{clk,clock}/versaclock.h header used by
the renesas boards to match Linux 6.1.y as well.

Keep arch/arm/dts/r8a774c0-u-boot.dtsi sdhi3 node as it is now used
by the arch/arm/dts/r8a774c0-cat874.dts board.

Pick s@spi-flash@flash@ change in arch/arm/dts/r8a779a0-falcon-u-boot.dts
from "ARM: dts: Synchronize R-Car V3U DTs with Linux 5.18.3" .

Adjust R8A77990 Ebisu CONFIG_SYS_MMC_ENV_DEV from 2 to 0 to reflect
the card enumeration in ebisu.dtsi /aliases DT node .

Adjust R8A7795 and R8A7796 ULCB CONFIG_SYS_MMC_ENV_DEV from 1 to 0 to
reflect the card enumeration in ulcb.dtsi /aliases DT node .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com> # r8a779a0-falcon-u-boot.dts
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> # r8a779a0-falcon-u-boot.dts
62 files changed:
arch/arm/dts/beacon-renesom-baseboard.dtsi
arch/arm/dts/beacon-renesom-som.dtsi
arch/arm/dts/cat875.dtsi
arch/arm/dts/condor-common.dtsi [new file with mode: 0644]
arch/arm/dts/draak.dtsi [new file with mode: 0644]
arch/arm/dts/ebisu.dtsi [new file with mode: 0644]
arch/arm/dts/hihope-rev4.dtsi
arch/arm/dts/hihope-rzg2-ex.dtsi
arch/arm/dts/r8a774a1-beacon-rzg2m-kit.dts
arch/arm/dts/r8a774a1-hihope-rzg2m-ex.dts
arch/arm/dts/r8a774a1-hihope-rzg2m.dts
arch/arm/dts/r8a774a1.dtsi
arch/arm/dts/r8a774b1-beacon-rzg2n-kit.dts
arch/arm/dts/r8a774b1.dtsi
arch/arm/dts/r8a774c0-cat874.dts
arch/arm/dts/r8a774c0-ek874.dts
arch/arm/dts/r8a774c0-u-boot.dtsi
arch/arm/dts/r8a774c0.dtsi
arch/arm/dts/r8a774e1-beacon-rzg2h-kit.dts
arch/arm/dts/r8a774e1.dtsi
arch/arm/dts/r8a7790-lager.dts
arch/arm/dts/r8a7790-stout.dts
arch/arm/dts/r8a7790.dtsi
arch/arm/dts/r8a7791-koelsch.dts
arch/arm/dts/r8a7791-porter.dts
arch/arm/dts/r8a7791.dtsi
arch/arm/dts/r8a7792-blanche.dts
arch/arm/dts/r8a7792.dtsi
arch/arm/dts/r8a7793-gose.dts
arch/arm/dts/r8a7793.dtsi
arch/arm/dts/r8a7794-alt.dts
arch/arm/dts/r8a7794-silk.dts
arch/arm/dts/r8a7794.dtsi
arch/arm/dts/r8a77950-salvator-x.dts
arch/arm/dts/r8a77950-ulcb.dts
arch/arm/dts/r8a77950.dtsi
arch/arm/dts/r8a77951.dtsi
arch/arm/dts/r8a77960-salvator-x.dts
arch/arm/dts/r8a77960-ulcb.dts
arch/arm/dts/r8a77960.dtsi
arch/arm/dts/r8a77965-salvator-x.dts
arch/arm/dts/r8a77965-ulcb.dts
arch/arm/dts/r8a77965.dtsi
arch/arm/dts/r8a77970-eagle.dts
arch/arm/dts/r8a77970.dtsi
arch/arm/dts/r8a77980-condor.dts
arch/arm/dts/r8a77980.dtsi
arch/arm/dts/r8a77990-ebisu.dts
arch/arm/dts/r8a77990.dtsi
arch/arm/dts/r8a77995-draak.dts
arch/arm/dts/r8a77995.dtsi
arch/arm/dts/r8a779a0-falcon-cpu.dtsi
arch/arm/dts/r8a779a0-falcon-csi-dsi.dtsi [new file with mode: 0644]
arch/arm/dts/r8a779a0-falcon-ethernet.dtsi [new file with mode: 0644]
arch/arm/dts/r8a779a0-falcon-u-boot.dts
arch/arm/dts/r8a779a0-falcon.dts
arch/arm/dts/r8a779a0.dtsi
arch/arm/dts/ulcb.dtsi
configs/r8a77990_ebisu_defconfig
configs/rcar3_ulcb_defconfig
drivers/clk/clk_versaclock.c
include/dt-bindings/clock/versaclock.h [moved from include/dt-bindings/clk/versaclock.h with 100% similarity]

index 2692cc64bff61e61161ec680bb2b65bb52c60309..8166e3c1ff4e58f6c6c3e4c83f3fd6ca7bbc2ea8 100644 (file)
@@ -5,7 +5,7 @@
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
-#include <dt-bindings/clk/versaclock.h>
+#include <dt-bindings/clock/versaclock.h>
 
 / {
        backlight_lvds: backlight-lvds {
                };
        };
 
-       reg_audio: regulator_audio {
+       reg_audio: regulator-audio {
                compatible = "regulator-fixed";
                regulator-name = "audio-1.8V";
                regulator-min-microvolt = <1800000>;
                vin-supply = <&reg_lcd>;
        };
 
-       reg_cam0: regulator_camera {
+       reg_cam0: regulator-cam0 {
                compatible = "regulator-fixed";
                regulator-name = "reg_cam0";
                regulator-min-microvolt = <1800000>;
                enable-active-high;
        };
 
-       reg_cam1: regulator_camera {
+       reg_cam1: regulator-cam1 {
                compatible = "regulator-fixed";
                regulator-name = "reg_cam1";
                regulator-min-microvolt = <1800000>;
        status = "okay";
 };
 
-&du_out_rgb {
-       remote-endpoint = <&rgb_panel>;
+&du {
+       ports {
+               port@0 {
+                       du_out_rgb: endpoint {
+                               remote-endpoint = <&rgb_panel>;
+                       };
+               };
+       };
 };
 
 &ehci0 {
                clocks = <&x304_clk>;
                clock-names = "xin";
 
-               assigned-clocks = <&versaclock6_bb 1>,
-                                  <&versaclock6_bb 2>,
-                                  <&versaclock6_bb 3>,
-                                  <&versaclock6_bb 4>;
-               assigned-clock-rates =  <24000000>, <24000000>, <24000000>, <24576000>;
+               assigned-clocks = <&versaclock6_bb 1>, <&versaclock6_bb 2>,
+                                 <&versaclock6_bb 3>, <&versaclock6_bb 4>;
+               assigned-clock-rates = <24000000>, <24000000>, <24000000>,
+                                      <24576000>;
 
                OUT1 {
                        idt,mode = <VC5_CMOS>;
index 0d136809eb969afbd13ad8526c87957881a010c1..d3fc8ffd5b4c1a2e53cf0f07452eae09ff519a76 100644 (file)
@@ -4,7 +4,7 @@
  */
 
 #include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/clk/versaclock.h>
+#include <dt-bindings/clock/versaclock.h>
 
 / {
        memory@48000000 {
@@ -20,7 +20,7 @@
                clock-output-names = "osc_32k";
        };
 
-       reg_1p8v: regulator0 {
+       reg_1p8v: regulator-1p8v {
                compatible = "regulator-fixed";
                regulator-name = "fixed-1.8V";
                regulator-min-microvolt = <1800000>;
@@ -29,7 +29,7 @@
                regulator-always-on;
        };
 
-       reg_3p3v: regulator1 {
+       reg_3p3v: regulator-3p3v {
                compatible = "regulator-fixed";
                regulator-name = "fixed-3.3V";
                regulator-min-microvolt = <3300000>;
@@ -77,7 +77,7 @@
 };
 
 &gpio6 {
-       usb_hub_reset {
+       usb-hub-reset-hog {
                gpio-hog;
                gpios = <10 GPIO_ACTIVE_HIGH>;
                output-high;
        vqmmc-supply = <&reg_1p8v>;
        non-removable;
        cap-power-off-card;
-       pm-ignore-notify;
        keep-power-in-suspend;
        mmc-pwrseq = <&wlan_pwrseq>;
        status = "okay";
index 4a2f6fa95534471a1671f18116daa5f2ee8e33c0..8c9da8b4bd60bf325ebcd02e70904701e0f97428 100644 (file)
@@ -2,7 +2,7 @@
 /*
  * Device Tree Source for the Silicon Linux sub board for CAT874 (CAT875)
  *
- * Copyright (C) 2021 Renesas Electronics Corp.
+ * Copyright (C) 2019 Renesas Electronics Corp.
  */
 
 / {
        pinctrl-names = "default";
        renesas,no-ether-link;
        phy-handle = <&phy0>;
+       phy-mode = "rgmii-id";
        status = "okay";
 
        phy0: ethernet-phy@0 {
+               compatible = "ethernet-phy-id001c.c915",
+                            "ethernet-phy-ieee802.3-c22";
                reg = <0>;
                interrupt-parent = <&gpio2>;
                interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
diff --git a/arch/arm/dts/condor-common.dtsi b/arch/arm/dts/condor-common.dtsi
new file mode 100644 (file)
index 0000000..dfbe35b
--- /dev/null
@@ -0,0 +1,548 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the Condor board with R-Car V3H
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ * Copyright (C) 2018 Cogent Embedded, Inc.
+ */
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+       aliases {
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               i2c2 = &i2c2;
+               i2c3 = &i2c3;
+               i2c4 = &i2c4;
+               i2c5 = &i2c5;
+               serial0 = &scif0;
+               ethernet0 = &gether;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       d1_8v: regulator-2 {
+               compatible = "regulator-fixed";
+               regulator-name = "D1.8V";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       d3_3v: regulator-0 {
+               compatible = "regulator-fixed";
+               regulator-name = "D3.3V";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       hdmi-out {
+               compatible = "hdmi-connector";
+               type = "a";
+
+               port {
+                       hdmi_con: endpoint {
+                               remote-endpoint = <&adv7511_out>;
+                       };
+               };
+       };
+
+       lvds-decoder {
+               compatible = "thine,thc63lvd1024";
+               vcc-supply = <&d3_3v>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                               thc63lvd1024_in: endpoint {
+                                       remote-endpoint = <&lvds0_out>;
+                               };
+                       };
+
+                       port@2 {
+                               reg = <2>;
+                               thc63lvd1024_out: endpoint {
+                                       remote-endpoint = <&adv7511_in>;
+                               };
+                       };
+               };
+       };
+
+       memory@48000000 {
+               device_type = "memory";
+               /* first 128MB is reserved for secure area. */
+               reg = <0 0x48000000 0 0x78000000>;
+       };
+
+       vddq_vin01: regulator-1 {
+               compatible = "regulator-fixed";
+               regulator-name = "VDDQ_VIN01";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       x1_clk: x1-clock {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <148500000>;
+       };
+};
+
+&canfd {
+       pinctrl-0 = <&canfd0_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+
+       channel0 {
+               status = "okay";
+       };
+};
+
+&csi40 {
+       status = "okay";
+
+       ports {
+               port@0 {
+                       csi40_in: endpoint {
+                               clock-lanes = <0>;
+                               data-lanes = <1 2 3 4>;
+                               remote-endpoint = <&max9286_out0>;
+                       };
+               };
+       };
+};
+
+&csi41 {
+       status = "okay";
+
+       ports {
+               port@0 {
+                       csi41_in: endpoint {
+                               clock-lanes = <0>;
+                               data-lanes = <1 2 3 4>;
+                               remote-endpoint = <&max9286_out1>;
+                       };
+               };
+       };
+};
+
+&du {
+       clocks = <&cpg CPG_MOD 724>,
+                <&x1_clk>;
+       clock-names = "du.0", "dclkin.0";
+       status = "okay";
+};
+
+&extal_clk {
+       clock-frequency = <16666666>;
+};
+
+&extalr_clk {
+       clock-frequency = <32768>;
+};
+
+&gether {
+       pinctrl-0 = <&gether_pins>;
+       pinctrl-names = "default";
+
+       phy-mode = "rgmii-id";
+       phy-handle = <&phy0>;
+       renesas,no-ether-link;
+       status = "okay";
+
+       phy0: ethernet-phy@0 {
+               compatible = "ethernet-phy-id0022.1622",
+                            "ethernet-phy-ieee802.3-c22";
+               rxc-skew-ps = <1500>;
+               reg = <0>;
+               interrupt-parent = <&gpio4>;
+               interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
+               reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
+       };
+};
+
+&i2c0 {
+       pinctrl-0 = <&i2c0_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+       clock-frequency = <400000>;
+
+       io_expander0: gpio@20 {
+               compatible = "onnn,pca9654";
+               reg = <0x20>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       io_expander1: gpio@21 {
+               compatible = "onnn,pca9654";
+               reg = <0x21>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       hdmi@39 {
+               compatible = "adi,adv7511w";
+               reg = <0x39>;
+               interrupt-parent = <&gpio1>;
+               interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
+               avdd-supply = <&d1_8v>;
+               dvdd-supply = <&d1_8v>;
+               pvdd-supply = <&d1_8v>;
+               bgvdd-supply = <&d1_8v>;
+               dvdd-3v-supply = <&d3_3v>;
+
+               adi,input-depth = <8>;
+               adi,input-colorspace = "rgb";
+               adi,input-clock = "1x";
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                               adv7511_in: endpoint {
+                                       remote-endpoint = <&thc63lvd1024_out>;
+                               };
+                       };
+
+                       port@1 {
+                               reg = <1>;
+                               adv7511_out: endpoint {
+                                       remote-endpoint = <&hdmi_con>;
+                               };
+                       };
+               };
+       };
+};
+
+&i2c1 {
+       pinctrl-0 = <&i2c1_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+       clock-frequency = <400000>;
+
+       gmsl0: gmsl-deserializer@48 {
+               compatible = "maxim,max9286";
+               reg = <0x48>;
+
+               maxim,gpio-poc = <0 GPIO_ACTIVE_LOW>;
+               enable-gpios = <&io_expander0 0 GPIO_ACTIVE_HIGH>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                       };
+
+                       port@1 {
+                               reg = <1>;
+                       };
+
+                       port@2 {
+                               reg = <2>;
+                       };
+
+                       port@3 {
+                               reg = <3>;
+                       };
+
+                       port@4 {
+                               reg = <4>;
+                               max9286_out0: endpoint {
+                                       clock-lanes = <0>;
+                                       data-lanes = <1 2 3 4>;
+                                       remote-endpoint = <&csi40_in>;
+                               };
+                       };
+               };
+
+               i2c-mux {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       i2c@0 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               reg = <0>;
+
+                               status = "disabled";
+                       };
+
+                       i2c@1 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               reg = <1>;
+
+                               status = "disabled";
+                       };
+
+                       i2c@2 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               reg = <2>;
+
+                               status = "disabled";
+                       };
+
+                       i2c@3 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               reg = <3>;
+
+                               status = "disabled";
+                       };
+               };
+       };
+
+       gmsl1: gmsl-deserializer@4a {
+               compatible = "maxim,max9286";
+               reg = <0x4a>;
+
+               maxim,gpio-poc = <0 GPIO_ACTIVE_LOW>;
+               enable-gpios = <&io_expander1 0 GPIO_ACTIVE_HIGH>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                       };
+
+                       port@1 {
+                               reg = <1>;
+                       };
+
+                       port@2 {
+                               reg = <2>;
+                       };
+
+                       port@3 {
+                               reg = <3>;
+                       };
+
+                       port@4 {
+                               reg = <4>;
+                               max9286_out1: endpoint {
+                                       clock-lanes = <0>;
+                                       data-lanes = <1 2 3 4>;
+                                       remote-endpoint = <&csi41_in>;
+                               };
+                       };
+               };
+
+               i2c-mux {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       i2c@0 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               reg = <0>;
+
+                               status = "disabled";
+                       };
+
+                       i2c@1 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               reg = <1>;
+
+                               status = "disabled";
+                       };
+
+                       i2c@2 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               reg = <2>;
+
+                               status = "disabled";
+                       };
+
+                       i2c@3 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               reg = <3>;
+
+                               status = "disabled";
+                       };
+               };
+       };
+};
+
+&lvds0 {
+       status = "okay";
+
+       ports {
+               port@1 {
+                       lvds0_out: endpoint {
+                               remote-endpoint = <&thc63lvd1024_in>;
+                       };
+               };
+       };
+};
+
+&mmc0 {
+       pinctrl-0 = <&mmc_pins>;
+       pinctrl-1 = <&mmc_pins>;
+       pinctrl-names = "default", "state_uhs";
+
+       vmmc-supply = <&d3_3v>;
+       vqmmc-supply = <&vddq_vin01>;
+       mmc-hs200-1_8v;
+       bus-width = <8>;
+       no-sd;
+       no-sdio;
+       non-removable;
+       status = "okay";
+};
+
+&pciec {
+       status = "okay";
+};
+
+&pcie_bus_clk {
+       clock-frequency = <100000000>;
+};
+
+&pcie_phy {
+       status = "okay";
+};
+
+&pfc {
+       canfd0_pins: canfd0 {
+               groups = "canfd0_data_a";
+               function = "canfd0";
+       };
+
+       gether_pins: gether {
+               groups = "gether_mdio_a", "gether_rgmii",
+                        "gether_txcrefclk", "gether_txcrefclk_mega";
+               function = "gether";
+       };
+
+       i2c0_pins: i2c0 {
+               groups = "i2c0";
+               function = "i2c0";
+       };
+
+       i2c1_pins: i2c1 {
+               groups = "i2c1";
+               function = "i2c1";
+       };
+
+       mmc_pins: mmc {
+               groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
+               function = "mmc";
+               power-source = <1800>;
+       };
+
+       qspi0_pins: qspi0 {
+               groups = "qspi0_ctrl", "qspi0_data4";
+               function = "qspi0";
+       };
+
+       scif0_pins: scif0 {
+               groups = "scif0_data";
+               function = "scif0";
+       };
+
+       scif_clk_pins: scif_clk {
+               groups = "scif_clk_b";
+               function = "scif_clk";
+       };
+};
+
+&rpc {
+       pinctrl-0 = <&qspi0_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+
+       flash@0 {
+               compatible = "spansion,s25fs512s", "jedec,spi-nor";
+               reg = <0>;
+               spi-max-frequency = <50000000>;
+               spi-rx-bus-width = <4>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       bootparam@0 {
+                               reg = <0x00000000 0x040000>;
+                               read-only;
+                       };
+                       cr7@40000 {
+                               reg = <0x00040000 0x080000>;
+                               read-only;
+                       };
+                       cert_header_sa3@c0000 {
+                               reg = <0x000c0000 0x080000>;
+                               read-only;
+                       };
+                       bl2@140000 {
+                               reg = <0x00140000 0x040000>;
+                               read-only;
+                       };
+                       cert_header_sa6@180000 {
+                               reg = <0x00180000 0x040000>;
+                               read-only;
+                       };
+                       bl31@1c0000 {
+                               reg = <0x001c0000 0x460000>;
+                               read-only;
+                       };
+                       uboot@640000 {
+                               reg = <0x00640000 0x0c0000>;
+                               read-only;
+                       };
+                       uboot-env@700000 {
+                               reg = <0x00700000 0x040000>;
+                               read-only;
+                       };
+                       dtb@740000 {
+                               reg = <0x00740000 0x080000>;
+                       };
+                       kernel@7c0000 {
+                               reg = <0x007c0000 0x1400000>;
+                       };
+                       user@1bc0000 {
+                               reg = <0x01bc0000 0x2440000>;
+                       };
+               };
+       };
+};
+
+&rwdt {
+       timeout-sec = <60>;
+       status = "okay";
+};
+
+&scif0 {
+       pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+};
+
+&scif_clk {
+       clock-frequency = <14745600>;
+};
diff --git a/arch/arm/dts/draak.dtsi b/arch/arm/dts/draak.dtsi
new file mode 100644 (file)
index 0000000..ef3bb83
--- /dev/null
@@ -0,0 +1,744 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the Draak board
+ *
+ * Copyright (C) 2016-2018 Renesas Electronics Corp.
+ * Copyright (C) 2017 Glider bvba
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "Renesas Draak board";
+       compatible = "renesas,draak";
+
+       aliases {
+               serial0 = &scif2;
+               ethernet0 = &avb;
+       };
+
+       audio_clkout: audio-clkout {
+               /*
+                * This is same as <&rcar_sound 0>
+                * but needed to avoid cs2000/rcar_sound probe dead-lock
+                */
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <12288000>;
+       };
+
+       backlight: backlight {
+               compatible = "pwm-backlight";
+               pwms = <&pwm1 0 50000>;
+
+               brightness-levels = <512 511 505 494 473 440 392 327 241 133 0>;
+               default-brightness-level = <10>;
+
+               power-supply = <&reg_12p0v>;
+               enable-gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
+       };
+
+       chosen {
+               bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
+               stdout-path = "serial0:115200n8";
+       };
+
+       composite-in {
+               compatible = "composite-video-connector";
+
+               port {
+                       composite_con_in: endpoint {
+                               remote-endpoint = <&adv7180_in>;
+                       };
+               };
+       };
+
+       hdmi-in {
+               compatible = "hdmi-connector";
+               type = "a";
+
+               port {
+                       hdmi_con_in: endpoint {
+                               remote-endpoint = <&adv7612_in>;
+                       };
+               };
+       };
+
+       hdmi-out {
+               compatible = "hdmi-connector";
+               type = "a";
+
+               port {
+                       hdmi_con_out: endpoint {
+                               remote-endpoint = <&adv7511_out>;
+                       };
+               };
+       };
+
+       keys {
+               compatible = "gpio-keys";
+
+               pinctrl-0 = <&keys_pins>;
+               pinctrl-names = "default";
+
+               key-1 {
+                       gpios = <&gpio4 12 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_1>;
+                       label = "SW56-1";
+                       wakeup-source;
+                       debounce-interval = <20>;
+               };
+               key-2 {
+                       gpios = <&gpio4 13 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_2>;
+                       label = "SW56-2";
+                       wakeup-source;
+                       debounce-interval = <20>;
+               };
+               key-3 {
+                       gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_3>;
+                       label = "SW56-3";
+                       wakeup-source;
+                       debounce-interval = <20>;
+               };
+               key-4 {
+                       gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_4>;
+                       label = "SW56-4";
+                       wakeup-source;
+                       debounce-interval = <20>;
+               };
+       };
+
+       lvds-decoder {
+               compatible = "thine,thc63lvd1024";
+               vcc-supply = <&reg_3p3v>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                               thc63lvd1024_in: endpoint {
+                                       remote-endpoint = <&lvds0_out>;
+                               };
+                       };
+
+                       port@2 {
+                               reg = <2>;
+                               thc63lvd1024_out: endpoint {
+                                       remote-endpoint = <&adv7511_in>;
+                               };
+                       };
+               };
+       };
+
+       memory@48000000 {
+               device_type = "memory";
+               /* first 128MB is reserved for secure area. */
+               reg = <0x0 0x48000000 0x0 0x18000000>;
+       };
+
+       reg_1p8v: regulator-1p8v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-1.8V";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       reg_3p3v: regulator-3p3v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-3.3V";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       reg_12p0v: regulator-12p0v {
+               compatible = "regulator-fixed";
+               regulator-name = "D12.0V";
+               regulator-min-microvolt = <12000000>;
+               regulator-max-microvolt = <12000000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       sound_card: sound {
+               compatible = "audio-graph-card";
+
+               dais = <&rsnd_port0     /* ak4613 */
+                       /* HDMI is not yet supported */
+               >;
+       };
+
+       vga {
+               compatible = "vga-connector";
+
+               port {
+                       vga_in: endpoint {
+                               remote-endpoint = <&adv7123_out>;
+                       };
+               };
+       };
+
+       vga-encoder {
+               compatible = "adi,adv7123";
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                               adv7123_in: endpoint {
+                                       remote-endpoint = <&du_out_rgb>;
+                               };
+                       };
+                       port@1 {
+                               reg = <1>;
+                               adv7123_out: endpoint {
+                                       remote-endpoint = <&vga_in>;
+                               };
+                       };
+               };
+       };
+
+       x12_clk: x12 {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <74250000>;
+       };
+
+       x19_clk: x19 {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <24576000>;
+       };
+};
+
+&audio_clk_b {
+       /*
+        * X11 is connected to VI4_FIELD/SCIF_CLK/AUDIO_CLKB,
+        * and R-Car Sound uses AUDIO_CLKB.
+        * Note is that schematic indicates VI4_FIELD conection only
+        * not AUDIO_CLKB at SoC page.
+        * And this VI4_FIELD/SCIF_CLK/AUDIO_CLKB is connected to SW60.
+        * SW60 should be 1-2.
+        */
+
+       clock-frequency = <22579200>;
+};
+
+&avb {
+       pinctrl-0 = <&avb0_pins>;
+       pinctrl-names = "default";
+       renesas,no-ether-link;
+       phy-handle = <&phy0>;
+       status = "okay";
+
+       phy0: ethernet-phy@0 {
+               compatible = "ethernet-phy-id0022.1622",
+                            "ethernet-phy-ieee802.3-c22";
+               rxc-skew-ps = <1500>;
+               reg = <0>;
+               interrupt-parent = <&gpio5>;
+               interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
+               reset-gpios = <&gpio5 18 GPIO_ACTIVE_LOW>;
+               /*
+                * TX clock internal delay mode is required for reliable
+                * 1Gbps communication using the KSZ9031RNX phy present on
+                * the Draak board, however, TX clock internal delay mode
+                * isn't supported on R-Car D3(e).  Thus, limit speed to
+                * 100Mbps for reliable communication.
+                */
+               max-speed = <100>;
+       };
+};
+
+&can0 {
+       pinctrl-0 = <&can0_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+};
+
+&can1 {
+       pinctrl-0 = <&can1_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+};
+
+&du {
+       pinctrl-0 = <&du_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+
+       clocks = <&cpg CPG_MOD 724>,
+                <&cpg CPG_MOD 723>,
+                <&x12_clk>;
+       clock-names = "du.0", "du.1", "dclkin.0";
+
+       ports {
+               port@0 {
+                       du_out_rgb: endpoint {
+                               remote-endpoint = <&adv7123_in>;
+                       };
+               };
+       };
+};
+
+&ehci0 {
+       dr_mode = "host";
+       status = "okay";
+};
+
+&extal_clk {
+       clock-frequency = <48000000>;
+};
+
+&hsusb {
+       dr_mode = "host";
+       status = "okay";
+};
+
+&i2c0 {
+       pinctrl-0 = <&i2c0_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+
+       ak4613: codec@10 {
+               compatible = "asahi-kasei,ak4613";
+               #sound-dai-cells = <0>;
+               reg = <0x10>;
+               clocks = <&rcar_sound 0>; /* audio_clkout */
+
+               asahi-kasei,in1-single-end;
+               asahi-kasei,in2-single-end;
+               asahi-kasei,out1-single-end;
+               asahi-kasei,out2-single-end;
+               asahi-kasei,out3-single-end;
+               asahi-kasei,out4-single-end;
+               asahi-kasei,out5-single-end;
+               asahi-kasei,out6-single-end;
+
+               port {
+                       ak4613_endpoint: endpoint {
+                               remote-endpoint = <&rsnd_for_ak4613>;
+                       };
+               };
+       };
+
+       composite-in@20 {
+               compatible = "adi,adv7180cp";
+               reg = <0x20>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                               adv7180_in: endpoint {
+                                       remote-endpoint = <&composite_con_in>;
+                               };
+                       };
+
+                       port@3 {
+                               reg = <3>;
+
+                               /*
+                                * The VIN4 video input path is shared between
+                                * CVBS and HDMI inputs through SW[49-53]
+                                * switches.
+                                *
+                                * CVBS is the default selection, link it to
+                                * VIN4 here.
+                                */
+                               adv7180_out: endpoint {
+                                       remote-endpoint = <&vin4_in>;
+                               };
+                       };
+               };
+
+       };
+
+       hdmi-encoder@39 {
+               compatible = "adi,adv7511w";
+               reg = <0x39>, <0x3f>, <0x3c>, <0x38>;
+               reg-names = "main", "edid", "cec", "packet";
+               interrupt-parent = <&gpio1>;
+               interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
+
+               adi,input-depth = <8>;
+               adi,input-colorspace = "rgb";
+               adi,input-clock = "1x";
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                               adv7511_in: endpoint {
+                                       remote-endpoint = <&thc63lvd1024_out>;
+                               };
+                       };
+
+                       port@1 {
+                               reg = <1>;
+                               adv7511_out: endpoint {
+                                       remote-endpoint = <&hdmi_con_out>;
+                               };
+                       };
+               };
+       };
+
+       hdmi-decoder@4c {
+               compatible = "adi,adv7612";
+               reg = <0x4c>;
+               default-input = <0>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+
+                               adv7612_in: endpoint {
+                                       remote-endpoint = <&hdmi_con_in>;
+                               };
+                       };
+
+                       port@2 {
+                               reg = <2>;
+
+                               /*
+                                * The VIN4 video input path is shared between
+                                * CVBS and HDMI inputs through SW[49-53]
+                                * switches.
+                                *
+                                * CVBS is the default selection, leave HDMI
+                                * not connected here.
+                                */
+                               adv7612_out: endpoint {
+                                       pclk-sample = <0>;
+                                       hsync-active = <0>;
+                                       vsync-active = <0>;
+                               };
+                       };
+               };
+       };
+
+       cs2000: clk-multiplier@4f {
+               #clock-cells = <0>;
+               compatible = "cirrus,cs2000-cp";
+               reg = <0x4f>;
+               clocks = <&audio_clkout>, <&x19_clk>; /* audio_clkout_1, x19 */
+               clock-names = "clk_in", "ref_clk";
+
+               assigned-clocks = <&cs2000>;
+               assigned-clock-rates = <24576000>; /* 1/1 divide */
+       };
+
+       eeprom@50 {
+               compatible = "rohm,br24t01", "atmel,24c01";
+               reg = <0x50>;
+               pagesize = <8>;
+       };
+};
+
+&i2c1 {
+       pinctrl-0 = <&i2c1_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+};
+
+&lvds0 {
+       status = "okay";
+
+       clocks = <&cpg CPG_MOD 727>,
+                <&x12_clk>,
+                <&extal_clk>;
+       clock-names = "fck", "dclkin.0", "extal";
+
+       ports {
+               port@1 {
+                       lvds0_out: endpoint {
+                               remote-endpoint = <&thc63lvd1024_in>;
+                       };
+               };
+       };
+};
+
+&lvds1 {
+       /*
+        * Even though the LVDS1 output is not connected, the encoder must be
+        * enabled to supply a pixel clock to the DU for the DPAD output when
+        * LVDS0 is in use.
+        */
+       status = "okay";
+
+       clocks = <&cpg CPG_MOD 727>,
+                <&x12_clk>,
+                <&extal_clk>;
+       clock-names = "fck", "dclkin.0", "extal";
+};
+
+&ohci0 {
+       dr_mode = "host";
+       status = "okay";
+};
+
+&pfc {
+       avb0_pins: avb {
+               groups = "avb0_link", "avb0_mdio", "avb0_mii";
+               function = "avb0";
+       };
+
+       can0_pins: can0 {
+               groups = "can0_data_a";
+               function = "can0";
+       };
+
+       can1_pins: can1 {
+               groups = "can1_data_a";
+               function = "can1";
+       };
+
+       du_pins: du {
+               groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
+               function = "du";
+       };
+
+       i2c0_pins: i2c0 {
+               groups = "i2c0";
+               function = "i2c0";
+       };
+
+       i2c1_pins: i2c1 {
+               groups = "i2c1";
+               function = "i2c1";
+       };
+
+       keys_pins: keys {
+               pins = "GP_4_12", "GP_4_13", "GP_4_14", "GP_4_15";
+               bias-pull-up;
+       };
+
+       pwm0_pins: pwm0 {
+               groups = "pwm0_c";
+               function = "pwm0";
+       };
+
+       pwm1_pins: pwm1 {
+               groups = "pwm1_c";
+               function = "pwm1";
+       };
+
+       rpc_pins: rpc {
+               groups = "rpc_clk2", "rpc_ctrl", "rpc_data", "rpc_reset",
+                        "rpc_int";
+               function = "rpc";
+       };
+
+       scif2_pins: scif2 {
+               groups = "scif2_data";
+               function = "scif2";
+       };
+
+       sdhi2_pins: sd2 {
+               groups = "mmc_data8", "mmc_ctrl";
+               function = "mmc";
+               power-source = <1800>;
+       };
+
+       sdhi2_pins_uhs: sd2_uhs {
+               groups = "mmc_data8", "mmc_ctrl";
+               function = "mmc";
+               power-source = <1800>;
+       };
+
+       sound_pins: sound {
+               groups = "ssi34_ctrl", "ssi3_data", "ssi4_data_a";
+               function = "ssi";
+       };
+
+       sound_clk_pins: sound-clk {
+               groups = "audio_clk_a", "audio_clk_b",
+                        "audio_clkout", "audio_clkout1";
+               function = "audio_clk";
+       };
+
+       usb0_pins: usb0 {
+               groups = "usb0";
+               function = "usb0";
+       };
+
+       vin4_pins_cvbs: vin4 {
+               groups = "vin4_data8", "vin4_sync", "vin4_clk";
+               function = "vin4";
+       };
+};
+
+&pwm0 {
+       pinctrl-0 = <&pwm0_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+};
+
+&pwm1 {
+       pinctrl-0 = <&pwm1_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+};
+
+&rcar_sound {
+       pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
+       pinctrl-names = "default";
+
+       /* Single DAI */
+       #sound-dai-cells = <0>;
+
+       /* audio_clkout0/1 */
+       #clock-cells = <1>;
+       clock-frequency = <12288000 11289600>;
+
+       status = "okay";
+
+       clocks = <&cpg CPG_MOD 1005>,
+                <&cpg CPG_MOD 1011>, <&cpg CPG_MOD 1012>,
+                <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
+                <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
+                <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
+                <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
+                <&cs2000>, <&audio_clk_b>,
+                <&cpg CPG_CORE R8A77995_CLK_ZA2>;
+
+       ports {
+               rsnd_port0: port {
+                       rsnd_for_ak4613: endpoint {
+                               remote-endpoint = <&ak4613_endpoint>;
+                               dai-format = "left_j";
+                               bitclock-master = <&rsnd_for_ak4613>;
+                               frame-master = <&rsnd_for_ak4613>;
+                               playback = <&ssi3>, <&src5>, <&dvc0>;
+                               capture = <&ssi4>, <&src6>, <&dvc1>;
+                       };
+               };
+       };
+};
+
+&rpc {
+       pinctrl-0 = <&rpc_pins>;
+       pinctrl-names = "default";
+
+       /* Left disabled.  To be enabled by firmware when unlocked. */
+
+       flash@0 {
+               compatible = "cypress,hyperflash", "cfi-flash";
+               reg = <0>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       bootparam@0 {
+                               reg = <0x00000000 0x040000>;
+                               read-only;
+                       };
+                       bl2@40000 {
+                               reg = <0x00040000 0x140000>;
+                               read-only;
+                       };
+                       cert_header_sa6@180000 {
+                               reg = <0x00180000 0x040000>;
+                               read-only;
+                       };
+                       bl31@1c0000 {
+                               reg = <0x001c0000 0x040000>;
+                               read-only;
+                       };
+                       tee@200000 {
+                               reg = <0x00200000 0x440000>;
+                               read-only;
+                       };
+                       uboot@640000 {
+                               reg = <0x00640000 0x100000>;
+                               read-only;
+                       };
+                       dtb@740000 {
+                               reg = <0x00740000 0x080000>;
+                       };
+                       kernel@7c0000 {
+                               reg = <0x007c0000 0x1400000>;
+                       };
+                       user@1bc0000 {
+                               reg = <0x01bc0000 0x2440000>;
+                       };
+               };
+       };
+};
+
+&rwdt {
+       timeout-sec = <60>;
+       status = "okay";
+};
+
+&scif2 {
+       pinctrl-0 = <&scif2_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+};
+
+&sdhi2 {
+       /* used for on-board eMMC */
+       pinctrl-0 = <&sdhi2_pins>;
+       pinctrl-1 = <&sdhi2_pins_uhs>;
+       pinctrl-names = "default", "state_uhs";
+
+       vmmc-supply = <&reg_3p3v>;
+       vqmmc-supply = <&reg_1p8v>;
+       bus-width = <8>;
+       mmc-hs200-1_8v;
+       no-sd;
+       no-sdio;
+       non-removable;
+       status = "okay";
+};
+
+&ssi4 {
+       shared-pin;
+};
+
+&usb2_phy0 {
+       pinctrl-0 = <&usb0_pins>;
+       pinctrl-names = "default";
+
+       renesas,no-otg-pins;
+       status = "okay";
+};
+
+&vin4 {
+       pinctrl-0 = <&vin4_pins_cvbs>;
+       pinctrl-names = "default";
+
+       status = "okay";
+
+       ports {
+               port {
+                       vin4_in: endpoint {
+                               remote-endpoint = <&adv7180_out>;
+                       };
+               };
+       };
+};
diff --git a/arch/arm/dts/ebisu.dtsi b/arch/arm/dts/ebisu.dtsi
new file mode 100644 (file)
index 0000000..bbc2945
--- /dev/null
@@ -0,0 +1,869 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the Ebisu board
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "Renesas Ebisu board";
+       compatible = "renesas,ebisu";
+
+       aliases {
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               i2c2 = &i2c2;
+               i2c3 = &i2c3;
+               i2c4 = &i2c4;
+               i2c5 = &i2c5;
+               i2c6 = &i2c6;
+               i2c7 = &i2c7;
+               serial0 = &scif2;
+               ethernet0 = &avb;
+               mmc0 = &sdhi3;
+               mmc1 = &sdhi0;
+               mmc2 = &sdhi1;
+       };
+
+       chosen {
+               bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
+               stdout-path = "serial0:115200n8";
+       };
+
+       audio_clkout: audio-clkout {
+               /*
+                * This is same as <&rcar_sound 0>
+                * but needed to avoid cs2000/rcar_sound probe dead-lock
+                */
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <11289600>;
+       };
+
+       backlight: backlight {
+               compatible = "pwm-backlight";
+               pwms = <&pwm3 0 50000>;
+
+               brightness-levels = <512 511 505 494 473 440 392 327 241 133 0>;
+               default-brightness-level = <10>;
+
+               power-supply = <&reg_12p0v>;
+       };
+
+       cvbs-in {
+               compatible = "composite-video-connector";
+               label = "CVBS IN";
+
+               port {
+                       cvbs_con: endpoint {
+                               remote-endpoint = <&adv7482_ain7>;
+                       };
+               };
+       };
+
+       hdmi-in {
+               compatible = "hdmi-connector";
+               label = "HDMI IN";
+               type = "a";
+
+               port {
+                       hdmi_in_con: endpoint {
+                               remote-endpoint = <&adv7482_hdmi>;
+                       };
+               };
+       };
+
+       hdmi-out {
+               compatible = "hdmi-connector";
+               type = "a";
+
+               port {
+                       hdmi_con_out: endpoint {
+                               remote-endpoint = <&adv7511_out>;
+                       };
+               };
+       };
+
+       keys {
+               compatible = "gpio-keys";
+
+               pinctrl-0 = <&keys_pins>;
+               pinctrl-names = "default";
+
+               key-1 {
+                       gpios = <&gpio5 10 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_1>;
+                       label = "SW4-1";
+                       wakeup-source;
+                       debounce-interval = <20>;
+               };
+               key-2 {
+                       gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_2>;
+                       label = "SW4-2";
+                       wakeup-source;
+                       debounce-interval = <20>;
+               };
+               key-3 {
+                       gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_3>;
+                       label = "SW4-3";
+                       wakeup-source;
+                       debounce-interval = <20>;
+               };
+               key-4 {
+                       gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_4>;
+                       label = "SW4-4";
+                       wakeup-source;
+                       debounce-interval = <20>;
+               };
+       };
+
+       lvds-decoder {
+               compatible = "thine,thc63lvd1024";
+               vcc-supply = <&reg_3p3v>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                               thc63lvd1024_in: endpoint {
+                                       remote-endpoint = <&lvds0_out>;
+                               };
+                       };
+
+                       port@2 {
+                               reg = <2>;
+                               thc63lvd1024_out: endpoint {
+                                       remote-endpoint = <&adv7511_in>;
+                               };
+                       };
+               };
+       };
+
+       memory@48000000 {
+               device_type = "memory";
+               /* first 128MB is reserved for secure area. */
+               reg = <0x0 0x48000000 0x0 0x38000000>;
+       };
+
+       reg_1p8v: regulator-1p8v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-1.8V";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       reg_3p3v: regulator-3p3v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-3.3V";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       reg_12p0v: regulator-12p0v {
+               compatible = "regulator-fixed";
+               regulator-name = "D12.0V";
+               regulator-min-microvolt = <12000000>;
+               regulator-max-microvolt = <12000000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       rsnd_ak4613: sound {
+               compatible = "simple-audio-card";
+
+               simple-audio-card,name = "rsnd-ak4613";
+               simple-audio-card,format = "left_j";
+               simple-audio-card,bitclock-master = <&sndcpu>;
+               simple-audio-card,frame-master = <&sndcpu>;
+
+               sndcodec: simple-audio-card,codec {
+                       sound-dai = <&ak4613>;
+               };
+
+               sndcpu: simple-audio-card,cpu {
+                       sound-dai = <&rcar_sound>;
+               };
+       };
+
+       vbus0_usb2: regulator-vbus0-usb2 {
+               compatible = "regulator-fixed";
+
+               regulator-name = "USB20_VBUS_CN";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+
+               gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
+       vcc_sdhi0: regulator-vcc-sdhi0 {
+               compatible = "regulator-fixed";
+
+               regulator-name = "SDHI0 Vcc";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+
+               gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
+       vccq_sdhi0: regulator-vccq-sdhi0 {
+               compatible = "regulator-gpio";
+
+               regulator-name = "SDHI0 VccQ";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <3300000>;
+
+               gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
+               gpios-states = <1>;
+               states = <3300000 1>, <1800000 0>;
+       };
+
+       vcc_sdhi1: regulator-vcc-sdhi1 {
+               compatible = "regulator-fixed";
+
+               regulator-name = "SDHI1 Vcc";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+
+               gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
+       vccq_sdhi1: regulator-vccq-sdhi1 {
+               compatible = "regulator-gpio";
+
+               regulator-name = "SDHI1 VccQ";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <3300000>;
+
+               gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
+               gpios-states = <1>;
+               states = <3300000 1>, <1800000 0>;
+       };
+
+       vga {
+               compatible = "vga-connector";
+
+               port {
+                       vga_in: endpoint {
+                               remote-endpoint = <&adv7123_out>;
+                       };
+               };
+       };
+
+       vga-encoder {
+               compatible = "adi,adv7123";
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                               adv7123_in: endpoint {
+                                       remote-endpoint = <&du_out_rgb>;
+                               };
+                       };
+                       port@1 {
+                               reg = <1>;
+                               adv7123_out: endpoint {
+                                       remote-endpoint = <&vga_in>;
+                               };
+                       };
+               };
+       };
+
+       x12_clk: x12 {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <24576000>;
+       };
+
+       x13_clk: x13 {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <74250000>;
+       };
+};
+
+&audio_clk_a {
+       clock-frequency = <22579200>;
+};
+
+&avb {
+       pinctrl-0 = <&avb_pins>;
+       pinctrl-names = "default";
+       phy-handle = <&phy0>;
+       status = "okay";
+
+       phy0: ethernet-phy@0 {
+               compatible = "ethernet-phy-id0022.1622",
+                            "ethernet-phy-ieee802.3-c22";
+               rxc-skew-ps = <1500>;
+               reg = <0>;
+               interrupt-parent = <&gpio2>;
+               interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
+               reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
+               /*
+                * TX clock internal delay mode is required for reliable
+                * 1Gbps communication using the KSZ9031RNX phy present on
+                * the Ebisu board, however, TX clock internal delay mode
+                * isn't supported on R-Car E3(e).  Thus, limit speed to
+                * 100Mbps for reliable communication.
+                */
+               max-speed = <100>;
+       };
+};
+
+&canfd {
+       pinctrl-0 = <&canfd0_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+
+       channel0 {
+               status = "okay";
+       };
+};
+
+&csi40 {
+       status = "okay";
+
+       ports {
+               port@0 {
+                       csi40_in: endpoint {
+                               clock-lanes = <0>;
+                               data-lanes = <1 2>;
+                               remote-endpoint = <&adv7482_txa>;
+                       };
+               };
+       };
+};
+
+&du {
+       pinctrl-0 = <&du_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+
+       clocks = <&cpg CPG_MOD 724>,
+                <&cpg CPG_MOD 723>,
+                <&x13_clk>;
+       clock-names = "du.0", "du.1", "dclkin.0";
+
+       ports {
+               port@0 {
+                       du_out_rgb: endpoint {
+                               remote-endpoint = <&adv7123_in>;
+                       };
+               };
+       };
+};
+
+&ehci0 {
+       dr_mode = "otg";
+       status = "okay";
+};
+
+&extal_clk {
+       clock-frequency = <48000000>;
+};
+
+&hsusb {
+       dr_mode = "otg";
+       status = "okay";
+};
+
+&i2c0 {
+       status = "okay";
+
+       io_expander: gpio@20 {
+               compatible = "onnn,pca9654";
+               reg = <0x20>;
+               gpio-controller;
+               #gpio-cells = <2>;
+               interrupt-parent = <&gpio2>;
+               interrupts = <22 IRQ_TYPE_LEVEL_LOW>;
+       };
+
+       hdmi-encoder@39 {
+               compatible = "adi,adv7511w";
+               reg = <0x39>;
+               interrupt-parent = <&gpio1>;
+               interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
+
+               adi,input-depth = <8>;
+               adi,input-colorspace = "rgb";
+               adi,input-clock = "1x";
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                               adv7511_in: endpoint {
+                                       remote-endpoint = <&thc63lvd1024_out>;
+                               };
+                       };
+
+                       port@1 {
+                               reg = <1>;
+                               adv7511_out: endpoint {
+                                       remote-endpoint = <&hdmi_con_out>;
+                               };
+                       };
+               };
+       };
+
+       video-receiver@70 {
+               compatible = "adi,adv7482";
+               reg = <0x70>;
+
+               interrupt-parent = <&gpio0>;
+               interrupt-names = "intrq1", "intrq2";
+               interrupts = <7 IRQ_TYPE_LEVEL_LOW>,
+                            <17 IRQ_TYPE_LEVEL_LOW>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@7 {
+                               reg = <7>;
+
+                               adv7482_ain7: endpoint {
+                                       remote-endpoint = <&cvbs_con>;
+                               };
+                       };
+
+                       port@8 {
+                               reg = <8>;
+
+                               adv7482_hdmi: endpoint {
+                                       remote-endpoint = <&hdmi_in_con>;
+                               };
+                       };
+
+                       port@a {
+                               reg = <10>;
+
+                               adv7482_txa: endpoint {
+                                       clock-lanes = <0>;
+                                       data-lanes = <1 2>;
+                                       remote-endpoint = <&csi40_in>;
+                               };
+                       };
+               };
+       };
+};
+
+&i2c3 {
+       status = "okay";
+
+       ak4613: codec@10 {
+               compatible = "asahi-kasei,ak4613";
+               #sound-dai-cells = <0>;
+               reg = <0x10>;
+               clocks = <&rcar_sound 3>;
+
+               asahi-kasei,in1-single-end;
+               asahi-kasei,in2-single-end;
+               asahi-kasei,out1-single-end;
+               asahi-kasei,out2-single-end;
+               asahi-kasei,out3-single-end;
+               asahi-kasei,out4-single-end;
+               asahi-kasei,out5-single-end;
+               asahi-kasei,out6-single-end;
+       };
+
+       cs2000: clk-multiplier@4f {
+               #clock-cells = <0>;
+               compatible = "cirrus,cs2000-cp";
+               reg = <0x4f>;
+               clocks = <&audio_clkout>, <&x12_clk>;
+               clock-names = "clk_in", "ref_clk";
+
+               assigned-clocks = <&cs2000>;
+               assigned-clock-rates = <24576000>; /* 1/1 divide */
+       };
+};
+
+&i2c_dvfs {
+       status = "okay";
+
+       clock-frequency = <400000>;
+
+       pmic: pmic@30 {
+               pinctrl-0 = <&irq0_pins>;
+               pinctrl-names = "default";
+
+               compatible = "rohm,bd9571mwv";
+               reg = <0x30>;
+               interrupt-parent = <&intc_ex>;
+               interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+               gpio-controller;
+               #gpio-cells = <2>;
+               rohm,ddr-backup-power = <0x1>;
+               rohm,rstbmode-level;
+       };
+
+       eeprom@50 {
+               compatible = "rohm,br24t01", "atmel,24c01";
+               reg = <0x50>;
+               pagesize = <8>;
+       };
+};
+
+&lvds0 {
+       status = "okay";
+
+       clocks = <&cpg CPG_MOD 727>,
+                <&x13_clk>,
+                <&extal_clk>;
+       clock-names = "fck", "dclkin.0", "extal";
+
+       ports {
+               port@1 {
+                       lvds0_out: endpoint {
+                               remote-endpoint = <&thc63lvd1024_in>;
+                       };
+               };
+       };
+};
+
+&lvds1 {
+       /*
+        * Even though the LVDS1 output is not connected, the encoder must be
+        * enabled to supply a pixel clock to the DU for the DPAD output when
+        * LVDS0 is in use.
+        */
+       status = "okay";
+
+       clocks = <&cpg CPG_MOD 727>,
+                <&x13_clk>,
+                <&extal_clk>;
+       clock-names = "fck", "dclkin.0", "extal";
+};
+
+&ohci0 {
+       dr_mode = "otg";
+       status = "okay";
+};
+
+&pcie_bus_clk {
+       clock-frequency = <100000000>;
+};
+
+&pciec0 {
+       status = "okay";
+};
+
+&pfc {
+       avb_pins: avb {
+               groups = "avb_link", "avb_mii";
+               function = "avb";
+       };
+
+       canfd0_pins: canfd0 {
+               groups = "canfd0_data";
+               function = "canfd0";
+       };
+
+       du_pins: du {
+               groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
+               function = "du";
+       };
+
+       irq0_pins: irq0 {
+               groups = "intc_ex_irq0";
+               function = "intc_ex";
+       };
+
+       keys_pins: keys {
+               pins = "GP_5_10", "GP_5_11", "GP_5_12", "GP_5_13";
+               bias-pull-up;
+       };
+
+       pwm3_pins: pwm3 {
+               groups = "pwm3_b";
+               function = "pwm3";
+       };
+
+       pwm5_pins: pwm5 {
+               groups = "pwm5_a";
+               function = "pwm5";
+       };
+
+       rpc_pins: rpc {
+               groups = "rpc_clk2", "rpc_ctrl", "rpc_data", "rpc_reset",
+                        "rpc_int";
+               function = "rpc";
+       };
+
+       scif2_pins: scif2 {
+               groups = "scif2_data_a";
+               function = "scif2";
+       };
+
+       sdhi0_pins: sd0 {
+               groups = "sdhi0_data4", "sdhi0_ctrl";
+               function = "sdhi0";
+               power-source = <3300>;
+       };
+
+       sdhi0_pins_uhs: sd0_uhs {
+               groups = "sdhi0_data4", "sdhi0_ctrl";
+               function = "sdhi0";
+               power-source = <1800>;
+       };
+
+       sdhi1_pins: sd1 {
+               groups = "sdhi1_data4", "sdhi1_ctrl";
+               function = "sdhi1";
+               power-source = <3300>;
+       };
+
+       sdhi1_pins_uhs: sd1_uhs {
+               groups = "sdhi1_data4", "sdhi1_ctrl";
+               function = "sdhi1";
+               power-source = <1800>;
+       };
+
+       sdhi3_pins: sd3 {
+               groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
+               function = "sdhi3";
+               power-source = <1800>;
+       };
+
+       sound_clk_pins: sound_clk {
+               groups = "audio_clk_a", "audio_clk_b_a", "audio_clk_c_a",
+                        "audio_clkout_a", "audio_clkout1_a";
+               function = "audio_clk";
+       };
+
+       sound_pins: sound {
+               groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data";
+               function = "ssi";
+       };
+
+       usb0_pins: usb {
+               groups = "usb0_b", "usb0_id";
+               function = "usb0";
+       };
+
+       usb30_pins: usb30 {
+               groups = "usb30";
+               function = "usb30";
+       };
+};
+
+&pwm3 {
+       pinctrl-0 = <&pwm3_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+};
+
+&pwm5 {
+       pinctrl-0 = <&pwm5_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+};
+
+&rcar_sound {
+       pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
+       pinctrl-names = "default";
+
+       /* Single DAI */
+       #sound-dai-cells = <0>;
+
+       /* audio_clkout0/1/2/3 */
+       #clock-cells = <1>;
+       clock-frequency = <12288000 11289600>;
+
+       status = "okay";
+
+       /* update <audio_clk_b> to <cs2000> */
+       clocks = <&cpg CPG_MOD 1005>,
+                <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
+                <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
+                <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
+                <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
+                <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
+                <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
+                <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
+                <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
+                <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
+                <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
+                <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
+                <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
+                <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
+                <&audio_clk_a>, <&cs2000>, <&audio_clk_c>,
+                <&cpg CPG_CORE R8A77990_CLK_ZA2>;
+
+       rcar_sound,dai {
+               dai0 {
+                       playback = <&ssi0>, <&src0>, <&dvc0>;
+                       capture = <&ssi1>, <&src1>, <&dvc1>;
+               };
+       };
+
+};
+
+&rpc {
+       pinctrl-0 = <&rpc_pins>;
+       pinctrl-names = "default";
+
+       /* Left disabled.  To be enabled by firmware when unlocked. */
+
+       flash@0 {
+               compatible = "cypress,hyperflash", "cfi-flash";
+               reg = <0>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       bootparam@0 {
+                               reg = <0x00000000 0x040000>;
+                               read-only;
+                       };
+                       bl2@40000 {
+                               reg = <0x00040000 0x140000>;
+                               read-only;
+                       };
+                       cert_header_sa6@180000 {
+                               reg = <0x00180000 0x040000>;
+                               read-only;
+                       };
+                       bl31@1c0000 {
+                               reg = <0x001c0000 0x040000>;
+                               read-only;
+                       };
+                       tee@200000 {
+                               reg = <0x00200000 0x440000>;
+                               read-only;
+                       };
+                       uboot@640000 {
+                               reg = <0x00640000 0x100000>;
+                               read-only;
+                       };
+                       dtb@740000 {
+                               reg = <0x00740000 0x080000>;
+                       };
+                       kernel@7c0000 {
+                               reg = <0x007c0000 0x1400000>;
+                       };
+                       user@1bc0000 {
+                               reg = <0x01bc0000 0x2440000>;
+                       };
+               };
+       };
+};
+
+&rwdt {
+       timeout-sec = <60>;
+       status = "okay";
+};
+
+&scif2 {
+       pinctrl-0 = <&scif2_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+};
+
+&sdhi0 {
+       pinctrl-0 = <&sdhi0_pins>;
+       pinctrl-1 = <&sdhi0_pins_uhs>;
+       pinctrl-names = "default", "state_uhs";
+
+       vmmc-supply = <&vcc_sdhi0>;
+       vqmmc-supply = <&vccq_sdhi0>;
+       cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
+       wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
+       bus-width = <4>;
+       sd-uhs-sdr50;
+       sd-uhs-sdr104;
+       status = "okay";
+};
+
+&sdhi1 {
+       pinctrl-0 = <&sdhi1_pins>;
+       pinctrl-1 = <&sdhi1_pins_uhs>;
+       pinctrl-names = "default", "state_uhs";
+
+       vmmc-supply = <&vcc_sdhi1>;
+       vqmmc-supply = <&vccq_sdhi1>;
+       cd-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>;
+       bus-width = <4>;
+       sd-uhs-sdr50;
+       sd-uhs-sdr104;
+       status = "okay";
+};
+
+&sdhi3 {
+       /* used for on-board 8bit eMMC */
+       pinctrl-0 = <&sdhi3_pins>;
+       pinctrl-1 = <&sdhi3_pins>;
+       pinctrl-names = "default", "state_uhs";
+
+       vmmc-supply = <&reg_3p3v>;
+       vqmmc-supply = <&reg_1p8v>;
+       mmc-hs200-1_8v;
+       mmc-hs400-1_8v;
+       bus-width = <8>;
+       no-sd;
+       no-sdio;
+       non-removable;
+       full-pwr-cycle-in-suspend;
+       status = "okay";
+};
+
+&ssi1 {
+       shared-pin;
+};
+
+&usb2_phy0 {
+       pinctrl-0 = <&usb0_pins>;
+       pinctrl-names = "default";
+
+       vbus-supply = <&vbus0_usb2>;
+       status = "okay";
+};
+
+&usb3_peri0 {
+       companion = <&xhci0>;
+       status = "okay";
+};
+
+&vin4 {
+       status = "okay";
+};
+
+&vin5 {
+       status = "okay";
+};
+
+&xhci0 {
+       pinctrl-0 = <&usb30_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+};
index 30e929997a4d92402ad85fe3c2b187e505793c54..7fc0339a3ac97896710efabd22d6375bbe869314 100644 (file)
@@ -3,7 +3,7 @@
  * Device Tree Source for the HiHope RZ/G2H Rev.4.0 and
  * HiHope RZ/G2[MN] Rev.3.0/4.0 main board common parts
  *
- * Copyright (C) 2021 Renesas Electronics Corp.
+ * Copyright (C) 2020 Renesas Electronics Corp.
  */
 
 #include <dt-bindings/gpio/gpio.h>
@@ -80,7 +80,7 @@
 };
 
 &rcar_sound {
-       pinctrl-0 = <&sound_pins &sound_clk_pins>;
+       pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
        pinctrl-names = "default";
        status = "okay";
 
        #clock-cells = <1>;
        clock-frequency = <12288000 11289600>;
 
-       /* update <audio_clk_b> to <cs2000> */
+       /*
+        * Update <audio_clk_b> to <cs2000>
+        * Switch SW2404 should be at position 1 so that clock from
+        * CS2000 is connected to AUDIO_CLKB_A
+        */
        clocks = <&cpg CPG_MOD 1005>,
                 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
                 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
index 7745012d4b82b122b48ac2dcefd3001a78f3f3ed..ad898c6db4e62df6f5ac1cee9c840a3c4570d121 100644 (file)
@@ -2,7 +2,7 @@
 /*
  * Device Tree Source for the RZ/G2[HMN] HiHope sub board common parts
  *
- * Copyright (C) 2021 Renesas Electronics Corp.
+ * Copyright (C) 2019 Renesas Electronics Corp.
  */
 
 / {
        pinctrl-0 = <&avb_pins>;
        pinctrl-names = "default";
        phy-handle = <&phy0>;
-       phy-mode = "rgmii-txid";
+       tx-internal-delay-ps = <2000>;
+       rx-internal-delay-ps = <1800>;
        status = "okay";
 
        phy0: ethernet-phy@0 {
+               compatible = "ethernet-phy-id001c.c915",
+                            "ethernet-phy-ieee802.3-c22";
                reg = <0>;
                interrupt-parent = <&gpio2>;
                interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
index 3cf2e076940f3b5a8740ff9d97b5a362c1f52b0d..9ae67263c0df3fed712aa6f79247be1be2a4125c 100644 (file)
        compatible = "beacon,beacon-rzg2m", "renesas,r8a774a1";
 
        aliases {
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               i2c2 = &i2c2;
+               i2c3 = &i2c3;
+               i2c4 = &i2c4;
+               i2c5 = &i2c5;
+               i2c6 = &i2c6;
+               i2c7 = &iic_pmic;
                serial0 = &scif2;
                serial1 = &hscif0;
                serial2 = &hscif1;
index f0e4a1f25d23ba8ce40b4056664323b1ee99ea45..a5ca86196a7b50bdd1603a9d7d54db0ff46717cf 100644 (file)
@@ -3,7 +3,7 @@
  * Device Tree Source for the HiHope RZ/G2M Rev.3.0/4.0 connected to
  * sub board
  *
- * Copyright (C) 2021 Renesas Electronics Corp.
+ * Copyright (C) 2020 Renesas Electronics Corp.
  */
 
 #include "r8a774a1-hihope-rzg2m.dts"
index a574c85a504d25d54aad9c62bcafac60a800672e..25ae255de0f22b454bf4cf4cc9d889a378e3a0cc 100644 (file)
@@ -2,7 +2,7 @@
 /*
  * Device Tree Source for the HiHope RZ/G2M Rev.3.0/4.0 main board
  *
- * Copyright (C) 2021 Renesas Electronics Corp.
+ * Copyright (C) 2020 Renesas Electronics Corp.
  */
 
 /dts-v1/;
index d64fb8b1b86c37318a8b63abdd4630b0b954f9fc..7e643243c3be6e89ef7f7afa4182429fc36b194b 100644 (file)
        #address-cells = <2>;
        #size-cells = <2>;
 
-       aliases {
-               i2c0 = &i2c0;
-               i2c1 = &i2c1;
-               i2c2 = &i2c2;
-               i2c3 = &i2c3;
-               i2c4 = &i2c4;
-               i2c5 = &i2c5;
-               i2c6 = &i2c6;
-               i2c7 = &i2c_dvfs;
-       };
-
        /*
         * The external audio clocks are configured as 0 Hz fixed frequency
         * clocks by default.
@@ -58,7 +47,7 @@
                clock-frequency = <0>;
        };
 
-       cluster0_opp: opp_table0 {
+       cluster0_opp: opp-table-0 {
                compatible = "operating-points-v2";
                opp-shared;
 
                        opp-hz = /bits/ 64 <1500000000>;
                        opp-microvolt = <820000>;
                        clock-latency-ns = <300000>;
+                       opp-suspend;
                };
        };
 
-       cluster1_opp: opp_table1 {
+       cluster1_opp: opp-table-1 {
                compatible = "operating-points-v2";
                opp-shared;
 
                        compatible = "renesas,r8a774a1-wdt",
                                     "renesas,rcar-gen3-wdt";
                        reg = <0 0xe6020000 0 0x0c>;
+                       interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 402>;
                        power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
                        resets = <&cpg 402>;
                        status = "disabled";
                };
 
-               i2c_dvfs: i2c@e60b0000 {
+               iic_pmic: i2c@e60b0000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        compatible = "renesas,iic-r8a774a1",
                                          "ch20", "ch21", "ch22", "ch23",
                                          "ch24";
                        clocks = <&cpg CPG_MOD 812>;
+                       clock-names = "fck";
                        power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
                        resets = <&cpg 812>;
                        phy-mode = "rgmii";
                        reg = <0 0xe66c0000 0 0x8000>;
                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ch_int", "g_int";
                        clocks = <&cpg CPG_MOD 914>,
                                 <&cpg CPG_CORE R8A774A1_CLK_CANFD>,
                                 <&can_clk>;
                         * clkout       : #clock-cells = <0>;   <&rcar_sound>;
                         * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
                         */
-                       compatible =  "renesas,rcar_sound-r8a774a1", "renesas,rcar_sound-gen3";
-                       reg =   <0 0xec500000 0 0x1000>, /* SCU */
-                               <0 0xec5a0000 0 0x100>,  /* ADG */
-                               <0 0xec540000 0 0x1000>, /* SSIU */
-                               <0 0xec541000 0 0x280>,  /* SSI */
-                               <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
+                       compatible = "renesas,rcar_sound-r8a774a1", "renesas,rcar_sound-gen3";
+                       reg = <0 0xec500000 0 0x1000>, /* SCU */
+                             <0 0xec5a0000 0 0x100>,  /* ADG */
+                             <0 0xec540000 0 0x1000>, /* SSIU */
+                             <0 0xec541000 0 0x280>,  /* SSI */
+                             <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
                        reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
 
                        clocks = <&cpg CPG_MOD 1005>,
                                        dma-names = "rx", "tx";
                                };
                                ssiu40: ssiu-32 {
-                                       dmas =  <&audma0 0x71>, <&audma1 0x72>;
+                                       dmas = <&audma0 0x71>, <&audma1 0x72>;
                                        dma-names = "rx", "tx";
                                };
                                ssiu41: ssiu-33 {
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee100000 0 0x2000>;
                        interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 314>;
+                       clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A774A1_CLK_SD0H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
                        resets = <&cpg 314>;
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee120000 0 0x2000>;
                        interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 313>;
+                       clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A774A1_CLK_SD1H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
                        resets = <&cpg 313>;
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee140000 0 0x2000>;
                        interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 312>;
+                       clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A774A1_CLK_SD2H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
                        resets = <&cpg 312>;
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee160000 0 0x2000>;
                        interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 311>;
+                       clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A774A1_CLK_SD3H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
                        resets = <&cpg 311>;
                        reg-names = "regs", "dirmap", "wbuf";
                        interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 917>;
-                       clock-names = "rpc";
                        power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
                        resets = <&cpg 917>;
                        #address-cells = <1>;
                                #address-cells = <1>;
                                #size-cells = <0>;
 
+                               port@0 {
+                                       reg = <0>;
+                               };
+
                                port@1 {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
                                #address-cells = <1>;
                                #size-cells = <0>;
 
+                               port@0 {
+                                       reg = <0>;
+                               };
+
                                port@1 {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
 
                                port@0 {
                                        reg = <0>;
-                                       du_out_rgb: endpoint {
-                                       };
                                };
                                port@1 {
                                        reg = <1>;
                                };
                                port@1 {
                                        reg = <1>;
-                                       lvds0_out: endpoint {
-                                       };
                                };
                        };
                };
        };
 
        thermal-zones {
-               sensor_thermal1: sensor-thermal1 {
+               sensor1_thermal: sensor1-thermal {
                        polling-delay-passive = <250>;
                        polling-delay = <1000>;
                        thermal-sensors = <&tsc 0>;
                        };
                };
 
-               sensor_thermal2: sensor-thermal2 {
+               sensor2_thermal: sensor2-thermal {
                        polling-delay-passive = <250>;
                        polling-delay = <1000>;
                        thermal-sensors = <&tsc 1>;
                        };
                };
 
-               sensor_thermal3: sensor-thermal3 {
+               sensor3_thermal: sensor3-thermal {
                        polling-delay-passive = <250>;
                        polling-delay = <1000>;
                        thermal-sensors = <&tsc 2>;
index 3c0d59def8ee534231a5bf5a6d88a8c181b57d26..89d708346ba8176dc5799d0c2aed4d081853da2f 100644 (file)
@@ -11,7 +11,7 @@
 
 / {
        model = "Beacon Embedded Works RZ/G2N Development Kit";
-       compatible =    "beacon,beacon-rzg2n", "renesas,r8a774b1";
+       compatible = "beacon,beacon-rzg2n", "renesas,r8a774b1";
 
        aliases {
                serial0 = &scif2;
index 5b05474dc272788414fba848d01bb0f559260dc5..d541b48c7e384dab41ec065af054ddda5021bba3 100644 (file)
@@ -47,7 +47,7 @@
                clock-frequency = <0>;
        };
 
-       cluster0_opp: opp_table0 {
+       cluster0_opp: opp-table-0 {
                compatible = "operating-points-v2";
                opp-shared;
 
                        compatible = "renesas,r8a774b1-wdt",
                                     "renesas,rcar-gen3-wdt";
                        reg = <0 0xe6020000 0 0x0c>;
+                       interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 402>;
                        power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
                        resets = <&cpg 402>;
                        status = "disabled";
                };
 
-               i2c_dvfs: i2c@e60b0000 {
+               iic_pmic: i2c@e60b0000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        compatible = "renesas,iic-r8a774b1",
                                          "ch20", "ch21", "ch22", "ch23",
                                          "ch24";
                        clocks = <&cpg CPG_MOD 812>;
+                       clock-names = "fck";
                        power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
                        resets = <&cpg 812>;
                        phy-mode = "rgmii";
                        reg = <0 0xe66c0000 0 0x8000>;
                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
                                   <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ch_int", "g_int";
                        clocks = <&cpg CPG_MOD 914>,
                                 <&cpg CPG_CORE R8A774B1_CLK_CANFD>,
                                 <&can_clk>;
                         * clkout       : #clock-cells = <0>;   <&rcar_sound>;
                         * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
                         */
-                       compatible =  "renesas,rcar_sound-r8a774b1", "renesas,rcar_sound-gen3";
+                       compatible = "renesas,rcar_sound-r8a774b1", "renesas,rcar_sound-gen3";
                        reg = <0 0xec500000 0 0x1000>, /* SCU */
                              <0 0xec5a0000 0 0x100>,  /* ADG */
                              <0 0xec540000 0 0x1000>, /* SSIU */
                                        dma-names = "rx", "tx";
                                };
                                ssiu40: ssiu-32 {
-                                       dmas =  <&audma0 0x71>, <&audma1 0x72>;
+                                       dmas = <&audma0 0x71>, <&audma1 0x72>;
                                        dma-names = "rx", "tx";
                                };
                                ssiu41: ssiu-33 {
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee100000 0 0x2000>;
                        interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 314>;
+                       clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A774B1_CLK_SD0H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
                        resets = <&cpg 314>;
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee120000 0 0x2000>;
                        interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 313>;
+                       clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A774B1_CLK_SD1H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
                        resets = <&cpg 313>;
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee140000 0 0x2000>;
                        interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 312>;
+                       clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A774B1_CLK_SD2H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
                        resets = <&cpg 312>;
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee160000 0 0x2000>;
                        interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 311>;
+                       clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A774B1_CLK_SD3H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
                        resets = <&cpg 311>;
                        reg-names = "regs", "dirmap", "wbuf";
                        interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 917>;
-                       clock-names = "rpc";
                        power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
                        resets = <&cpg 917>;
                        #address-cells = <1>;
                                #address-cells = <1>;
                                #size-cells = <0>;
 
+                               port@0 {
+                                       reg = <0>;
+                               };
+
                                port@1 {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
                                #address-cells = <1>;
                                #size-cells = <0>;
 
+                               port@0 {
+                                       reg = <0>;
+                               };
+
                                port@1 {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
 
                                port@0 {
                                        reg = <0>;
-                                       du_out_rgb: endpoint {
-                                       };
                                };
                                port@1 {
                                        reg = <1>;
                                };
                                port@1 {
                                        reg = <1>;
-                                       lvds0_out: endpoint {
-                                       };
                                };
                        };
                };
        };
 
        thermal-zones {
-               sensor_thermal1: sensor-thermal1 {
+               sensor1_thermal: sensor1-thermal {
                        polling-delay-passive = <250>;
                        polling-delay = <1000>;
                        thermal-sensors = <&tsc 0>;
                        };
                };
 
-               sensor_thermal2: sensor-thermal2 {
+               sensor2_thermal: sensor2-thermal {
                        polling-delay-passive = <250>;
                        polling-delay = <1000>;
                        thermal-sensors = <&tsc 1>;
                        };
                };
 
-               sensor_thermal3: sensor-thermal3 {
+               sensor3_thermal: sensor3-thermal {
                        polling-delay-passive = <250>;
                        polling-delay = <1000>;
                        thermal-sensors = <&tsc 2>;
index 676fdef9e081fee1e6f72b8d20fffb177c931658..5a6ea08ffd2b2791ea80bec60cae2cac66c67963 100644 (file)
@@ -2,7 +2,7 @@
 /*
  * Device Tree Source for the Silicon Linux RZ/G2E 96board platform (CAT874)
  *
- * Copyright (C) 2021 Renesas Electronics Corp.
+ * Copyright (C) 2019 Renesas Electronics Corp.
  */
 
 /dts-v1/;
@@ -17,6 +17,8 @@
        aliases {
                serial0 = &scif2;
                serial1 = &hscif2;
+               mmc0 = &sdhi0;
+               mmc1 = &sdhi3;
        };
 
        chosen {
 
        ports {
                port@0 {
-                       endpoint {
+                       du_out_rgb: endpoint {
                                remote-endpoint = <&tda19988_in>;
                        };
                };
 };
 
 &rcar_sound {
-       pinctrl-0 = <&sound_pins &sound_clk_pins>;
+       pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
        pinctrl-names = "default";
 
        /* Single DAI */
 
        rcar_sound,dai {
                dai0 {
-                       playback = <&ssi0 &src0 &dvc0>;
+                       playback = <&ssi0>, <&src0>, <&dvc0>;
                };
        };
 };
index d3ab28ba31edce62df47d212d66777d3d3a0c58a..e7b6619ab224d6c4d8033fdf2c70e5d96223b019 100644 (file)
@@ -2,7 +2,7 @@
 /*
  * Device Tree Source for the Silicon Linux RZ/G2E evaluation kit (EK874)
  *
- * Copyright (C) 2021 Renesas Electronics Corp.
+ * Copyright (C) 2019 Renesas Electronics Corp.
  */
 
 #include "r8a774c0-cat874.dts"
index d29610676cacb7f69a2ca0baffb5cb683d484ae2..4572c22f6c16fb16dca23862e6bafd70949907fd 100644 (file)
@@ -35,7 +35,6 @@
 /delete-node/ &rcar_sound;
 /delete-node/ &audma0;
 /delete-node/ &sdhi1;
-/delete-node/ &sdhi3;
 /delete-node/ &vspb0;
 /delete-node/ &vspd0;
 /delete-node/ &vspd1;
index 2bdd571bd8a37a74e4dbb824bf21241d15207997..151e32ac03683bf8c098f5749ff55c2c9c70e7e9 100644 (file)
@@ -2,7 +2,7 @@
 /*
  * Device Tree Source for the RZ/G2E (R8A774C0) SoC
  *
- * Copyright (C) 2020 Renesas Electronics Corp.
+ * Copyright (C) 2018-2019 Renesas Electronics Corp.
  */
 
 #include <dt-bindings/clock/r8a774c0-cpg-mssr.h>
@@ -44,7 +44,7 @@
                clock-frequency = <0>;
        };
 
-       cluster1_opp: opp_table10 {
+       cluster1_opp: opp-table-1 {
                compatible = "operating-points-v2";
                opp-shared;
                opp-800000000 {
                        compatible = "renesas,r8a774c0-wdt",
                                     "renesas,rcar-gen3-wdt";
                        reg = <0 0xe6020000 0 0x0c>;
+                       interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 402>;
                        power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
                        resets = <&cpg 402>;
                        status = "disabled";
                };
 
-               i2c_dvfs: i2c@e60b0000 {
+               iic_pmic: i2c@e60b0000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       compatible = "renesas,iic-r8a774c0";
-                       reg = <0 0xe60b0000 0 0x15>;
+                       compatible = "renesas,iic-r8a774c0",
+                                    "renesas,rcar-gen3-iic",
+                                    "renesas,rmobile-iic";
+                       reg = <0 0xe60b0000 0 0x425>;
                        interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 926>;
                        power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
                                          "ch20", "ch21", "ch22", "ch23",
                                          "ch24";
                        clocks = <&cpg CPG_MOD 812>;
+                       clock-names = "fck";
                        power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
                        resets = <&cpg 812>;
                        phy-mode = "rgmii";
                        reg = <0 0xe66c0000 0 0x8000>;
                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ch_int", "g_int";
                        clocks = <&cpg CPG_MOD 914>,
                                 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,
                                 <&can_clk>;
 
                                        vin4csi40: endpoint@2 {
                                                reg = <2>;
-                                               remote-endpoint= <&csi40vin4>;
+                                               remote-endpoint = <&csi40vin4>;
                                        };
                                };
                        };
 
                                        vin5csi40: endpoint@2 {
                                                reg = <2>;
-                                               remote-endpoint= <&csi40vin5>;
+                                               remote-endpoint = <&csi40vin5>;
                                        };
                                };
                        };
                         */
                        compatible = "renesas,rcar_sound-r8a774c0",
                                     "renesas,rcar_sound-gen3";
-                       reg =   <0 0xec500000 0 0x1000>, /* SCU */
-                               <0 0xec5a0000 0 0x100>,  /* ADG */
-                               <0 0xec540000 0 0x1000>, /* SSIU */
-                               <0 0xec541000 0 0x280>,  /* SSI */
-                               <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
+                       reg = <0 0xec500000 0 0x1000>, /* SCU */
+                             <0 0xec5a0000 0 0x100>,  /* ADG */
+                             <0 0xec540000 0 0x1000>, /* SSIU */
+                             <0 0xec541000 0 0x280>,  /* SSI */
+                             <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
                        reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
 
                        clocks = <&cpg CPG_MOD 1005>,
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee100000 0 0x2000>;
                        interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 314>;
+                       clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A774C0_CLK_SD0H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
                        resets = <&cpg 314>;
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee120000 0 0x2000>;
                        interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 313>;
+                       clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A774C0_CLK_SD1H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
                        resets = <&cpg 313>;
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee160000 0 0x2000>;
                        interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 311>;
+                       clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A774C0_CLK_SD3H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
                        resets = <&cpg 311>;
                        status = "disabled";
                };
 
+               rpc: spi@ee200000 {
+                       compatible = "renesas,r8a774c0-rpc-if",
+                                    "renesas,rcar-gen3-rpc-if";
+                       reg = <0 0xee200000 0 0x200>,
+                             <0 0x08000000 0 0x4000000>,
+                             <0 0xee208000 0 0x100>;
+                       reg-names = "regs", "dirmap", "wbuf";
+                       interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 917>;
+                       power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
+                       resets = <&cpg 917>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
                gic: interrupt-controller@f1010000 {
                        compatible = "arm,gic-400";
                        #interrupt-cells = <3>;
                                #address-cells = <1>;
                                #size-cells = <0>;
 
+                               port@0 {
+                                       reg = <0>;
+                               };
+
                                port@1 {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
 
                                port@0 {
                                        reg = <0>;
-                                       du_out_rgb: endpoint {
-                                       };
                                };
 
                                port@1 {
 
                                port@1 {
                                        reg = <1>;
-                                       lvds0_out: endpoint {
-                                       };
                                };
                        };
                };
 
                                port@1 {
                                        reg = <1>;
-                                       lvds1_out: endpoint {
-                                       };
                                };
                        };
                };
                cpu-thermal {
                        polling-delay-passive = <250>;
                        polling-delay = <0>;
-                       thermal-sensors = <&thermal 0>;
+                       thermal-sensors = <&thermal>;
                        sustainable-power = <717>;
 
                        cooling-maps {
index 7b6649a3ded0299ef242c23420a0053714c4adee..3e9ced3b2d3349990bcad9219cd0d930f8b89576 100644 (file)
@@ -11,7 +11,7 @@
 
 / {
        model = "Beacon Embedded Works RZ/G2H Development Kit";
-       compatible =    "beacon,beacon-rzg2h", "renesas,r8a774e1";
+       compatible = "beacon,beacon-rzg2h", "renesas,r8a774e1";
 
        aliases {
                serial0 = &scif2;
index 8eb006cbd9af4c98f4dc28b5b12c049da83f20dc..c5a0e7866b2ffc7667111bb0f194efb2c6d9d458 100644 (file)
@@ -47,7 +47,7 @@
                clock-frequency = <0>;
        };
 
-       cluster0_opp: opp_table0 {
+       cluster0_opp: opp-table-0 {
                compatible = "operating-points-v2";
                opp-shared;
 
@@ -69,7 +69,7 @@
                };
        };
 
-       cluster1_opp: opp_table1 {
+       cluster1_opp: opp-table-1 {
                compatible = "operating-points-v2";
                opp-shared;
 
                        status = "disabled";
                };
 
-               i2c_dvfs: i2c@e60b0000 {
+               iic_pmic: i2c@e60b0000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        compatible = "renesas,iic-r8a774e1",
                                          "ch20", "ch21", "ch22", "ch23",
                                          "ch24";
                        clocks = <&cpg CPG_MOD 812>;
+                       clock-names = "fck";
                        power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
                        resets = <&cpg 812>;
                        phy-mode = "rgmii";
                        reg = <0 0xe66c0000 0 0x8000>;
                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ch_int", "g_int";
                        clocks = <&cpg CPG_MOD 914>,
                                 <&cpg CPG_CORE R8A774E1_CLK_CANFD>,
                                 <&can_clk>;
                         * clkout       : #clock-cells = <0>;   <&rcar_sound>;
                         * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
                         */
-                       compatible =  "renesas,rcar_sound-r8a774e1", "renesas,rcar_sound-gen3";
+                       compatible = "renesas,rcar_sound-r8a774e1", "renesas,rcar_sound-gen3";
                        reg = <0 0xec500000 0 0x1000>, /* SCU */
                              <0 0xec5a0000 0 0x100>,  /* ADG */
                              <0 0xec540000 0 0x1000>, /* SSIU */
                                        dma-names = "rx", "tx";
                                };
                                ssiu40: ssiu-32 {
-                                       dmas =  <&audma0 0x71>, <&audma1 0x72>;
+                                       dmas = <&audma0 0x71>, <&audma1 0x72>;
                                        dma-names = "rx", "tx";
                                };
                                ssiu41: ssiu-33 {
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee100000 0 0x2000>;
                        interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 314>;
+                       clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A774E1_CLK_SD0H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
                        resets = <&cpg 314>;
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee120000 0 0x2000>;
                        interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 313>;
+                       clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A774E1_CLK_SD1H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
                        resets = <&cpg 313>;
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee140000 0 0x2000>;
                        interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 312>;
+                       clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A774E1_CLK_SD2H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
                        resets = <&cpg 312>;
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee160000 0 0x2000>;
                        interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 311>;
+                       clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A774E1_CLK_SD3H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
                        resets = <&cpg 311>;
                        reg-names = "regs", "dirmap", "wbuf";
                        interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 917>;
-                       clock-names = "rpc";
                        power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
                        resets = <&cpg 917>;
                        #address-cells = <1>;
                                #address-cells = <1>;
                                #size-cells = <0>;
 
+                               port@0 {
+                                       reg = <0>;
+                               };
+
                                port@1 {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
                                #address-cells = <1>;
                                #size-cells = <0>;
 
+                               port@0 {
+                                       reg = <0>;
+                               };
+
                                port@1 {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
 
                                port@0 {
                                        reg = <0>;
-                                       du_out_rgb: endpoint {
-                                       };
                                };
                                port@1 {
                                        reg = <1>;
                                };
                                port@1 {
                                        reg = <1>;
-                                       lvds0_out: endpoint {
-                                       };
                                };
                        };
                };
        };
 
        thermal-zones {
-               sensor_thermal1: sensor-thermal1 {
+               sensor1_thermal: sensor1-thermal {
                        polling-delay-passive = <250>;
                        polling-delay = <1000>;
                        thermal-sensors = <&tsc 0>;
                        };
                };
 
-               sensor_thermal2: sensor-thermal2 {
+               sensor2_thermal: sensor2-thermal {
                        polling-delay-passive = <250>;
                        polling-delay = <1000>;
                        thermal-sensors = <&tsc 1>;
                        };
                };
 
-               sensor_thermal3: sensor-thermal3 {
+               sensor3_thermal: sensor3-thermal {
                        polling-delay-passive = <250>;
                        polling-delay = <1000>;
                        thermal-sensors = <&tsc 2>;
index 097fd9317c6e2966eded5dfbe605651271e3ee3f..5ad5349a50dc9b2630deafdb7911fb6910e3400f 100644 (file)
@@ -53,6 +53,9 @@
                i2c11 = &i2cexio1;
                i2c12 = &i2chdmi;
                i2c13 = &i2cpwr;
+               mmc0 = &mmcif1;
+               mmc1 = &sdhi0;
+               mmc2 = &sdhi2;
        };
 
        chosen {
@@ -78,6 +81,9 @@
        keyboard {
                compatible = "gpio-keys";
 
+               pinctrl-0 = <&keyboard_pins>;
+               pinctrl-names = "default";
+
                one {
                        linux,code = <KEY_1>;
                        label = "SW2-1";
                composite-in@20 {
                        compatible = "adi,adv7180";
                        reg = <0x20>;
-                       remote = <&vin1>;
 
                        port {
                                adv7180: endpoint {
                        adi,input-depth = <8>;
                        adi,input-colorspace = "rgb";
                        adi,input-clock = "1x";
-                       adi,input-style = <1>;
-                       adi,input-justification = "evenly";
 
                        ports {
                                #address-cells = <1>;
                                compatible = "dlg,da9063-rtc";
                        };
 
-                       wdt {
+                       watchdog {
                                compatible = "dlg,da9063-watchdog";
                        };
                };
                groups = "audio_clk_a";
                function = "audio_clk";
        };
+
+       keyboard_pins: keyboard {
+               pins = "GP_1_14", "GP_1_24", "GP_1_26", "GP_1_28";
+               bias-pull-up;
+       };
 };
 
 &ether {
-       pinctrl-0 = <&ether_pins &phy1_pins>;
+       pinctrl-0 = <&ether_pins>, <&phy1_pins>;
        pinctrl-names = "default";
 
        phy-handle = <&phy1>;
        status = "okay";
 
        phy1: ethernet-phy@1 {
+               compatible = "ethernet-phy-id0022.1537",
+                            "ethernet-phy-ieee802.3-c22";
                reg = <1>;
                interrupt-parent = <&irqc0>;
                interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
                micrel,led-mode = <1>;
+               reset-gpios = <&gpio5 31 GPIO_ACTIVE_LOW>;
        };
 };
 
 };
 
 &rcar_sound {
-       pinctrl-0 = <&sound_pins &sound_clk_pins>;
+       pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
        pinctrl-names = "default";
 
        /* Single DAI */
 
        rcar_sound,dai {
                dai0 {
-                       playback = <&ssi0 &src2 &dvc0>;
-                       capture  = <&ssi1 &src3 &dvc1>;
+                       playback = <&ssi0>, <&src2>, <&dvc0>;
+                       capture  = <&ssi1>, <&src3>, <&dvc1>;
                };
        };
 };
index a315ba749aa44176608719d8a0a7958af8f262c0..fe14727eefe1ec8caddc3a46d7c3eaef2f80d57c 100644 (file)
 };
 
 &ether {
-       pinctrl-0 = <&ether_pins &phy1_pins>;
+       pinctrl-0 = <&ether_pins>, <&phy1_pins>;
        pinctrl-names = "default";
 
        phy-handle = <&phy1>;
        status = "okay";
 
        phy1: ethernet-phy@1 {
+               compatible = "ethernet-phy-id0022.1537",
+                            "ethernet-phy-ieee802.3-c22";
                reg = <1>;
                interrupt-parent = <&irqc0>;
                interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
                micrel,led-mode = <1>;
+               reset-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
        };
 };
 
                adi,input-depth = <8>;
                adi,input-colorspace = "rgb";
                adi,input-clock = "1x";
-               adi,input-style = <1>;
-               adi,input-justification = "evenly";
 
                ports {
                        #address-cells = <1>;
 
 &iic3 {
        pinctrl-names = "default";
-       pinctrl-0 = <&iic3_pins &pmic_irq_pins>;
+       pinctrl-0 = <&iic3_pins>, <&pmic_irq_pins>;
        status = "okay";
 
        pmic@58 {
                        compatible = "dlg,da9063-rtc";
                };
 
-               wdt {
+               watchdog {
                        compatible = "dlg,da9063-watchdog";
                };
        };
index 334ba19769b998ac8968a0e08a76ef052b5cb01b..db171e3c62f25eb879ab7f2755832bd455e16547 100644 (file)
@@ -69,7 +69,6 @@
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
-               enable-method = "renesas,apmu";
 
                cpu0: cpu@0 {
                        device_type = "cpu";
@@ -78,6 +77,7 @@
                        clock-frequency = <1300000000>;
                        clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
                        power-domains = <&sysc R8A7790_PD_CA15_CPU0>;
+                       enable-method = "renesas,apmu";
                        next-level-cache = <&L2_CA15>;
                        capacity-dmips-mhz = <1024>;
                        voltage-tolerance = <1>; /* 1% */
@@ -99,6 +99,7 @@
                        clock-frequency = <1300000000>;
                        clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
                        power-domains = <&sysc R8A7790_PD_CA15_CPU1>;
+                       enable-method = "renesas,apmu";
                        next-level-cache = <&L2_CA15>;
                        capacity-dmips-mhz = <1024>;
                        voltage-tolerance = <1>; /* 1% */
                        clock-frequency = <1300000000>;
                        clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
                        power-domains = <&sysc R8A7790_PD_CA15_CPU2>;
+                       enable-method = "renesas,apmu";
                        next-level-cache = <&L2_CA15>;
                        capacity-dmips-mhz = <1024>;
                        voltage-tolerance = <1>; /* 1% */
                        clock-frequency = <1300000000>;
                        clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
                        power-domains = <&sysc R8A7790_PD_CA15_CPU3>;
+                       enable-method = "renesas,apmu";
                        next-level-cache = <&L2_CA15>;
                        capacity-dmips-mhz = <1024>;
                        voltage-tolerance = <1>; /* 1% */
                        clock-frequency = <780000000>;
                        clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
                        power-domains = <&sysc R8A7790_PD_CA7_CPU0>;
+                       enable-method = "renesas,apmu";
                        next-level-cache = <&L2_CA7>;
                        capacity-dmips-mhz = <539>;
                };
                        clock-frequency = <780000000>;
                        clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
                        power-domains = <&sysc R8A7790_PD_CA7_CPU1>;
+                       enable-method = "renesas,apmu";
                        next-level-cache = <&L2_CA7>;
                        capacity-dmips-mhz = <539>;
                };
                        clock-frequency = <780000000>;
                        clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
                        power-domains = <&sysc R8A7790_PD_CA7_CPU2>;
+                       enable-method = "renesas,apmu";
                        next-level-cache = <&L2_CA7>;
                        capacity-dmips-mhz = <539>;
                };
                        clock-frequency = <780000000>;
                        clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
                        power-domains = <&sysc R8A7790_PD_CA7_CPU3>;
+                       enable-method = "renesas,apmu";
                        next-level-cache = <&L2_CA7>;
                        capacity-dmips-mhz = <539>;
                };
                        compatible = "renesas,r8a7790-wdt",
                                     "renesas,rcar-gen2-wdt";
                        reg = <0 0xe6020000 0 0x0c>;
+                       interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 402>;
                        power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
                        resets = <&cpg 402>;
                        resets = <&cpg 907>;
                };
 
-               pfc: pin-controller@e6060000 {
+               pfc: pinctrl@e6060000 {
                        compatible = "renesas,pfc-r8a7790";
                        reg = <0 0xe6060000 0 0x250>;
                };
                apmu@e6151000 {
                        compatible = "renesas,r8a7790-apmu", "renesas,apmu";
                        reg = <0 0xe6151000 0 0x188>;
-                       cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
+                       cpus = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
                };
 
                apmu@e6152000 {
                        compatible = "renesas,r8a7790-apmu", "renesas,apmu";
                        reg = <0 0xe6152000 0 0x188>;
-                       cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
+                       cpus = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
                };
 
                rst: reset-controller@e6160000 {
                        #thermal-sensor-cells = <0>;
                };
 
-               ipmmu_sy0: mmu@e6280000 {
+               ipmmu_sy0: iommu@e6280000 {
                        compatible = "renesas,ipmmu-r8a7790",
                                     "renesas,ipmmu-vmsa";
                        reg = <0 0xe6280000 0 0x1000>;
                        status = "disabled";
                };
 
-               ipmmu_sy1: mmu@e6290000 {
+               ipmmu_sy1: iommu@e6290000 {
                        compatible = "renesas,ipmmu-r8a7790",
                                     "renesas,ipmmu-vmsa";
                        reg = <0 0xe6290000 0 0x1000>;
                        status = "disabled";
                };
 
-               ipmmu_ds: mmu@e6740000 {
+               ipmmu_ds: iommu@e6740000 {
                        compatible = "renesas,ipmmu-r8a7790",
                                     "renesas,ipmmu-vmsa";
                        reg = <0 0xe6740000 0 0x1000>;
                        status = "disabled";
                };
 
-               ipmmu_mp: mmu@ec680000 {
+               ipmmu_mp: iommu@ec680000 {
                        compatible = "renesas,ipmmu-r8a7790",
                                     "renesas,ipmmu-vmsa";
                        reg = <0 0xec680000 0 0x1000>;
                        status = "disabled";
                };
 
-               ipmmu_mx: mmu@fe951000 {
+               ipmmu_mx: iommu@fe951000 {
                        compatible = "renesas,ipmmu-r8a7790",
                                     "renesas,ipmmu-vmsa";
                        reg = <0 0xfe951000 0 0x1000>;
                        status = "disabled";
                };
 
-               ipmmu_rt: mmu@ffc80000 {
+               ipmmu_rt: iommu@ffc80000 {
                        compatible = "renesas,ipmmu-r8a7790",
                                     "renesas,ipmmu-vmsa";
                        reg = <0 0xffc80000 0 0x1000>;
                        status = "disabled";
                };
 
-               usbphy: usb-phy@e6590100 {
+               usbphy: usb-phy-controller@e6590100 {
                        compatible = "renesas,usb-phy-r8a7790",
                                     "renesas,rcar-gen2-usb-phy";
                        reg = <0 0xe6590100 0 0x100>;
                        resets = <&cpg 704>;
                        status = "disabled";
 
-                       usb0: usb-channel@0 {
+                       usb0: usb-phy@0 {
                                reg = <0>;
                                #phy-cells = <1>;
                        };
-                       usb2: usb-channel@2 {
+                       usb2: usb-phy@2 {
                                reg = <2>;
                                #phy-cells = <1>;
                        };
                        reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
                        interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 812>;
+                       clock-names = "fck";
                        power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
                        resets = <&cpg 812>;
                        #address-cells = <1>;
                        };
                };
 
-               sdhi0: sd@ee100000 {
+               sdhi0: mmc@ee100000 {
                        compatible = "renesas,sdhi-r8a7790",
                                     "renesas,rcar-gen2-sdhi";
                        reg = <0 0xee100000 0 0x328>;
                        status = "disabled";
                };
 
-               sdhi1: sd@ee120000 {
+               sdhi1: mmc@ee120000 {
                        compatible = "renesas,sdhi-r8a7790",
                                     "renesas,rcar-gen2-sdhi";
                        reg = <0 0xee120000 0 0x328>;
                        status = "disabled";
                };
 
-               sdhi2: sd@ee140000 {
+               sdhi2: mmc@ee140000 {
                        compatible = "renesas,sdhi-r8a7790",
                                     "renesas,rcar-gen2-sdhi";
                        reg = <0 0xee140000 0 0x100>;
                        status = "disabled";
                };
 
-               sdhi3: sd@ee160000 {
+               sdhi3: mmc@ee160000 {
                        compatible = "renesas,sdhi-r8a7790",
                                     "renesas,rcar-gen2-sdhi";
                        reg = <0 0xee160000 0 0x100>;
                        clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
                                 <&cpg CPG_MOD 722>;
                        clock-names = "du.0", "du.1", "du.2";
+                       resets = <&cpg 724>;
+                       reset-names = "du.0";
                        status = "disabled";
 
                        ports {
index 2b096d5e06fb0499b215f0912f65326d0cee8f66..26a40782cc899bd0ebe74df0ca5f91f099dde72f 100644 (file)
@@ -53,6 +53,9 @@
                i2c12 = &i2cexio1;
                i2c13 = &i2chdmi;
                i2c14 = &i2cexio4;
+               mmc0 = &sdhi0;
+               mmc1 = &sdhi1;
+               mmc2 = &sdhi2;
        };
 
        chosen {
@@ -78,6 +81,9 @@
        keyboard {
                compatible = "gpio-keys";
 
+               pinctrl-0 = <&keyboard_pins>;
+               pinctrl-names = "default";
+
                key-1 {
                        gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
                        linux,code = <KEY_1>;
                composite-in@20 {
                        compatible = "adi,adv7180";
                        reg = <0x20>;
-                       remote = <&vin1>;
 
                        port {
                                adv7180: endpoint {
                        adi,input-depth = <8>;
                        adi,input-colorspace = "rgb";
                        adi,input-clock = "1x";
-                       adi,input-style = <1>;
-                       adi,input-justification = "evenly";
 
                        ports {
                                #address-cells = <1>;
                groups = "audio_clk_a";
                function = "audio_clk";
        };
+
+       keyboard_pins: keyboard {
+               pins = "GP_5_0", "GP_5_1", "GP_5_2", "GP_5_3";
+               bias-pull-up;
+       };
 };
 
 &ether {
-       pinctrl-0 = <&ether_pins &phy1_pins>;
+       pinctrl-0 = <&ether_pins>, <&phy1_pins>;
        pinctrl-names = "default";
 
        phy-handle = <&phy1>;
        status = "okay";
 
        phy1: ethernet-phy@1 {
+               compatible = "ethernet-phy-id0022.1537",
+                            "ethernet-phy-ieee802.3-c22";
                reg = <1>;
                interrupt-parent = <&irqc0>;
                interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
                micrel,led-mode = <1>;
+               reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
        };
 };
 
                        compatible = "dlg,da9063-rtc";
                };
 
-               wdt {
+               watchdog {
                        compatible = "dlg,da9063-watchdog";
                };
        };
 };
 
 &rcar_sound {
-       pinctrl-0 = <&sound_pins &sound_clk_pins>;
+       pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
        pinctrl-names = "default";
 
        /* Single DAI */
 
        rcar_sound,dai {
                dai0 {
-                       playback = <&ssi0 &src2 &dvc0>;
-                       capture  = <&ssi1 &src3 &dvc1>;
+                       playback = <&ssi0>, <&src2>, <&dvc0>;
+                       capture  = <&ssi1>, <&src3>, <&dvc1>;
                };
        };
 };
index f9ece7ab2010679a942b987c00c45b85775f529d..ec0a20d5130d6f0491a75d737973d7ae67f47ca6 100644 (file)
@@ -28,6 +28,8 @@
                serial0 = &scif0;
                i2c9 = &gpioi2c2;
                i2c10 = &i2chdmi;
+               mmc0 = &sdhi0;
+               mmc1 = &sdhi2;
        };
 
        chosen {
                composite-in@20 {
                        compatible = "adi,adv7180";
                        reg = <0x20>;
-                       remote = <&vin0>;
 
                        port {
                                adv7180: endpoint {
                        adi,input-depth = <8>;
                        adi,input-colorspace = "rgb";
                        adi,input-clock = "1x";
-                       adi,input-style = <1>;
-                       adi,input-justification = "evenly";
 
                        ports {
                                #address-cells = <1>;
 };
 
 &ether {
-       pinctrl-0 = <&ether_pins &phy1_pins>;
+       pinctrl-0 = <&ether_pins>, <&phy1_pins>;
        pinctrl-names = "default";
 
        phy-handle = <&phy1>;
        status = "okay";
 
        phy1: ethernet-phy@1 {
+               compatible = "ethernet-phy-id0022.1537",
+                            "ethernet-phy-ieee802.3-c22";
                reg = <1>;
                interrupt-parent = <&irqc0>;
                interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
                micrel,led-mode = <1>;
+               reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
        };
 };
 
                interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
                interrupt-controller;
 
-               wdt {
+               watchdog {
                        compatible = "dlg,da9063-watchdog";
                };
        };
 };
 
 &rcar_sound {
-       pinctrl-0 = <&ssi_pins &audio_clk_pins>;
+       pinctrl-0 = <&ssi_pins>, <&audio_clk_pins>;
        pinctrl-names = "default";
        status = "okay";
 
index 59a55e87fcc693dfc472c5e67264d0417af230b9..d8f91d9f42aeed8a024bf5b6b4f7bf6db01fd176 100644 (file)
@@ -68,7 +68,6 @@
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
-               enable-method = "renesas,apmu";
 
                cpu0: cpu@0 {
                        device_type = "cpu";
@@ -77,6 +76,7 @@
                        clock-frequency = <1500000000>;
                        clocks = <&cpg CPG_CORE R8A7791_CLK_Z>;
                        power-domains = <&sysc R8A7791_PD_CA15_CPU0>;
+                       enable-method = "renesas,apmu";
                        next-level-cache = <&L2_CA15>;
                        voltage-tolerance = <1>; /* 1% */
                        clock-latency = <300000>; /* 300 us */
@@ -97,6 +97,7 @@
                        clock-frequency = <1500000000>;
                        clocks = <&cpg CPG_CORE R8A7791_CLK_Z>;
                        power-domains = <&sysc R8A7791_PD_CA15_CPU1>;
+                       enable-method = "renesas,apmu";
                        next-level-cache = <&L2_CA15>;
                        voltage-tolerance = <1>; /* 1% */
                        clock-latency = <300000>; /* 300 us */
                        compatible = "renesas,r8a7791-wdt",
                                     "renesas,rcar-gen2-wdt";
                        reg = <0 0xe6020000 0 0x0c>;
+                       interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 402>;
                        power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
                        resets = <&cpg 402>;
                        resets = <&cpg 904>;
                };
 
-               pfc: pin-controller@e6060000 {
+               pfc: pinctrl@e6060000 {
                        compatible = "renesas,pfc-r8a7791";
                        reg = <0 0xe6060000 0 0x250>;
                };
 
+               tpu: pwm@e60f0000 {
+                       compatible = "renesas,tpu-r8a7791", "renesas,tpu";
+                       reg = <0 0xe60f0000 0 0x148>;
+                       interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 304>;
+                       power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+                       resets = <&cpg 304>;
+                       #pwm-cells = <3>;
+                       status = "disabled";
+               };
+
                cpg: clock-controller@e6150000 {
                        compatible = "renesas,r8a7791-cpg-mssr";
                        reg = <0 0xe6150000 0 0x1000>;
                apmu@e6152000 {
                        compatible = "renesas,r8a7791-apmu", "renesas,apmu";
                        reg = <0 0xe6152000 0 0x188>;
-                       cpus = <&cpu0 &cpu1>;
+                       cpus = <&cpu0>, <&cpu1>;
                };
 
                rst: reset-controller@e6160000 {
                        #thermal-sensor-cells = <0>;
                };
 
-               ipmmu_sy0: mmu@e6280000 {
+               ipmmu_sy0: iommu@e6280000 {
                        compatible = "renesas,ipmmu-r8a7791",
                                     "renesas,ipmmu-vmsa";
                        reg = <0 0xe6280000 0 0x1000>;
                        status = "disabled";
                };
 
-               ipmmu_sy1: mmu@e6290000 {
+               ipmmu_sy1: iommu@e6290000 {
                        compatible = "renesas,ipmmu-r8a7791",
                                     "renesas,ipmmu-vmsa";
                        reg = <0 0xe6290000 0 0x1000>;
                        status = "disabled";
                };
 
-               ipmmu_ds: mmu@e6740000 {
+               ipmmu_ds: iommu@e6740000 {
                        compatible = "renesas,ipmmu-r8a7791",
                                     "renesas,ipmmu-vmsa";
                        reg = <0 0xe6740000 0 0x1000>;
                        status = "disabled";
                };
 
-               ipmmu_mp: mmu@ec680000 {
+               ipmmu_mp: iommu@ec680000 {
                        compatible = "renesas,ipmmu-r8a7791",
                                     "renesas,ipmmu-vmsa";
                        reg = <0 0xec680000 0 0x1000>;
                        status = "disabled";
                };
 
-               ipmmu_mx: mmu@fe951000 {
+               ipmmu_mx: iommu@fe951000 {
                        compatible = "renesas,ipmmu-r8a7791",
                                     "renesas,ipmmu-vmsa";
                        reg = <0 0xfe951000 0 0x1000>;
                        status = "disabled";
                };
 
-               ipmmu_rt: mmu@ffc80000 {
+               ipmmu_rt: iommu@ffc80000 {
                        compatible = "renesas,ipmmu-r8a7791",
                                     "renesas,ipmmu-vmsa";
                        reg = <0 0xffc80000 0 0x1000>;
                        status = "disabled";
                };
 
-               ipmmu_gp: mmu@e62a0000 {
+               ipmmu_gp: iommu@e62a0000 {
                        compatible = "renesas,ipmmu-r8a7791",
                                     "renesas,ipmmu-vmsa";
                        reg = <0 0xe62a0000 0 0x1000>;
                        status = "disabled";
                };
 
-               usbphy: usb-phy@e6590100 {
+               usbphy: usb-phy-controller@e6590100 {
                        compatible = "renesas,usb-phy-r8a7791",
                                     "renesas,rcar-gen2-usb-phy";
                        reg = <0 0xe6590100 0 0x100>;
                        resets = <&cpg 704>;
                        status = "disabled";
 
-                       usb0: usb-channel@0 {
+                       usb0: usb-phy@0 {
                                reg = <0>;
                                #phy-cells = <1>;
                        };
-                       usb2: usb-channel@2 {
+                       usb2: usb-phy@2 {
                                reg = <2>;
                                #phy-cells = <1>;
                        };
                        reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
                        interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 812>;
+                       clock-names = "fck";
                        power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
                        resets = <&cpg 812>;
                        #address-cells = <1>;
                        status = "disabled";
                };
 
+               pwm0: pwm@e6e30000 {
+                       compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar";
+                       reg = <0 0xe6e30000 0 0x8>;
+                       clocks = <&cpg CPG_MOD 523>;
+                       power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+                       resets = <&cpg 523>;
+                       #pwm-cells = <2>;
+                       status = "disabled";
+               };
+
+               pwm1: pwm@e6e31000 {
+                       compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar";
+                       reg = <0 0xe6e31000 0 0x8>;
+                       clocks = <&cpg CPG_MOD 523>;
+                       power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+                       resets = <&cpg 523>;
+                       #pwm-cells = <2>;
+                       status = "disabled";
+               };
+
+               pwm2: pwm@e6e32000 {
+                       compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar";
+                       reg = <0 0xe6e32000 0 0x8>;
+                       clocks = <&cpg CPG_MOD 523>;
+                       power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+                       resets = <&cpg 523>;
+                       #pwm-cells = <2>;
+                       status = "disabled";
+               };
+
+               pwm3: pwm@e6e33000 {
+                       compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar";
+                       reg = <0 0xe6e33000 0 0x8>;
+                       clocks = <&cpg CPG_MOD 523>;
+                       power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+                       resets = <&cpg 523>;
+                       #pwm-cells = <2>;
+                       status = "disabled";
+               };
+
+               pwm4: pwm@e6e34000 {
+                       compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar";
+                       reg = <0 0xe6e34000 0 0x8>;
+                       clocks = <&cpg CPG_MOD 523>;
+                       power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+                       resets = <&cpg 523>;
+                       #pwm-cells = <2>;
+                       status = "disabled";
+               };
+
+               pwm5: pwm@e6e35000 {
+                       compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar";
+                       reg = <0 0xe6e35000 0 0x8>;
+                       clocks = <&cpg CPG_MOD 523>;
+                       power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+                       resets = <&cpg 523>;
+                       #pwm-cells = <2>;
+                       status = "disabled";
+               };
+
+               pwm6: pwm@e6e36000 {
+                       compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar";
+                       reg = <0 0xe6e36000 0 0x8>;
+                       clocks = <&cpg CPG_MOD 523>;
+                       power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+                       resets = <&cpg 523>;
+                       #pwm-cells = <2>;
+                       status = "disabled";
+               };
+
                adc: adc@e6e54000 {
                        compatible = "renesas,r8a7791-gyroadc",
                                     "renesas,rcar-gyroadc";
                        };
                };
 
-               sdhi0: sd@ee100000 {
+               sdhi0: mmc@ee100000 {
                        compatible = "renesas,sdhi-r8a7791",
                                     "renesas,rcar-gen2-sdhi";
                        reg = <0 0xee100000 0 0x328>;
                        status = "disabled";
                };
 
-               sdhi1: sd@ee140000 {
+               sdhi1: mmc@ee140000 {
                        compatible = "renesas,sdhi-r8a7791",
                                     "renesas,rcar-gen2-sdhi";
                        reg = <0 0xee140000 0 0x100>;
                        status = "disabled";
                };
 
-               sdhi2: sd@ee160000 {
+               sdhi2: mmc@ee160000 {
                        compatible = "renesas,sdhi-r8a7791",
                                     "renesas,rcar-gen2-sdhi";
                        reg = <0 0xee160000 0 0x100>;
                        reg = <0 0xfeb00000 0 0x40000>;
                        interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 724>,
-                                <&cpg CPG_MOD 723>;
+                       clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
                        clock-names = "du.0", "du.1";
+                       resets = <&cpg 724>;
+                       reset-names = "du.0";
                        status = "disabled";
 
                        ports {
index 248eb717eb3500b6d5963b76a395cf7b05fbb572..c66de9dd12dfca3880b7d6b54b0e739da02fdf87 100644 (file)
        keyboard {
                compatible = "gpio-keys";
 
+               pinctrl-0 = <&keyboard_pins>;
+               pinctrl-names = "default";
+
                key-1 {
                        linux,code = <KEY_1>;
                        label = "SW2-1";
                function = "du1";
        };
 
+       keyboard_pins: keyboard {
+               pins = "GP_3_10", "GP_3_11", "GP_3_12", "GP_3_15", "GP_11_02";
+               bias-pull-up;
+       };
+
        pmic_irq_pins: pmicirq {
                groups = "intc_irq2";
                function = "intc";
                adi,input-depth = <8>;
                adi,input-colorspace = "rgb";
                adi,input-clock = "1x";
-               adi,input-style = <1>;
-               adi,input-justification = "evenly";
 
                ports {
                        #address-cells = <1>;
                        compatible = "dlg,da9063-rtc";
                };
 
-               wdt {
+               watchdog {
                        compatible = "dlg,da9063-watchdog";
                };
        };
 };
 
 &du {
-       pinctrl-0 = <&du0_pins &du1_pins>;
+       pinctrl-0 = <&du0_pins>, <&du1_pins>;
        pinctrl-names = "default";
 
        clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&x1_clk>, <&x2_clk>;
index 39af16caa2aef5011791fddd3237ec93ec8967cf..a6d9367f8fa047be028441f157ac81898b53db1b 100644 (file)
@@ -45,7 +45,6 @@
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
-               enable-method = "renesas,apmu";
 
                cpu0: cpu@0 {
                        device_type = "cpu";
@@ -54,6 +53,7 @@
                        clock-frequency = <1000000000>;
                        clocks = <&cpg CPG_CORE R8A7792_CLK_Z>;
                        power-domains = <&sysc R8A7792_PD_CA15_CPU0>;
+                       enable-method = "renesas,apmu";
                        next-level-cache = <&L2_CA15>;
                };
 
@@ -64,6 +64,7 @@
                        clock-frequency = <1000000000>;
                        clocks = <&cpg CPG_CORE R8A7792_CLK_Z>;
                        power-domains = <&sysc R8A7792_PD_CA15_CPU1>;
+                       enable-method = "renesas,apmu";
                        next-level-cache = <&L2_CA15>;
                };
 
                        compatible = "renesas,r8a7792-wdt",
                                     "renesas,rcar-gen2-wdt";
                        reg = <0 0xe6020000 0 0x0c>;
+                       interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 402>;
                        power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
                        resets = <&cpg 402>;
                        resets = <&cpg 913>;
                };
 
-               pfc: pin-controller@e6060000 {
+               pfc: pinctrl@e6060000 {
                        compatible = "renesas,pfc-r8a7792";
                        reg = <0 0xe6060000 0 0x144>;
                };
                apmu@e6152000 {
                        compatible = "renesas,r8a7792-apmu", "renesas,apmu";
                        reg = <0 0xe6152000 0 0x188>;
-                       cpus = <&cpu0 &cpu1>;
+                       cpus = <&cpu0>, <&cpu1>;
                };
 
                rst: reset-controller@e6160000 {
                        reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
                        interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 812>;
+                       clock-names = "fck";
                        power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
                        resets = <&cpg 812>;
                        #address-cells = <1>;
                        status = "disabled";
                };
 
-               sdhi0: sd@ee100000 {
+               sdhi0: mmc@ee100000 {
                        compatible = "renesas,sdhi-r8a7792",
                                     "renesas,rcar-gen2-sdhi";
                        reg = <0 0xee100000 0 0x328>;
                        reg = <0 0xfeb00000 0 0x40000>;
                        interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 724>,
-                                <&cpg CPG_MOD 723>;
+                       clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
                        clock-names = "du.0", "du.1";
+                       resets = <&cpg 724>;
+                       reset-names = "du.0";
                        status = "disabled";
 
                        ports {
index 22ca7cd1e7d23ec936b8494d860b50ae9f6a93ad..79b537b24642662d2954a12dd06d2a88d5f28025 100644 (file)
@@ -49,6 +49,9 @@
                i2c10 = &gpioi2c4;
                i2c11 = &i2chdmi;
                i2c12 = &i2cexio4;
+               mmc0 = &sdhi0;
+               mmc1 = &sdhi1;
+               mmc2 = &sdhi2;
        };
 
        chosen {
                reg = <0 0x40000000 0 0x40000000>;
        };
 
-       gpio-keys {
+       keyboard {
                compatible = "gpio-keys";
 
+               pinctrl-0 = <&keyboard_pins>;
+               pinctrl-names = "default";
+
                key-1 {
                        gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
                        linux,code = <KEY_1>;
                composite-in@20 {
                        compatible = "adi,adv7180cp";
                        reg = <0x20>;
-                       remote = <&vin1>;
 
-                       port {
+                       ports {
                                #address-cells = <1>;
                                #size-cells = <0>;
 
                        adi,input-depth = <8>;
                        adi,input-colorspace = "rgb";
                        adi,input-clock = "1x";
-                       adi,input-style = <1>;
-                       adi,input-justification = "evenly";
 
                        ports {
                                #address-cells = <1>;
                        interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
                        default-input = <0>;
 
-                       port {
+                       ports {
                                #address-cells = <1>;
                                #size-cells = <0>;
 
                function = "audio_clk";
        };
 
+       keyboard_pins: keyboard {
+               pins = "GP_5_0", "GP_5_1", "GP_5_2", "GP_5_3";
+               bias-pull-up;
+       };
+
        vin0_pins: vin0 {
                groups = "vin0_data24", "vin0_sync", "vin0_clkenb", "vin0_clk";
                function = "vin0";
 };
 
 &ether {
-       pinctrl-0 = <&ether_pins &phy1_pins>;
+       pinctrl-0 = <&ether_pins>, <&phy1_pins>;
        pinctrl-names = "default";
 
        phy-handle = <&phy1>;
        status = "okay";
 
        phy1: ethernet-phy@1 {
+               compatible = "ethernet-phy-id0022.1537",
+                            "ethernet-phy-ieee802.3-c22";
                reg = <1>;
                interrupt-parent = <&irqc0>;
                interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
                micrel,led-mode = <1>;
+               reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
        };
 };
 
                        compatible = "dlg,da9063-rtc";
                };
 
-               wdt {
+               watchdog {
                        compatible = "dlg,da9063-watchdog";
                };
        };
 };
 
 &rcar_sound {
-       pinctrl-0 = <&sound_pins &sound_clk_pins>;
+       pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
        pinctrl-names = "default";
 
        /* Single DAI */
 
        rcar_sound,dai {
                dai0 {
-                       playback = <&ssi0 &src2 &dvc0>;
-                       capture  = <&ssi1 &src3 &dvc1>;
+                       playback = <&ssi0>, <&src2>, <&dvc0>;
+                       capture  = <&ssi1>, <&src3>, <&dvc1>;
                };
        };
 };
index eef035c4d98341b648b0c11d48bc32028486be19..9ebe7bfaf0ed0a3a0474fd908d19269b5e43cc4f 100644 (file)
@@ -60,7 +60,6 @@
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
-               enable-method = "renesas,apmu";
 
                cpu0: cpu@0 {
                        device_type = "cpu";
@@ -69,6 +68,7 @@
                        clock-frequency = <1500000000>;
                        clocks = <&cpg CPG_CORE R8A7793_CLK_Z>;
                        power-domains = <&sysc R8A7793_PD_CA15_CPU0>;
+                       enable-method = "renesas,apmu";
                        voltage-tolerance = <1>; /* 1% */
                        clock-latency = <300000>; /* 300 us */
 
@@ -89,6 +89,7 @@
                        clock-frequency = <1500000000>;
                        clocks = <&cpg CPG_CORE R8A7793_CLK_Z>;
                        power-domains = <&sysc R8A7793_PD_CA15_CPU1>;
+                       enable-method = "renesas,apmu";
                        voltage-tolerance = <1>; /* 1% */
                        clock-latency = <300000>; /* 300 us */
 
                        compatible = "renesas,r8a7793-wdt",
                                     "renesas,rcar-gen2-wdt";
                        reg = <0 0xe6020000 0 0x0c>;
+                       interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 402>;
                        power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                        resets = <&cpg 402>;
                        resets = <&cpg 904>;
                };
 
-               pfc: pin-controller@e6060000 {
+               pfc: pinctrl@e6060000 {
                        compatible = "renesas,pfc-r8a7793";
                        reg = <0 0xe6060000 0 0x250>;
                };
                apmu@e6152000 {
                        compatible = "renesas,r8a7793-apmu", "renesas,apmu";
                        reg = <0 0xe6152000 0 0x188>;
-                       cpus = <&cpu0 &cpu1>;
+                       cpus = <&cpu0>, <&cpu1>;
                };
 
                rst: reset-controller@e6160000 {
                        #thermal-sensor-cells = <0>;
                };
 
-               ipmmu_sy0: mmu@e6280000 {
+               ipmmu_sy0: iommu@e6280000 {
                        compatible = "renesas,ipmmu-r8a7793",
                                     "renesas,ipmmu-vmsa";
                        reg = <0 0xe6280000 0 0x1000>;
                        status = "disabled";
                };
 
-               ipmmu_sy1: mmu@e6290000 {
+               ipmmu_sy1: iommu@e6290000 {
                        compatible = "renesas,ipmmu-r8a7793",
                                     "renesas,ipmmu-vmsa";
                        reg = <0 0xe6290000 0 0x1000>;
                        status = "disabled";
                };
 
-               ipmmu_ds: mmu@e6740000 {
+               ipmmu_ds: iommu@e6740000 {
                        compatible = "renesas,ipmmu-r8a7793",
                                     "renesas,ipmmu-vmsa";
                        reg = <0 0xe6740000 0 0x1000>;
                        status = "disabled";
                };
 
-               ipmmu_mp: mmu@ec680000 {
+               ipmmu_mp: iommu@ec680000 {
                        compatible = "renesas,ipmmu-r8a7793",
                                     "renesas,ipmmu-vmsa";
                        reg = <0 0xec680000 0 0x1000>;
                        status = "disabled";
                };
 
-               ipmmu_mx: mmu@fe951000 {
+               ipmmu_mx: iommu@fe951000 {
                        compatible = "renesas,ipmmu-r8a7793",
                                     "renesas,ipmmu-vmsa";
                        reg = <0 0xfe951000 0 0x1000>;
                        status = "disabled";
                };
 
-               ipmmu_rt: mmu@ffc80000 {
+               ipmmu_rt: iommu@ffc80000 {
                        compatible = "renesas,ipmmu-r8a7793",
                                     "renesas,ipmmu-vmsa";
                        reg = <0 0xffc80000 0 0x1000>;
                        status = "disabled";
                };
 
-               ipmmu_gp: mmu@e62a0000 {
+               ipmmu_gp: iommu@e62a0000 {
                        compatible = "renesas,ipmmu-r8a7793",
                                     "renesas,ipmmu-vmsa";
                        reg = <0 0xe62a0000 0 0x1000>;
                        dma-channels = <13>;
                };
 
-               sdhi0: sd@ee100000 {
+               sdhi0: mmc@ee100000 {
                        compatible = "renesas,sdhi-r8a7793",
                                     "renesas,rcar-gen2-sdhi";
                        reg = <0 0xee100000 0 0x328>;
                        status = "disabled";
                };
 
-               sdhi1: sd@ee140000 {
+               sdhi1: mmc@ee140000 {
                        compatible = "renesas,sdhi-r8a7793",
                                     "renesas,rcar-gen2-sdhi";
                        reg = <0 0xee140000 0 0x100>;
                        status = "disabled";
                };
 
-               sdhi2: sd@ee160000 {
+               sdhi2: mmc@ee160000 {
                        compatible = "renesas,sdhi-r8a7793",
                                     "renesas,rcar-gen2-sdhi";
                        reg = <0 0xee160000 0 0x100>;
                        reg = <0 0xfeb00000 0 0x40000>;
                        interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 724>,
-                                <&cpg CPG_MOD 723>;
+                       clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
                        clock-names = "du.0", "du.1";
+                       resets = <&cpg 724>;
+                       reset-names = "du.0";
                        status = "disabled";
 
                        ports {
index f79fce74cd9c31620e16decc6d6cb70814cf2406..4d93319674c6efcf8fed348436b435532a063db8 100644 (file)
@@ -8,6 +8,7 @@
 /dts-v1/;
 #include "r8a7794.dtsi"
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
 
 / {
        model = "Alt";
@@ -19,6 +20,9 @@
                i2c10 = &gpioi2c4;
                i2c11 = &i2chdmi;
                i2c12 = &i2cexio4;
+               mmc0 = &mmcif0;
+               mmc1 = &sdhi0;
+               mmc2 = &sdhi1;
        };
 
        chosen {
                #size-cells = <1>;
        };
 
+       keyboard {
+               compatible = "gpio-keys";
+
+               pinctrl-0 = <&keyboard_pins>;
+               pinctrl-names = "default";
+
+               one {
+                       linux,code = <KEY_1>;
+                       label = "SW2-1";
+                       wakeup-source;
+                       debounce-interval = <20>;
+                       gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
+               };
+               two {
+                       linux,code = <KEY_2>;
+                       label = "SW2-2";
+                       wakeup-source;
+                       debounce-interval = <20>;
+                       gpios = <&gpio3 10 GPIO_ACTIVE_LOW>;
+               };
+               three {
+                       linux,code = <KEY_3>;
+                       label = "SW2-3";
+                       wakeup-source;
+                       debounce-interval = <20>;
+                       gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
+               };
+               four {
+                       linux,code = <KEY_4>;
+                       label = "SW2-4";
+                       wakeup-source;
+                       debounce-interval = <20>;
+                       gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
+               };
+       };
+
        vga-encoder {
                compatible = "adi,adv7123";
 
                composite-in@20 {
                        compatible = "adi,adv7180";
                        reg = <0x20>;
-                       remote = <&vin0>;
 
                        port {
                                adv7180: endpoint {
                groups = "usb1";
                function = "usb1";
        };
+
+       keyboard_pins: keyboard {
+               pins = "GP_3_9", "GP_3_10", "GP_3_11", "GP_3_12";
+               bias-pull-up;
+       };
 };
 
 &cmt0 {
 };
 
 &ether {
-       pinctrl-0 = <&ether_pins &phy1_pins>;
+       pinctrl-0 = <&ether_pins>, <&phy1_pins>;
        pinctrl-names = "default";
 
        phy-handle = <&phy1>;
        status = "okay";
 
        phy1: ethernet-phy@1 {
+               compatible = "ethernet-phy-id0022.1537",
+                            "ethernet-phy-ieee802.3-c22";
                reg = <1>;
                interrupt-parent = <&irqc0>;
                interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
                micrel,led-mode = <1>;
+               reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
        };
 };
 
                        compatible = "dlg,da9063-rtc";
                };
 
-               wdt {
+               watchdog {
                        compatible = "dlg,da9063-watchdog";
                };
        };
index 2c16ad85430020bbb984ca2d35f7d1aa0f8238a0..b7af1befa126ba624b8391f0e7fe8dd2f4320cac 100644 (file)
@@ -31,6 +31,8 @@
                serial0 = &scif2;
                i2c9 = &gpioi2c1;
                i2c10 = &i2chdmi;
+               mmc0 = &mmcif0;
+               mmc1 = &sdhi1;
        };
 
        chosen {
                reg = <0 0x40000000 0 0x40000000>;
        };
 
-       gpio-keys {
+       keyboard {
                compatible = "gpio-keys";
 
+               pinctrl-0 = <&keyboard_pins>;
+               pinctrl-names = "default";
+
                key-3 {
                        gpios = <&gpio5 10 GPIO_ACTIVE_LOW>;
                        linux,code = <KEY_3>;
                composite-in@20 {
                        compatible = "adi,adv7180";
                        reg = <0x20>;
-                       remote = <&vin0>;
 
                        port {
                                adv7180: endpoint {
                        adi,input-depth = <8>;
                        adi,input-colorspace = "rgb";
                        adi,input-clock = "1x";
-                       adi,input-style = <1>;
-                       adi,input-justification = "evenly";
 
                        ports {
                                #address-cells = <1>;
                function = "du1";
        };
 
+       keyboard_pins: keyboard {
+               pins = "GP_3_9", "GP_3_10", "GP_3_11", "GP_3_12";
+               bias-pull-up;
+       };
+
        ssi_pins: sound {
                groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
                function = "ssi";
 };
 
 &ether {
-       pinctrl-0 = <&ether_pins &phy1_pins>;
+       pinctrl-0 = <&ether_pins>, <&phy1_pins>;
        pinctrl-names = "default";
 
        phy-handle = <&phy1>;
        status = "okay";
 
        phy1: ethernet-phy@1 {
+               compatible = "ethernet-phy-id0022.1537",
+                            "ethernet-phy-ieee802.3-c22";
                reg = <1>;
                interrupt-parent = <&irqc0>;
                interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
                micrel,led-mode = <1>;
+               reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
        };
 };
 
                        compatible = "dlg,da9063-rtc";
                };
 
-               wdt {
+               watchdog {
                        compatible = "dlg,da9063-watchdog";
                };
        };
 };
 
 &du {
-       pinctrl-0 = <&du0_pins &du1_pins>;
+       pinctrl-0 = <&du0_pins>, <&du1_pins>;
        pinctrl-names = "default";
        status = "okay";
 
 };
 
 &rcar_sound {
-       pinctrl-0 = <&ssi_pins &audio_clk_pins>;
+       pinctrl-0 = <&ssi_pins>, <&audio_clk_pins>;
        pinctrl-names = "default";
        status = "okay";
 
index 05ef79c6ed7f6b61266a95636e9e826fddfc7936..7aa781ff3bff695234c0c0d072e5d52bd6398c5a 100644 (file)
@@ -62,7 +62,6 @@
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
-               enable-method = "renesas,apmu";
 
                cpu0: cpu@0 {
                        device_type = "cpu";
@@ -71,6 +70,7 @@
                        clock-frequency = <1000000000>;
                        clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>;
                        power-domains = <&sysc R8A7794_PD_CA7_CPU0>;
+                       enable-method = "renesas,apmu";
                        next-level-cache = <&L2_CA7>;
                };
 
@@ -81,6 +81,7 @@
                        clock-frequency = <1000000000>;
                        clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>;
                        power-domains = <&sysc R8A7794_PD_CA7_CPU1>;
+                       enable-method = "renesas,apmu";
                        next-level-cache = <&L2_CA7>;
                };
 
                        compatible = "renesas,r8a7794-wdt",
                                     "renesas,rcar-gen2-wdt";
                        reg = <0 0xe6020000 0 0x0c>;
+                       interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 402>;
                        power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
                        resets = <&cpg 402>;
                        resets = <&cpg 905>;
                };
 
-               pfc: pin-controller@e6060000 {
+               pfc: pinctrl@e6060000 {
                        compatible = "renesas,pfc-r8a7794";
                        reg = <0 0xe6060000 0 0x11c>;
                };
                apmu@e6151000 {
                        compatible = "renesas,r8a7794-apmu", "renesas,apmu";
                        reg = <0 0xe6151000 0 0x188>;
-                       cpus = <&cpu0 &cpu1>;
+                       cpus = <&cpu0>, <&cpu1>;
                };
 
                rst: reset-controller@e6160000 {
                        resets = <&cpg 407>;
                };
 
-               ipmmu_sy0: mmu@e6280000 {
+               ipmmu_sy0: iommu@e6280000 {
                        compatible = "renesas,ipmmu-r8a7794",
                                     "renesas,ipmmu-vmsa";
                        reg = <0 0xe6280000 0 0x1000>;
                        status = "disabled";
                };
 
-               ipmmu_sy1: mmu@e6290000 {
+               ipmmu_sy1: iommu@e6290000 {
                        compatible = "renesas,ipmmu-r8a7794",
                                     "renesas,ipmmu-vmsa";
                        reg = <0 0xe6290000 0 0x1000>;
                        status = "disabled";
                };
 
-               ipmmu_ds: mmu@e6740000 {
+               ipmmu_ds: iommu@e6740000 {
                        compatible = "renesas,ipmmu-r8a7794",
                                     "renesas,ipmmu-vmsa";
                        reg = <0 0xe6740000 0 0x1000>;
                        status = "disabled";
                };
 
-               ipmmu_mp: mmu@ec680000 {
+               ipmmu_mp: iommu@ec680000 {
                        compatible = "renesas,ipmmu-r8a7794",
                                     "renesas,ipmmu-vmsa";
                        reg = <0 0xec680000 0 0x1000>;
                        status = "disabled";
                };
 
-               ipmmu_mx: mmu@fe951000 {
+               ipmmu_mx: iommu@fe951000 {
                        compatible = "renesas,ipmmu-r8a7794",
                                     "renesas,ipmmu-vmsa";
                        reg = <0 0xfe951000 0 0x1000>;
                        status = "disabled";
                };
 
-               ipmmu_gp: mmu@e62a0000 {
+               ipmmu_gp: iommu@e62a0000 {
                        compatible = "renesas,ipmmu-r8a7794",
                                     "renesas,ipmmu-vmsa";
                        reg = <0 0xe62a0000 0 0x1000>;
                        status = "disabled";
                };
 
-               usbphy: usb-phy@e6590100 {
+               usbphy: usb-phy-controller@e6590100 {
                        compatible = "renesas,usb-phy-r8a7794",
                                     "renesas,rcar-gen2-usb-phy";
                        reg = <0 0xe6590100 0 0x100>;
                        resets = <&cpg 704>;
                        status = "disabled";
 
-                       usb0: usb-channel@0 {
+                       usb0: usb-phy@0 {
                                reg = <0>;
                                #phy-cells = <1>;
                        };
-                       usb2: usb-channel@2 {
+                       usb2: usb-phy@2 {
                                reg = <2>;
                                #phy-cells = <1>;
                        };
                        reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
                        interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 812>;
+                       clock-names = "fck";
                        power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
                        resets = <&cpg 812>;
                        #address-cells = <1>;
                        };
                };
 
-               sdhi0: sd@ee100000 {
+               sdhi0: mmc@ee100000 {
                        compatible = "renesas,sdhi-r8a7794",
                                     "renesas,rcar-gen2-sdhi";
                        reg = <0 0xee100000 0 0x328>;
                        status = "disabled";
                };
 
-               sdhi1: sd@ee140000 {
+               sdhi1: mmc@ee140000 {
                        compatible = "renesas,sdhi-r8a7794",
                                     "renesas,rcar-gen2-sdhi";
                        reg = <0 0xee140000 0 0x100>;
                        status = "disabled";
                };
 
-               sdhi2: sd@ee160000 {
+               sdhi2: mmc@ee160000 {
                        compatible = "renesas,sdhi-r8a7794",
                                     "renesas,rcar-gen2-sdhi";
                        reg = <0 0xee160000 0 0x100>;
                                     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
                        clock-names = "du.0", "du.1";
+                       resets = <&cpg 724>;
+                       reset-names = "du.0";
                        status = "disabled";
 
                        ports {
index 2438825c9b22e26d9f1a5ae8ba5d40706d17ea01..c6ca61a8ed40eb9d2cc37e9a547b698311fe6fe9 100644 (file)
        clock-names = "du.0", "du.1", "du.2", "du.3",
                      "dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";
 };
-
-&ehci2 {
-       status = "okay";
-};
-
-&hdmi0 {
-       status = "okay";
-
-       ports {
-               port@1 {
-                       reg = <1>;
-                       rcar_dw_hdmi0_out: endpoint {
-                               remote-endpoint = <&hdmi0_con>;
-                       };
-               };
-               port@2 {
-                       reg = <2>;
-                       dw_hdmi0_snd_in: endpoint {
-                               remote-endpoint = <&rsnd_endpoint1>;
-                       };
-               };
-       };
-};
-
-&hdmi0_con {
-       remote-endpoint = <&rcar_dw_hdmi0_out>;
-};
-
-&hdmi1 {
-       status = "okay";
-
-       ports {
-               port@1 {
-                       reg = <1>;
-                       rcar_dw_hdmi1_out: endpoint {
-                               remote-endpoint = <&hdmi1_con>;
-                       };
-               };
-               port@2 {
-                       reg = <2>;
-                       dw_hdmi1_snd_in: endpoint {
-                               remote-endpoint = <&rsnd_endpoint2>;
-                       };
-               };
-       };
-};
-
-&hdmi1_con {
-       remote-endpoint = <&rcar_dw_hdmi1_out>;
-};
-
-&ohci2 {
-       status = "okay";
-};
-
-&pfc {
-       usb2_pins: usb2 {
-               groups = "usb2";
-               function = "usb2";
-       };
-};
-
-&rcar_sound {
-       ports {
-               /* rsnd_port0 is on salvator-common */
-               rsnd_port1: port@1 {
-                       reg = <1>;
-                       rsnd_endpoint1: endpoint {
-                               remote-endpoint = <&dw_hdmi0_snd_in>;
-
-                               dai-format = "i2s";
-                               bitclock-master = <&rsnd_endpoint1>;
-                               frame-master = <&rsnd_endpoint1>;
-
-                               playback = <&ssi2>;
-                       };
-               };
-               rsnd_port2: port@2 {
-                       reg = <2>;
-                       rsnd_endpoint2: endpoint {
-                               remote-endpoint = <&dw_hdmi1_snd_in>;
-
-                               dai-format = "i2s";
-                               bitclock-master = <&rsnd_endpoint2>;
-                               frame-master = <&rsnd_endpoint2>;
-
-                               playback = <&ssi3>;
-                       };
-               };
-       };
-};
-
-&sata {
-       status = "okay";
-};
-
-&sound_card {
-       dais = <&rsnd_port0     /* ak4613 */
-               &rsnd_port1     /* HDMI0  */
-               &rsnd_port2>;   /* HDMI1  */
-};
-
-&usb2_phy2 {
-       pinctrl-0 = <&usb2_pins>;
-       pinctrl-names = "default";
-
-       status = "okay";
-};
index 38a6d6a108d488ed1db926f299c204634af19274..5340579931e35f8c3ac9ef8bc4fabd7cfbd5c641 100644 (file)
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Device Tree Source for the H3ULCB (R-Car Starter Kit Premier) board
+ * Device Tree Source for the H3ULCB (R-Car Starter Kit Premier) board with R-Car H3 ES1.x
  *
  * Copyright (C) 2016 Renesas Electronics Corp.
  * Copyright (C) 2016 Cogent Embedded, Inc.
index 15216495e1c8b31ca671e275bf3c48df46b97088..57eb88177e92880e194377d81a3ab1c79a79f444 100644 (file)
@@ -7,6 +7,8 @@
 
 #include "r8a77951.dtsi"
 
+#undef SOC_HAS_USB2_CH3
+
 &audma0 {
        iommus = <&ipmmu_mp1 0>, <&ipmmu_mp1 1>,
               <&ipmmu_mp1 2>, <&ipmmu_mp1 3>,
               <&ipmmu_mp1 30>, <&ipmmu_mp1 31>;
 };
 
+&cluster0_opp {
+       /delete-node/ opp-1600000000;
+       /delete-node/ opp-1700000000;
+};
+
 &du {
-       vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd3 0>;
+       renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd3 0>;
 };
 
 &fcpvb1 {
@@ -77,7 +84,7 @@
        /delete-node/ dma-controller@e6460000;
        /delete-node/ dma-controller@e6470000;
 
-       ipmmu_mp1: mmu@ec680000 {
+       ipmmu_mp1: iommu@ec680000 {
                compatible = "renesas,ipmmu-r8a7795";
                reg = <0 0xec680000 0 0x1000>;
                renesas,ipmmu-main = <&ipmmu_mm 5>;
@@ -85,7 +92,7 @@
                #iommu-cells = <1>;
        };
 
-       ipmmu_sy: mmu@e7730000 {
+       ipmmu_sy: iommu@e7730000 {
                compatible = "renesas,ipmmu-r8a7795";
                reg = <0 0xe7730000 0 0x1000>;
                renesas,ipmmu-main = <&ipmmu_mm 8>;
                #iommu-cells = <1>;
        };
 
-       /delete-node/ mmu@fd950000;
-       /delete-node/ mmu@fd960000;
-       /delete-node/ mmu@fd970000;
-       /delete-node/ mmu@febe0000;
-       /delete-node/ mmu@fe980000;
+       /delete-node/ iommu@fd950000;
+       /delete-node/ iommu@fd960000;
+       /delete-node/ iommu@fd970000;
+       /delete-node/ iommu@febe0000;
+       /delete-node/ iommu@fe980000;
 
        xhci1: usb@ee040000 {
                compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
                        #address-cells = <1>;
                        #size-cells = <0>;
 
+                       port@0 {
+                               reg = <0>;
+                       };
+
                        port@1 {
                                #address-cells = <1>;
                                #size-cells = <0>;
index a8729eb744db2b5327b9933c94f8babc60a7b9e8..07c8763c1e77fc8a73ef081c90cc564ebe045b66 100644 (file)
 
 #define CPG_AUDIO_CLK_I                R8A7795_CLK_S0D4
 
+#define SOC_HAS_HDMI1
+#define SOC_HAS_SATA
+#define SOC_HAS_USB2_CH2
+#define SOC_HAS_USB2_CH3
+
 / {
        compatible = "renesas,r8a7795";
        #address-cells = <2>;
        #size-cells = <2>;
 
-       aliases {
-               i2c0 = &i2c0;
-               i2c1 = &i2c1;
-               i2c2 = &i2c2;
-               i2c3 = &i2c3;
-               i2c4 = &i2c4;
-               i2c5 = &i2c5;
-               i2c6 = &i2c6;
-               i2c7 = &i2c_dvfs;
-       };
-
        /*
         * The external audio clocks are configured as 0 Hz fixed frequency
         * clocks by default.
@@ -57,7 +51,7 @@
                clock-frequency = <0>;
        };
 
-       cluster0_opp: opp_table0 {
+       cluster0_opp: opp-table-0 {
                compatible = "operating-points-v2";
                opp-shared;
 
@@ -91,7 +85,7 @@
                };
        };
 
-       cluster1_opp: opp_table1 {
+       cluster1_opp: opp-table-1 {
                compatible = "operating-points-v2";
                opp-shared;
 
                rwdt: watchdog@e6020000 {
                        compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
                        reg = <0 0xe6020000 0 0x0c>;
+                       interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 402>;
                        power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
                        resets = <&cpg 402>;
                        resets = <&cpg 905>;
                };
 
-               pfc: pin-controller@e6060000 {
+               pfc: pinctrl@e6060000 {
                        compatible = "renesas,pfc-r8a7795";
                        reg = <0 0xe6060000 0 0x50c>;
                };
                        resets = <&cpg 407>;
                };
 
+               tmu0: timer@e61e0000 {
+                       compatible = "renesas,tmu-r8a7795", "renesas,tmu";
+                       reg = <0 0xe61e0000 0 0x30>;
+                       interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 125>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+                       resets = <&cpg 125>;
+                       status = "disabled";
+               };
+
+               tmu1: timer@e6fc0000 {
+                       compatible = "renesas,tmu-r8a7795", "renesas,tmu";
+                       reg = <0 0xe6fc0000 0 0x30>;
+                       interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 124>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+                       resets = <&cpg 124>;
+                       status = "disabled";
+               };
+
+               tmu2: timer@e6fd0000 {
+                       compatible = "renesas,tmu-r8a7795", "renesas,tmu";
+                       reg = <0 0xe6fd0000 0 0x30>;
+                       interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 123>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+                       resets = <&cpg 123>;
+                       status = "disabled";
+               };
+
+               tmu3: timer@e6fe0000 {
+                       compatible = "renesas,tmu-r8a7795", "renesas,tmu";
+                       reg = <0 0xe6fe0000 0 0x30>;
+                       interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 122>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+                       resets = <&cpg 122>;
+                       status = "disabled";
+               };
+
+               tmu4: timer@ffc00000 {
+                       compatible = "renesas,tmu-r8a7795", "renesas,tmu";
+                       reg = <0 0xffc00000 0 0x30>;
+                       interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 121>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+                       resets = <&cpg 121>;
+                       status = "disabled";
+               };
+
                i2c0: i2c@e6500000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                               <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
                };
 
-               ipmmu_ds0: mmu@e6740000 {
+               ipmmu_ds0: iommu@e6740000 {
                        compatible = "renesas,ipmmu-r8a7795";
                        reg = <0 0xe6740000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 0>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_ds1: mmu@e7740000 {
+               ipmmu_ds1: iommu@e7740000 {
                        compatible = "renesas,ipmmu-r8a7795";
                        reg = <0 0xe7740000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 1>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_hc: mmu@e6570000 {
+               ipmmu_hc: iommu@e6570000 {
                        compatible = "renesas,ipmmu-r8a7795";
                        reg = <0 0xe6570000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 2>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_ir: mmu@ff8b0000 {
+               ipmmu_ir: iommu@ff8b0000 {
                        compatible = "renesas,ipmmu-r8a7795";
                        reg = <0 0xff8b0000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 3>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_mm: mmu@e67b0000 {
+               ipmmu_mm: iommu@e67b0000 {
                        compatible = "renesas,ipmmu-r8a7795";
                        reg = <0 0xe67b0000 0 0x1000>;
                        interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
                        #iommu-cells = <1>;
                };
 
-               ipmmu_mp0: mmu@ec670000 {
+               ipmmu_mp0: iommu@ec670000 {
                        compatible = "renesas,ipmmu-r8a7795";
                        reg = <0 0xec670000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 4>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_pv0: mmu@fd800000 {
+               ipmmu_pv0: iommu@fd800000 {
                        compatible = "renesas,ipmmu-r8a7795";
                        reg = <0 0xfd800000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 6>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_pv1: mmu@fd950000 {
+               ipmmu_pv1: iommu@fd950000 {
                        compatible = "renesas,ipmmu-r8a7795";
                        reg = <0 0xfd950000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 7>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_pv2: mmu@fd960000 {
+               ipmmu_pv2: iommu@fd960000 {
                        compatible = "renesas,ipmmu-r8a7795";
                        reg = <0 0xfd960000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 8>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_pv3: mmu@fd970000 {
+               ipmmu_pv3: iommu@fd970000 {
                        compatible = "renesas,ipmmu-r8a7795";
                        reg = <0 0xfd970000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 9>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_rt: mmu@ffc80000 {
+               ipmmu_rt: iommu@ffc80000 {
                        compatible = "renesas,ipmmu-r8a7795";
                        reg = <0 0xffc80000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 10>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_vc0: mmu@fe6b0000 {
+               ipmmu_vc0: iommu@fe6b0000 {
                        compatible = "renesas,ipmmu-r8a7795";
                        reg = <0 0xfe6b0000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 12>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_vc1: mmu@fe6f0000 {
+               ipmmu_vc1: iommu@fe6f0000 {
                        compatible = "renesas,ipmmu-r8a7795";
                        reg = <0 0xfe6f0000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 13>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_vi0: mmu@febd0000 {
+               ipmmu_vi0: iommu@febd0000 {
                        compatible = "renesas,ipmmu-r8a7795";
                        reg = <0 0xfebd0000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 14>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_vi1: mmu@febe0000 {
+               ipmmu_vi1: iommu@febe0000 {
                        compatible = "renesas,ipmmu-r8a7795";
                        reg = <0 0xfebe0000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 15>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_vp0: mmu@fe990000 {
+               ipmmu_vp0: iommu@fe990000 {
                        compatible = "renesas,ipmmu-r8a7795";
                        reg = <0 0xfe990000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 16>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_vp1: mmu@fe980000 {
+               ipmmu_vp1: iommu@fe980000 {
                        compatible = "renesas,ipmmu-r8a7795";
                        reg = <0 0xfe980000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 17>;
                                          "ch20", "ch21", "ch22", "ch23",
                                          "ch24";
                        clocks = <&cpg CPG_MOD 812>;
+                       clock-names = "fck";
                        power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
                        resets = <&cpg 812>;
                        phy-mode = "rgmii";
+                       rx-internal-delay-ps = <0>;
+                       tx-internal-delay-ps = <0>;
                        iommus = <&ipmmu_ds0 16>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        reg = <0 0xe66c0000 0 0x8000>;
                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
                                   <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ch_int", "g_int";
                        clocks = <&cpg CPG_MOD 914>,
                               <&cpg CPG_CORE R8A7795_CLK_CANFD>,
                               <&can_clk>;
                         * clkout       : #clock-cells = <0>;   <&rcar_sound>;
                         * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
                         */
-                       compatible =  "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
-                       reg =   <0 0xec500000 0 0x1000>, /* SCU */
-                               <0 0xec5a0000 0 0x100>,  /* ADG */
-                               <0 0xec540000 0 0x1000>, /* SSIU */
-                               <0 0xec541000 0 0x280>,  /* SSI */
-                               <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
+                       compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
+                       reg = <0 0xec500000 0 0x1000>, /* SCU */
+                             <0 0xec5a0000 0 0x100>,  /* ADG */
+                             <0 0xec540000 0 0x1000>, /* SSIU */
+                             <0 0xec541000 0 0x280>,  /* SSI */
+                             <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
                        reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
 
                        clocks = <&cpg CPG_MOD 1005>,
                                        dma-names = "rx", "tx";
                                };
                                ssiu40: ssiu-32 {
-                                       dmas =  <&audma0 0x71>, <&audma1 0x72>;
+                                       dmas = <&audma0 0x71>, <&audma1 0x72>;
                                        dma-names = "rx", "tx";
                                };
                                ssiu41: ssiu-33 {
                        };
                };
 
+               mlp: mlp@ec520000 {
+                       compatible = "renesas,r8a7795-mlp",
+                                    "renesas,rcar-gen3-mlp";
+                       reg = <0 0xec520000 0 0x800>;
+                       interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
+                               <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 802>;
+                       power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+                       resets = <&cpg 802>;
+                       status = "disabled";
+               };
+
                audma0: dma-controller@ec700000 {
                        compatible = "renesas,dmac-r8a7795",
                                     "renesas,rcar-dmac";
                        status = "disabled";
                };
 
-               sdhi0: sd@ee100000 {
+               sdhi0: mmc@ee100000 {
                        compatible = "renesas,sdhi-r8a7795",
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee100000 0 0x2000>;
                        interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 314>;
+                       clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A7795_CLK_SD0H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
                        resets = <&cpg 314>;
                        status = "disabled";
                };
 
-               sdhi1: sd@ee120000 {
+               sdhi1: mmc@ee120000 {
                        compatible = "renesas,sdhi-r8a7795",
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee120000 0 0x2000>;
                        interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 313>;
+                       clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A7795_CLK_SD1H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
                        resets = <&cpg 313>;
                        status = "disabled";
                };
 
-               sdhi2: sd@ee140000 {
+               sdhi2: mmc@ee140000 {
                        compatible = "renesas,sdhi-r8a7795",
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee140000 0 0x2000>;
                        interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 312>;
+                       clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A7795_CLK_SD2H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
                        resets = <&cpg 312>;
                        status = "disabled";
                };
 
-               sdhi3: sd@ee160000 {
+               sdhi3: mmc@ee160000 {
                        compatible = "renesas,sdhi-r8a7795",
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee160000 0 0x2000>;
                        interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 311>;
+                       clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A7795_CLK_SD3H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
                        resets = <&cpg 311>;
                        status = "disabled";
                };
 
+               rpc: spi@ee200000 {
+                       compatible = "renesas,r8a7795-rpc-if",
+                                    "renesas,rcar-gen3-rpc-if";
+                       reg = <0 0xee200000 0 0x200>,
+                             <0 0x08000000 0 0x04000000>,
+                             <0 0xee208000 0 0x100>;
+                       reg-names = "regs", "dirmap", "wbuf";
+                       interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 917>;
+                       power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+                       resets = <&cpg 917>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
                sata: sata@ee300000 {
                        compatible = "renesas,sata-r8a7795",
                                     "renesas,rcar-gen3-sata";
                        status = "disabled";
                };
 
+               pciec0_ep: pcie-ep@fe000000 {
+                       compatible = "renesas,r8a7795-pcie-ep",
+                                    "renesas,rcar-gen3-pcie-ep";
+                       reg = <0x0 0xfe000000 0 0x80000>,
+                             <0x0 0xfe100000 0 0x100000>,
+                             <0x0 0xfe200000 0 0x200000>,
+                             <0x0 0x30000000 0 0x8000000>,
+                             <0x0 0x38000000 0 0x8000000>;
+                       reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
+                       interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 319>;
+                       clock-names = "pcie";
+                       resets = <&cpg 319>;
+                       power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+                       status = "disabled";
+               };
+
+               pciec1_ep: pcie-ep@ee800000 {
+                       compatible = "renesas,r8a7795-pcie-ep",
+                                    "renesas,rcar-gen3-pcie-ep";
+                       reg = <0x0 0xee800000 0 0x80000>,
+                             <0x0 0xee900000 0 0x100000>,
+                             <0x0 0xeea00000 0 0x200000>,
+                             <0x0 0xc0000000 0 0x8000000>,
+                             <0x0 0xc8000000 0 0x8000000>;
+                       reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
+                       interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 318>;
+                       clock-names = "pcie";
+                       resets = <&cpg 318>;
+                       power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+                       status = "disabled";
+               };
+
                imr-lx4@fe860000 {
                        compatible = "renesas,r8a7795-imr-lx4",
                                     "renesas,imr-lx4";
                                #address-cells = <1>;
                                #size-cells = <0>;
 
+                               port@0 {
+                                       reg = <0>;
+                               };
+
                                port@1 {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
                                #address-cells = <1>;
                                #size-cells = <0>;
 
+                               port@0 {
+                                       reg = <0>;
+                               };
+
                                port@1 {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
                                #address-cells = <1>;
                                #size-cells = <0>;
 
+                               port@0 {
+                                       reg = <0>;
+                               };
+
                                port@1 {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
                                     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 724>,
-                                <&cpg CPG_MOD 723>,
-                                <&cpg CPG_MOD 722>,
-                                <&cpg CPG_MOD 721>;
+                       clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
+                                <&cpg CPG_MOD 722>, <&cpg CPG_MOD 721>;
                        clock-names = "du.0", "du.1", "du.2", "du.3";
+                       resets = <&cpg 724>, <&cpg 722>;
+                       reset-names = "du.0", "du.2";
 
                        renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>, <&cmm3>;
-                       vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd0 1>;
+                       renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>,
+                                      <&vspd0 1>;
 
                        status = "disabled";
 
 
                                port@0 {
                                        reg = <0>;
-                                       du_out_rgb: endpoint {
-                                       };
                                };
                                port@1 {
                                        reg = <1>;
                                };
                                port@1 {
                                        reg = <1>;
-                                       lvds0_out: endpoint {
-                                       };
                                };
                        };
                };
        };
 
        thermal-zones {
-               sensor_thermal1: sensor-thermal1 {
+               sensor1_thermal: sensor1-thermal {
                        polling-delay-passive = <250>;
                        polling-delay = <1000>;
                        thermal-sensors = <&tsc 0>;
                        };
                };
 
-               sensor_thermal2: sensor-thermal2 {
+               sensor2_thermal: sensor2-thermal {
                        polling-delay-passive = <250>;
                        polling-delay = <1000>;
                        thermal-sensors = <&tsc 1>;
                        };
                };
 
-               sensor_thermal3: sensor-thermal3 {
+               sensor3_thermal: sensor3-thermal {
                        polling-delay-passive = <250>;
                        polling-delay = <1000>;
                        thermal-sensors = <&tsc 2>;
index ecfbeafeaf367f15ef9c9d0f8d7c582e6a358da5..d5543f26c4720cea6a7d85594102c5eb1a4b4b75 100644 (file)
        clock-names = "du.0", "du.1", "du.2",
                      "dclkin.0", "dclkin.1", "dclkin.2";
 };
-
-&hdmi0 {
-       status = "okay";
-
-       ports {
-               port@1 {
-                       reg = <1>;
-                       rcar_dw_hdmi0_out: endpoint {
-                               remote-endpoint = <&hdmi0_con>;
-                       };
-               };
-               port@2 {
-                       reg = <2>;
-                       dw_hdmi0_snd_in: endpoint {
-                               remote-endpoint = <&rsnd_endpoint1>;
-                       };
-               };
-       };
-};
-
-&hdmi0_con {
-       remote-endpoint = <&rcar_dw_hdmi0_out>;
-};
-
-&rcar_sound {
-       ports {
-               /* rsnd_port0 is on salvator-common */
-               rsnd_port1: port@1 {
-                       reg = <1>;
-                       rsnd_endpoint1: endpoint {
-                               remote-endpoint = <&dw_hdmi0_snd_in>;
-
-                               dai-format = "i2s";
-                               bitclock-master = <&rsnd_endpoint1>;
-                               frame-master = <&rsnd_endpoint1>;
-
-                               playback = <&ssi2>;
-                       };
-               };
-       };
-};
-
-&sound_card {
-       dais = <&rsnd_port0     /* ak4613 */
-               &rsnd_port1>;   /* HDMI0  */
-};
index d041042a56192ab26fe02529413ee087b9540404..4bfeb1df0488dc7aae25004db69f961787e3915e 100644 (file)
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Device Tree Source for the M3ULCB (R-Car Starter Kit Pro) board
+ * Device Tree Source for the M3ULCB (R-Car Starter Kit Pro) board with R-Car M3-W
  *
  * Copyright (C) 2016 Renesas Electronics Corp.
  * Copyright (C) 2016 Cogent Embedded, Inc.
index 60f156cfd2d68673024b402b89a75f16b4d2f509..1424d4ad941f44b4011311fe12a9dde3715d0c93 100644 (file)
        #address-cells = <2>;
        #size-cells = <2>;
 
-       aliases {
-               i2c0 = &i2c0;
-               i2c1 = &i2c1;
-               i2c2 = &i2c2;
-               i2c3 = &i2c3;
-               i2c4 = &i2c4;
-               i2c5 = &i2c5;
-               i2c6 = &i2c6;
-               i2c7 = &i2c_dvfs;
-       };
-
        /*
         * The external audio clocks are configured as 0 Hz fixed frequency
         * clocks by default.
                clock-frequency = <0>;
        };
 
-       cluster0_opp: opp_table0 {
+       cluster0_opp: opp-table-0 {
                compatible = "operating-points-v2";
                opp-shared;
 
                opp-500000000 {
                        opp-hz = /bits/ 64 <500000000>;
-                       opp-microvolt = <820000>;
+                       opp-microvolt = <830000>;
                        clock-latency-ns = <300000>;
                };
                opp-1000000000 {
                        opp-hz = /bits/ 64 <1000000000>;
-                       opp-microvolt = <820000>;
+                       opp-microvolt = <830000>;
                        clock-latency-ns = <300000>;
                };
                opp-1500000000 {
                        opp-hz = /bits/ 64 <1500000000>;
-                       opp-microvolt = <820000>;
+                       opp-microvolt = <830000>;
                        clock-latency-ns = <300000>;
+                       opp-suspend;
                };
                opp-1600000000 {
                        opp-hz = /bits/ 64 <1600000000>;
@@ -96,7 +86,7 @@
                };
        };
 
-       cluster1_opp: opp_table1 {
+       cluster1_opp: opp-table-1 {
                compatible = "operating-points-v2";
                opp-shared;
 
                        compatible = "renesas,r8a7796-wdt",
                                     "renesas,rcar-gen3-wdt";
                        reg = <0 0xe6020000 0 0x0c>;
+                       interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 402>;
                        power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
                        resets = <&cpg 402>;
                        resets = <&cpg 905>;
                };
 
-               pfc: pin-controller@e6060000 {
+               pfc: pinctrl@e6060000 {
                        compatible = "renesas,pfc-r8a7796";
                        reg = <0 0xe6060000 0 0x50c>;
                };
                        resets = <&cpg 407>;
                };
 
+               tmu0: timer@e61e0000 {
+                       compatible = "renesas,tmu-r8a7796", "renesas,tmu";
+                       reg = <0 0xe61e0000 0 0x30>;
+                       interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 125>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+                       resets = <&cpg 125>;
+                       status = "disabled";
+               };
+
+               tmu1: timer@e6fc0000 {
+                       compatible = "renesas,tmu-r8a7796", "renesas,tmu";
+                       reg = <0 0xe6fc0000 0 0x30>;
+                       interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 124>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+                       resets = <&cpg 124>;
+                       status = "disabled";
+               };
+
+               tmu2: timer@e6fd0000 {
+                       compatible = "renesas,tmu-r8a7796", "renesas,tmu";
+                       reg = <0 0xe6fd0000 0 0x30>;
+                       interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 123>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+                       resets = <&cpg 123>;
+                       status = "disabled";
+               };
+
+               tmu3: timer@e6fe0000 {
+                       compatible = "renesas,tmu-r8a7796", "renesas,tmu";
+                       reg = <0 0xe6fe0000 0 0x30>;
+                       interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 122>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+                       resets = <&cpg 122>;
+                       status = "disabled";
+               };
+
+               tmu4: timer@ffc00000 {
+                       compatible = "renesas,tmu-r8a7796", "renesas,tmu";
+                       reg = <0 0xffc00000 0 0x30>;
+                       interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 121>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+                       resets = <&cpg 121>;
+                       status = "disabled";
+               };
+
                i2c0: i2c@e6500000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        status = "disabled";
                };
 
+               arm_cc630p: crypto@e6601000 {
+                       compatible = "arm,cryptocell-630p-ree";
+                       interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+                       reg = <0x0 0xe6601000 0 0x1000>;
+                       clocks = <&cpg CPG_MOD 229>;
+                       resets = <&cpg 229>;
+                       power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+               };
+
                dmac0: dma-controller@e6700000 {
                        compatible = "renesas,dmac-r8a7796",
                                     "renesas,rcar-dmac";
                               <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
                };
 
-               ipmmu_ds0: mmu@e6740000 {
+               ipmmu_ds0: iommu@e6740000 {
                        compatible = "renesas,ipmmu-r8a7796";
                        reg = <0 0xe6740000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 0>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_ds1: mmu@e7740000 {
+               ipmmu_ds1: iommu@e7740000 {
                        compatible = "renesas,ipmmu-r8a7796";
                        reg = <0 0xe7740000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 1>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_hc: mmu@e6570000 {
+               ipmmu_hc: iommu@e6570000 {
                        compatible = "renesas,ipmmu-r8a7796";
                        reg = <0 0xe6570000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 2>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_ir: mmu@ff8b0000 {
+               ipmmu_ir: iommu@ff8b0000 {
                        compatible = "renesas,ipmmu-r8a7796";
                        reg = <0 0xff8b0000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 3>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_mm: mmu@e67b0000 {
+               ipmmu_mm: iommu@e67b0000 {
                        compatible = "renesas,ipmmu-r8a7796";
                        reg = <0 0xe67b0000 0 0x1000>;
                        interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
                        #iommu-cells = <1>;
                };
 
-               ipmmu_mp: mmu@ec670000 {
+               ipmmu_mp: iommu@ec670000 {
                        compatible = "renesas,ipmmu-r8a7796";
                        reg = <0 0xec670000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 4>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_pv0: mmu@fd800000 {
+               ipmmu_pv0: iommu@fd800000 {
                        compatible = "renesas,ipmmu-r8a7796";
                        reg = <0 0xfd800000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 5>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_pv1: mmu@fd950000 {
+               ipmmu_pv1: iommu@fd950000 {
                        compatible = "renesas,ipmmu-r8a7796";
                        reg = <0 0xfd950000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 6>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_rt: mmu@ffc80000 {
+               ipmmu_rt: iommu@ffc80000 {
                        compatible = "renesas,ipmmu-r8a7796";
                        reg = <0 0xffc80000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 7>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_vc0: mmu@fe6b0000 {
+               ipmmu_vc0: iommu@fe6b0000 {
                        compatible = "renesas,ipmmu-r8a7796";
                        reg = <0 0xfe6b0000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 8>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_vi0: mmu@febd0000 {
+               ipmmu_vi0: iommu@febd0000 {
                        compatible = "renesas,ipmmu-r8a7796";
                        reg = <0 0xfebd0000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 9>;
                                          "ch20", "ch21", "ch22", "ch23",
                                          "ch24";
                        clocks = <&cpg CPG_MOD 812>;
+                       clock-names = "fck";
                        power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
                        resets = <&cpg 812>;
                        phy-mode = "rgmii";
+                       rx-internal-delay-ps = <0>;
+                       tx-internal-delay-ps = <0>;
                        iommus = <&ipmmu_ds0 16>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        reg = <0 0xe66c0000 0 0x8000>;
                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
                                   <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ch_int", "g_int";
                        clocks = <&cpg CPG_MOD 914>,
                               <&cpg CPG_CORE R8A7796_CLK_CANFD>,
                               <&can_clk>;
                         * clkout       : #clock-cells = <0>;   <&rcar_sound>;
                         * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
                         */
-                       compatible =  "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3";
-                       reg =   <0 0xec500000 0 0x1000>, /* SCU */
-                               <0 0xec5a0000 0 0x100>,  /* ADG */
-                               <0 0xec540000 0 0x1000>, /* SSIU */
-                               <0 0xec541000 0 0x280>,  /* SSI */
-                               <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
+                       compatible = "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3";
+                       reg = <0 0xec500000 0 0x1000>, /* SCU */
+                             <0 0xec5a0000 0 0x100>,  /* ADG */
+                             <0 0xec540000 0 0x1000>, /* SSIU */
+                             <0 0xec541000 0 0x280>,  /* SSI */
+                             <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
                        reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
 
                        clocks = <&cpg CPG_MOD 1005>,
                                        dma-names = "rx", "tx";
                                };
                                ssiu40: ssiu-32 {
-                                       dmas =  <&audma0 0x71>, <&audma1 0x72>;
+                                       dmas = <&audma0 0x71>, <&audma1 0x72>;
                                        dma-names = "rx", "tx";
                                };
                                ssiu41: ssiu-33 {
                        };
                };
 
+               mlp: mlp@ec520000 {
+                       compatible = "renesas,r8a7796-mlp",
+                                    "renesas,rcar-gen3-mlp";
+                       reg = <0 0xec520000 0 0x800>;
+                       interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
+                               <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 802>;
+                       power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+                       resets = <&cpg 802>;
+                       status = "disabled";
+               };
+
                audma0: dma-controller@ec700000 {
                        compatible = "renesas,dmac-r8a7796",
                                     "renesas,rcar-dmac";
                        status = "disabled";
                };
 
-               sdhi0: sd@ee100000 {
+               sdhi0: mmc@ee100000 {
                        compatible = "renesas,sdhi-r8a7796",
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee100000 0 0x2000>;
                        interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 314>;
+                       clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A7796_CLK_SD0H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
                        resets = <&cpg 314>;
                        status = "disabled";
                };
 
-               sdhi1: sd@ee120000 {
+               sdhi1: mmc@ee120000 {
                        compatible = "renesas,sdhi-r8a7796",
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee120000 0 0x2000>;
                        interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 313>;
+                       clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A7796_CLK_SD1H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
                        resets = <&cpg 313>;
                        status = "disabled";
                };
 
-               sdhi2: sd@ee140000 {
+               sdhi2: mmc@ee140000 {
                        compatible = "renesas,sdhi-r8a7796",
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee140000 0 0x2000>;
                        interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 312>;
+                       clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A7796_CLK_SD2H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
                        resets = <&cpg 312>;
                        status = "disabled";
                };
 
-               sdhi3: sd@ee160000 {
+               sdhi3: mmc@ee160000 {
                        compatible = "renesas,sdhi-r8a7796",
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee160000 0 0x2000>;
                        interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 311>;
+                       clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A7796_CLK_SD3H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
                        resets = <&cpg 311>;
                        status = "disabled";
                };
 
+               rpc: spi@ee200000 {
+                       compatible = "renesas,r8a7796-rpc-if",
+                                    "renesas,rcar-gen3-rpc-if";
+                       reg = <0 0xee200000 0 0x200>,
+                             <0 0x08000000 0 0x04000000>,
+                             <0 0xee208000 0 0x100>;
+                       reg-names = "regs", "dirmap", "wbuf";
+                       interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 917>;
+                       power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+                       resets = <&cpg 917>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
                gic: interrupt-controller@f1010000 {
                        compatible = "arm,gic-400";
                        #interrupt-cells = <3>;
                                #address-cells = <1>;
                                #size-cells = <0>;
 
+                               port@0 {
+                                       reg = <0>;
+                               };
+
                                port@1 {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
                                #address-cells = <1>;
                                #size-cells = <0>;
 
+                               port@0 {
+                                       reg = <0>;
+                               };
+
                                port@1 {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
                        interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 724>,
-                                <&cpg CPG_MOD 723>,
+                       clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
                                 <&cpg CPG_MOD 722>;
                        clock-names = "du.0", "du.1", "du.2";
+                       resets = <&cpg 724>, <&cpg 722>;
+                       reset-names = "du.0", "du.2";
 
                        renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>;
-                       vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
+                       renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
 
                        status = "disabled";
 
 
                                port@0 {
                                        reg = <0>;
-                                       du_out_rgb: endpoint {
-                                       };
                                };
                                port@1 {
                                        reg = <1>;
                                };
                                port@1 {
                                        reg = <1>;
-                                       lvds0_out: endpoint {
-                                       };
                                };
                        };
                };
        };
 
        thermal-zones {
-               sensor_thermal1: sensor-thermal1 {
+               sensor1_thermal: sensor1-thermal {
                        polling-delay-passive = <250>;
                        polling-delay = <1000>;
                        thermal-sensors = <&tsc 0>;
                        };
                };
 
-               sensor_thermal2: sensor-thermal2 {
+               sensor2_thermal: sensor2-thermal {
                        polling-delay-passive = <250>;
                        polling-delay = <1000>;
                        thermal-sensors = <&tsc 1>;
                        };
                };
 
-               sensor_thermal3: sensor-thermal3 {
+               sensor3_thermal: sensor3-thermal {
                        polling-delay-passive = <250>;
                        polling-delay = <1000>;
                        thermal-sensors = <&tsc 2>;
index 660a0240eec56268cd6ad661562f496b93cb0c94..f84c64ed4df7b0459fe43bb7f03770a1542eca86 100644 (file)
        clock-names = "du.0", "du.1", "du.3",
                      "dclkin.0", "dclkin.1", "dclkin.3";
 };
-
-&hdmi0 {
-       status = "okay";
-
-       ports {
-               port@1 {
-                       reg = <1>;
-                       rcar_dw_hdmi0_out: endpoint {
-                               remote-endpoint = <&hdmi0_con>;
-                       };
-               };
-               port@2 {
-                       reg = <2>;
-                       dw_hdmi0_snd_in: endpoint {
-                               remote-endpoint = <&rsnd_endpoint1>;
-                       };
-               };
-       };
-};
-
-&hdmi0_con {
-       remote-endpoint = <&rcar_dw_hdmi0_out>;
-};
-
-&rcar_sound {
-       ports {
-               rsnd_port1: port@1 {
-                       reg = <1>;
-                       rsnd_endpoint1: endpoint {
-                               remote-endpoint = <&dw_hdmi0_snd_in>;
-
-                               dai-format = "i2s";
-                               bitclock-master = <&rsnd_endpoint1>;
-                               frame-master = <&rsnd_endpoint1>;
-
-                               playback = <&ssi2>;
-                       };
-               };
-       };
-};
-
-&sound_card {
-       dais = <&rsnd_port0     /* ak4613 */
-               &rsnd_port1>;   /* HDMI0  */
-};
index 964078b6cc49e959351a5f2bd48121e2ae6a3e14..71704b67a20e13b187c182fddb2c018b19cf95d5 100644 (file)
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Device Tree Source for the M3NULCB (R-Car Starter Kit Pro) board
+ * Device Tree Source for the M3NULCB (R-Car Starter Kit Pro) board with R-Car M3-N
  *
  * Copyright (C) 2018 Renesas Electronics Corp.
  * Copyright (C) 2018 Cogent Embedded, Inc.
index c17d90bd160e0045378adf60d380ca0f5ca3cdf8..997f29521f66c35433fcf28de56046bbf2097586 100644 (file)
 
 #define CPG_AUDIO_CLK_I                R8A77965_CLK_S0D4
 
+#define SOC_HAS_SATA
+
 / {
        compatible = "renesas,r8a77965";
        #address-cells = <2>;
        #size-cells = <2>;
 
-       aliases {
-               i2c0 = &i2c0;
-               i2c1 = &i2c1;
-               i2c2 = &i2c2;
-               i2c3 = &i2c3;
-               i2c4 = &i2c4;
-               i2c5 = &i2c5;
-               i2c6 = &i2c6;
-               i2c7 = &i2c_dvfs;
-       };
-
        /*
         * The external audio clocks are configured as 0 Hz fixed frequency
         * clocks by default.
@@ -60,7 +51,7 @@
                clock-frequency = <0>;
        };
 
-       cluster0_opp: opp_table0 {
+       cluster0_opp: opp-table-0 {
                compatible = "operating-points-v2";
                opp-shared;
 
                        power-domains = <&sysc R8A77965_PD_CA57_CPU0>;
                        next-level-cache = <&L2_CA57>;
                        enable-method = "psci";
+                       cpu-idle-states = <&CPU_SLEEP_0>;
                        #cooling-cells = <2>;
                        dynamic-power-coefficient = <854>;
                        clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
                        power-domains = <&sysc R8A77965_PD_CA57_CPU1>;
                        next-level-cache = <&L2_CA57>;
                        enable-method = "psci";
+                       cpu-idle-states = <&CPU_SLEEP_0>;
                        clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
                        operating-points-v2 = <&cluster0_opp>;
                };
                        cache-unified;
                        cache-level = <2>;
                };
+
+               idle-states {
+                       entry-method = "psci";
+
+                       CPU_SLEEP_0: cpu-sleep-0 {
+                               compatible = "arm,idle-state";
+                               arm,psci-suspend-param = <0x0010000>;
+                               local-timer-stop;
+                               entry-latency-us = <400>;
+                               exit-latency-us = <500>;
+                               min-residency-us = <4000>;
+                       };
+               };
        };
 
        extal_clk: extal {
                        compatible = "renesas,r8a77965-wdt",
                                     "renesas,rcar-gen3-wdt";
                        reg = <0 0xe6020000 0 0x0c>;
+                       interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 402>;
                        power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
                        resets = <&cpg 402>;
                        resets = <&cpg 905>;
                };
 
-               pfc: pin-controller@e6060000 {
+               pfc: pinctrl@e6060000 {
                        compatible = "renesas,pfc-r8a77965";
                        reg = <0 0xe6060000 0 0x50c>;
                };
                        resets = <&cpg 407>;
                };
 
+               tmu0: timer@e61e0000 {
+                       compatible = "renesas,tmu-r8a77965", "renesas,tmu";
+                       reg = <0 0xe61e0000 0 0x30>;
+                       interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 125>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+                       resets = <&cpg 125>;
+                       status = "disabled";
+               };
+
+               tmu1: timer@e6fc0000 {
+                       compatible = "renesas,tmu-r8a77965", "renesas,tmu";
+                       reg = <0 0xe6fc0000 0 0x30>;
+                       interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 124>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+                       resets = <&cpg 124>;
+                       status = "disabled";
+               };
+
+               tmu2: timer@e6fd0000 {
+                       compatible = "renesas,tmu-r8a77965", "renesas,tmu";
+                       reg = <0 0xe6fd0000 0 0x30>;
+                       interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 123>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+                       resets = <&cpg 123>;
+                       status = "disabled";
+               };
+
+               tmu3: timer@e6fe0000 {
+                       compatible = "renesas,tmu-r8a77965", "renesas,tmu";
+                       reg = <0 0xe6fe0000 0 0x30>;
+                       interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 122>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+                       resets = <&cpg 122>;
+                       status = "disabled";
+               };
+
+               tmu4: timer@ffc00000 {
+                       compatible = "renesas,tmu-r8a77965", "renesas,tmu";
+                       reg = <0 0xffc00000 0 0x30>;
+                       interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 121>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+                       resets = <&cpg 121>;
+                       status = "disabled";
+               };
+
                i2c0: i2c@e6500000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        status = "disabled";
                };
 
+               arm_cc630p: crypto@e6601000 {
+                       compatible = "arm,cryptocell-630p-ree";
+                       interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+                       reg = <0x0 0xe6601000 0 0x1000>;
+                       clocks = <&cpg CPG_MOD 229>;
+                       resets = <&cpg 229>;
+                       power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+               };
+
                dmac0: dma-controller@e6700000 {
                        compatible = "renesas,dmac-r8a77965",
                                     "renesas,rcar-dmac";
                               <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
                };
 
-               ipmmu_ds0: mmu@e6740000 {
+               ipmmu_ds0: iommu@e6740000 {
                        compatible = "renesas,ipmmu-r8a77965";
                        reg = <0 0xe6740000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 0>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_ds1: mmu@e7740000 {
+               ipmmu_ds1: iommu@e7740000 {
                        compatible = "renesas,ipmmu-r8a77965";
                        reg = <0 0xe7740000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 1>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_hc: mmu@e6570000 {
+               ipmmu_hc: iommu@e6570000 {
                        compatible = "renesas,ipmmu-r8a77965";
                        reg = <0 0xe6570000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 2>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_mm: mmu@e67b0000 {
+               ipmmu_mm: iommu@e67b0000 {
                        compatible = "renesas,ipmmu-r8a77965";
                        reg = <0 0xe67b0000 0 0x1000>;
                        interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
                        #iommu-cells = <1>;
                };
 
-               ipmmu_mp: mmu@ec670000 {
+               ipmmu_mp: iommu@ec670000 {
                        compatible = "renesas,ipmmu-r8a77965";
                        reg = <0 0xec670000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 4>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_pv0: mmu@fd800000 {
+               ipmmu_pv0: iommu@fd800000 {
                        compatible = "renesas,ipmmu-r8a77965";
                        reg = <0 0xfd800000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 6>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_rt: mmu@ffc80000 {
+               ipmmu_rt: iommu@ffc80000 {
                        compatible = "renesas,ipmmu-r8a77965";
                        reg = <0 0xffc80000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 10>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_vc0: mmu@fe6b0000 {
+               ipmmu_vc0: iommu@fe6b0000 {
                        compatible = "renesas,ipmmu-r8a77965";
                        reg = <0 0xfe6b0000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 12>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_vi0: mmu@febd0000 {
+               ipmmu_vi0: iommu@febd0000 {
                        compatible = "renesas,ipmmu-r8a77965";
                        reg = <0 0xfebd0000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 14>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_vp0: mmu@fe990000 {
+               ipmmu_vp0: iommu@fe990000 {
                        compatible = "renesas,ipmmu-r8a77965";
                        reg = <0 0xfe990000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 16>;
                                          "ch20", "ch21", "ch22", "ch23",
                                          "ch24";
                        clocks = <&cpg CPG_MOD 812>;
+                       clock-names = "fck";
                        power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
                        resets = <&cpg 812>;
                        phy-mode = "rgmii";
+                       rx-internal-delay-ps = <0>;
+                       tx-internal-delay-ps = <0>;
                        iommus = <&ipmmu_ds0 16>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        reg = <0 0xe66c0000 0 0x8000>;
                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
                                   <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ch_int", "g_int";
                        clocks = <&cpg CPG_MOD 914>,
                               <&cpg CPG_CORE R8A77965_CLK_CANFD>,
                               <&can_clk>;
                        };
                };
 
+               drif00: rif@e6f40000 {
+                       compatible = "renesas,r8a77965-drif",
+                                    "renesas,rcar-gen3-drif";
+                       reg = <0 0xe6f40000 0 0x84>;
+                       interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 515>;
+                       clock-names = "fck";
+                       dmas = <&dmac1 0x20>, <&dmac2 0x20>;
+                       dma-names = "rx", "rx";
+                       power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+                       resets = <&cpg 515>;
+                       renesas,bonding = <&drif01>;
+                       status = "disabled";
+               };
+
+               drif01: rif@e6f50000 {
+                       compatible = "renesas,r8a77965-drif",
+                                    "renesas,rcar-gen3-drif";
+                       reg = <0 0xe6f50000 0 0x84>;
+                       interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 514>;
+                       clock-names = "fck";
+                       dmas = <&dmac1 0x22>, <&dmac2 0x22>;
+                       dma-names = "rx", "rx";
+                       power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+                       resets = <&cpg 514>;
+                       renesas,bonding = <&drif00>;
+                       status = "disabled";
+               };
+
+               drif10: rif@e6f60000 {
+                       compatible = "renesas,r8a77965-drif",
+                                    "renesas,rcar-gen3-drif";
+                       reg = <0 0xe6f60000 0 0x84>;
+                       interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 513>;
+                       clock-names = "fck";
+                       dmas = <&dmac1 0x24>, <&dmac2 0x24>;
+                       dma-names = "rx", "rx";
+                       power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+                       resets = <&cpg 513>;
+                       renesas,bonding = <&drif11>;
+                       status = "disabled";
+               };
+
+               drif11: rif@e6f70000 {
+                       compatible = "renesas,r8a77965-drif",
+                                    "renesas,rcar-gen3-drif";
+                       reg = <0 0xe6f70000 0 0x84>;
+                       interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 512>;
+                       clock-names = "fck";
+                       dmas = <&dmac1 0x26>, <&dmac2 0x26>;
+                       dma-names = "rx", "rx";
+                       power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+                       resets = <&cpg 512>;
+                       renesas,bonding = <&drif10>;
+                       status = "disabled";
+               };
+
+               drif20: rif@e6f80000 {
+                       compatible = "renesas,r8a77965-drif",
+                                    "renesas,rcar-gen3-drif";
+                       reg = <0 0xe6f80000 0 0x84>;
+                       interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 511>;
+                       clock-names = "fck";
+                       dmas = <&dmac1 0x28>, <&dmac2 0x28>;
+                       dma-names = "rx", "rx";
+                       power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+                       resets = <&cpg 511>;
+                       renesas,bonding = <&drif21>;
+                       status = "disabled";
+               };
+
+               drif21: rif@e6f90000 {
+                       compatible = "renesas,r8a77965-drif",
+                                    "renesas,rcar-gen3-drif";
+                       reg = <0 0xe6f90000 0 0x84>;
+                       interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 510>;
+                       clock-names = "fck";
+                       dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
+                       dma-names = "rx", "rx";
+                       power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+                       resets = <&cpg 510>;
+                       renesas,bonding = <&drif20>;
+                       status = "disabled";
+               };
+
+               drif30: rif@e6fa0000 {
+                       compatible = "renesas,r8a77965-drif",
+                                    "renesas,rcar-gen3-drif";
+                       reg = <0 0xe6fa0000 0 0x84>;
+                       interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 509>;
+                       clock-names = "fck";
+                       dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
+                       dma-names = "rx", "rx";
+                       power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+                       resets = <&cpg 509>;
+                       renesas,bonding = <&drif31>;
+                       status = "disabled";
+               };
+
+               drif31: rif@e6fb0000 {
+                       compatible = "renesas,r8a77965-drif",
+                                    "renesas,rcar-gen3-drif";
+                       reg = <0 0xe6fb0000 0 0x84>;
+                       interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 508>;
+                       clock-names = "fck";
+                       dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
+                       dma-names = "rx", "rx";
+                       power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+                       resets = <&cpg 508>;
+                       renesas,bonding = <&drif30>;
+                       status = "disabled";
+               };
+
                rcar_sound: sound@ec500000 {
                        /*
                         * #sound-dai-cells is required
                         * clkout       : #clock-cells = <0>;   <&rcar_sound>;
                         * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
                         */
-                       compatible =  "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3";
-                       reg =   <0 0xec500000 0 0x1000>, /* SCU */
-                               <0 0xec5a0000 0 0x100>,  /* ADG */
-                               <0 0xec540000 0 0x1000>, /* SSIU */
-                               <0 0xec541000 0 0x280>,  /* SSI */
-                               <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
+                       compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3";
+                       reg = <0 0xec500000 0 0x1000>, /* SCU */
+                             <0 0xec5a0000 0 0x100>,  /* ADG */
+                             <0 0xec540000 0 0x1000>, /* SSIU */
+                             <0 0xec541000 0 0x280>,  /* SSI */
+                             <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
                        reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
 
                        clocks = <&cpg CPG_MOD 1005>,
                                        dma-names = "rx", "tx";
                                };
                                ssiu40: ssiu-32 {
-                                       dmas =  <&audma0 0x71>, <&audma1 0x72>;
+                                       dmas = <&audma0 0x71>, <&audma1 0x72>;
                                        dma-names = "rx", "tx";
                                };
                                ssiu41: ssiu-33 {
                        };
                };
 
+               mlp: mlp@ec520000 {
+                       compatible = "renesas,r8a77965-mlp",
+                                    "renesas,rcar-gen3-mlp";
+                       reg = <0 0xec520000 0 0x800>;
+                       interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
+                               <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 802>;
+                       power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+                       resets = <&cpg 802>;
+                       status = "disabled";
+               };
+
                audma0: dma-controller@ec700000 {
                        compatible = "renesas,dmac-r8a77965",
                                     "renesas,rcar-dmac";
                        status = "disabled";
                };
 
-               sdhi0: sd@ee100000 {
+               sdhi0: mmc@ee100000 {
                        compatible = "renesas,sdhi-r8a77965",
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee100000 0 0x2000>;
                        interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 314>;
+                       clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77965_CLK_SD0H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
                        resets = <&cpg 314>;
                        status = "disabled";
                };
 
-               sdhi1: sd@ee120000 {
+               sdhi1: mmc@ee120000 {
                        compatible = "renesas,sdhi-r8a77965",
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee120000 0 0x2000>;
                        interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 313>;
+                       clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77965_CLK_SD1H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
                        resets = <&cpg 313>;
                        status = "disabled";
                };
 
-               sdhi2: sd@ee140000 {
+               sdhi2: mmc@ee140000 {
                        compatible = "renesas,sdhi-r8a77965",
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee140000 0 0x2000>;
                        interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 312>;
+                       clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A77965_CLK_SD2H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
                        resets = <&cpg 312>;
                        status = "disabled";
                };
 
-               sdhi3: sd@ee160000 {
+               sdhi3: mmc@ee160000 {
                        compatible = "renesas,sdhi-r8a77965",
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee160000 0 0x2000>;
                        interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 311>;
+                       clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77965_CLK_SD3H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
                        resets = <&cpg 311>;
                        status = "disabled";
                };
 
+               rpc: spi@ee200000 {
+                       compatible = "renesas,r8a77965-rpc-if",
+                                    "renesas,rcar-gen3-rpc-if";
+                       reg = <0 0xee200000 0 0x200>,
+                             <0 0x08000000 0 0x04000000>,
+                             <0 0xee208000 0 0x100>;
+                       reg-names = "regs", "dirmap", "wbuf";
+                       interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 917>;
+                       power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+                       resets = <&cpg 917>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
                sata: sata@ee300000 {
                        compatible = "renesas,sata-r8a77965",
                                     "renesas,rcar-gen3-sata";
                                #address-cells = <1>;
                                #size-cells = <0>;
 
+                               port@0 {
+                                       reg = <0>;
+                               };
+
                                port@1 {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
                                #address-cells = <1>;
                                #size-cells = <0>;
 
+                               port@0 {
+                                       reg = <0>;
+                               };
+
                                port@1 {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
                        interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 724>,
-                                <&cpg CPG_MOD 723>,
+                       clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
                                 <&cpg CPG_MOD 721>;
                        clock-names = "du.0", "du.1", "du.3";
+                       resets = <&cpg 724>, <&cpg 722>;
+                       reset-names = "du.0", "du.3";
 
                        renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>;
-                       vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
+                       renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
 
                        status = "disabled";
 
 
                                port@0 {
                                        reg = <0>;
-                                       du_out_rgb: endpoint {
-                                       };
                                };
                                port@1 {
                                        reg = <1>;
                                };
                                port@1 {
                                        reg = <1>;
-                                       lvds0_out: endpoint {
-                                       };
                                };
                        };
                };
        };
 
        thermal-zones {
-               sensor_thermal1: sensor-thermal1 {
+               sensor1_thermal: sensor1-thermal {
                        polling-delay-passive = <250>;
                        polling-delay = <1000>;
                        thermal-sensors = <&tsc 0>;
                        };
                };
 
-               sensor_thermal2: sensor-thermal2 {
+               sensor2_thermal: sensor2-thermal {
                        polling-delay-passive = <250>;
                        polling-delay = <1000>;
                        thermal-sensors = <&tsc 1>;
                        };
                };
 
-               sensor_thermal3: sensor-thermal3 {
+               sensor3_thermal: sensor3-thermal {
                        polling-delay-passive = <250>;
                        polling-delay = <1000>;
                        thermal-sensors = <&tsc 2>;
index 2afb91ec9c8d92cd9fc8016325780deefb3cb3c0..004a5eacd460da9517be440663cf7fd080fd2b1b 100644 (file)
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Device Tree Source for the Eagle board
+ * Device Tree Source for the Eagle board with R-Car V3M
  *
  * Copyright (C) 2016-2017 Renesas Electronics Corp.
  * Copyright (C) 2017 Cogent Embedded, Inc.
@@ -8,12 +8,18 @@
 
 /dts-v1/;
 #include "r8a77970.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 
 / {
        model = "Renesas Eagle board based on r8a77970";
        compatible = "renesas,eagle", "renesas,r8a77970";
 
        aliases {
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               i2c2 = &i2c2;
+               i2c3 = &i2c3;
+               i2c4 = &i2c4;
                serial0 = &scif0;
                ethernet0 = &avb;
        };
                /* first 128MB is reserved for secure area. */
                reg = <0x0 0x48000000 0x0 0x38000000>;
        };
+
+       x1_clk: x1-clock {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <148500000>;
+       };
 };
 
 &avb {
 
        renesas,no-ether-link;
        phy-handle = <&phy0>;
-       phy-mode = "rgmii-id";
+       rx-internal-delay-ps = <1800>;
+       tx-internal-delay-ps = <2000>;
        status = "okay";
 
        phy0: ethernet-phy@0 {
+               compatible = "ethernet-phy-id0022.1622",
+                            "ethernet-phy-ieee802.3-c22";
                rxc-skew-ps = <1500>;
                reg = <0>;
                interrupt-parent = <&gpio1>;
                interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
+               reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
        };
 };
 
        };
 };
 
+&csi40 {
+       status = "okay";
+
+       ports {
+               port@0 {
+                       csi40_in: endpoint {
+                               clock-lanes = <0>;
+                               data-lanes = <1 2 3 4>;
+                               remote-endpoint = <&max9286_out0>;
+                       };
+               };
+       };
+};
+
 &du {
+       clocks = <&cpg CPG_MOD 724>, <&x1_clk>;
+       clock-names = "du.0", "dclkin.0";
        status = "okay";
 };
 
                adi,input-depth = <8>;
                adi,input-colorspace = "rgb";
                adi,input-clock = "1x";
-               adi,input-style = <1>;
-               adi,input-justification = "evenly";
 
                ports {
                        #address-cells = <1>;
        };
 };
 
+&i2c3 {
+       pinctrl-0 = <&i2c3_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+       clock-frequency = <400000>;
+
+       gmsl0: gmsl-deserializer@48 {
+               compatible = "maxim,max9286";
+               reg = <0x48>;
+
+               maxim,gpio-poc = <0 GPIO_ACTIVE_LOW>;
+               enable-gpios = <&io_expander 0 GPIO_ACTIVE_HIGH>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                       };
+
+                       port@1 {
+                               reg = <1>;
+                       };
+
+                       port@2 {
+                               reg = <2>;
+                       };
+
+                       port@3 {
+                               reg = <3>;
+                       };
+
+                       port@4 {
+                               reg = <4>;
+                               max9286_out0: endpoint {
+                                       clock-lanes = <0>;
+                                       data-lanes = <1 2 3 4>;
+                                       remote-endpoint = <&csi40_in>;
+                               };
+                       };
+               };
+
+               i2c-mux {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       i2c@0 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               reg = <0>;
+
+                               status = "disabled";
+                       };
+
+                       i2c@1 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               reg = <1>;
+
+                               status = "disabled";
+                       };
+
+                       i2c@2 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               reg = <2>;
+
+                               status = "disabled";
+                       };
+
+                       i2c@3 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               reg = <3>;
+
+                               status = "disabled";
+                       };
+               };
+       };
+};
+
 &lvds0 {
        status = "okay";
 
                function = "i2c0";
        };
 
+       i2c3_pins: i2c3 {
+               groups = "i2c3_a";
+               function = "i2c3";
+       };
+
+       qspi0_pins: qspi0 {
+               groups = "qspi0_ctrl", "qspi0_data4";
+               function = "qspi0";
+       };
+
        scif0_pins: scif0 {
                groups = "scif0_data";
                function = "scif0";
        };
 };
 
+&rpc {
+       pinctrl-0 = <&qspi0_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+
+       flash@0 {
+               compatible = "spansion,s25fs512s", "jedec,spi-nor";
+               reg = <0>;
+               spi-max-frequency = <50000000>;
+               spi-rx-bus-width = <4>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       bootparam@0 {
+                               reg = <0x00000000 0x040000>;
+                               read-only;
+                       };
+                       cr7@40000 {
+                               reg = <0x00040000 0x080000>;
+                               read-only;
+                       };
+                       cert_header_sa3@c0000 {
+                               reg = <0x000c0000 0x080000>;
+                               read-only;
+                       };
+                       bl2@140000 {
+                               reg = <0x00140000 0x040000>;
+                               read-only;
+                       };
+                       cert_header_sa6@180000 {
+                               reg = <0x00180000 0x040000>;
+                               read-only;
+                       };
+                       bl31@1c0000 {
+                               reg = <0x001c0000 0x460000>;
+                               read-only;
+                       };
+                       uboot@640000 {
+                               reg = <0x00640000 0x0c0000>;
+                               read-only;
+                       };
+                       uboot-env@700000 {
+                               reg = <0x00700000 0x040000>;
+                               read-only;
+                       };
+                       dtb@740000 {
+                               reg = <0x00740000 0x080000>;
+                       };
+                       kernel@7c0000 {
+                               reg = <0x007c0000 0x1400000>;
+                       };
+                       user@1bc0000 {
+                               reg = <0x01bc0000 0x2440000>;
+                       };
+               };
+       };
+};
+
 &rwdt {
        timeout-sec = <60>;
        status = "okay";
index 664a73a2cc69dc2a66374a9f536a0e4ebc624240..ed6e2e47c60479efbb28f43679ebd222e936c9f1 100644 (file)
        #address-cells = <2>;
        #size-cells = <2>;
 
-       aliases {
-               i2c0 = &i2c0;
-               i2c1 = &i2c1;
-               i2c2 = &i2c2;
-               i2c3 = &i2c3;
-               i2c4 = &i2c4;
-       };
-
        /* External CAN clock - to be overridden by boards that provide it */
        can_clk: can {
                compatible = "fixed-clock";
                        compatible = "renesas,r8a77970-wdt",
                                     "renesas,rcar-gen3-wdt";
                        reg = <0 0xe6020000 0 0x0c>;
+                       interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 402>;
                        power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
                        resets = <&cpg 402>;
                        resets = <&cpg 907>;
                };
 
-               pfc: pin-controller@e6060000 {
+               pfc: pinctrl@e6060000 {
                        compatible = "renesas,pfc-r8a77970";
                        reg = <0 0xe6060000 0 0x504>;
                };
                        reg = <0 0xe66c0000 0 0x8000>;
                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ch_int", "g_int";
                        clocks = <&cpg CPG_MOD 914>,
                                 <&cpg CPG_CORE R8A77970_CLK_CANFD>,
                                 <&can_clk>;
                                          "ch20", "ch21", "ch22", "ch23",
                                          "ch24";
                        clocks = <&cpg CPG_MOD 812>;
+                       clock-names = "fck";
                        power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
                        resets = <&cpg 812>;
                        phy-mode = "rgmii";
+                       rx-internal-delay-ps = <0>;
+                       tx-internal-delay-ps = <0>;
                        iommus = <&ipmmu_rt 3>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                               <&ipmmu_ds1 22>, <&ipmmu_ds1 23>;
                };
 
-               ipmmu_ds1: mmu@e7740000 {
+               ipmmu_ds1: iommu@e7740000 {
                        compatible = "renesas,ipmmu-r8a77970";
                        reg = <0 0xe7740000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 0>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_ir: mmu@ff8b0000 {
+               ipmmu_ir: iommu@ff8b0000 {
                        compatible = "renesas,ipmmu-r8a77970";
                        reg = <0 0xff8b0000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 3>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_mm: mmu@e67b0000 {
+               ipmmu_mm: iommu@e67b0000 {
                        compatible = "renesas,ipmmu-r8a77970";
                        reg = <0 0xe67b0000 0 0x1000>;
                        interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
                        #iommu-cells = <1>;
                };
 
-               ipmmu_rt: mmu@ffc80000 {
+               ipmmu_rt: iommu@ffc80000 {
                        compatible = "renesas,ipmmu-r8a77970";
                        reg = <0 0xffc80000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 7>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_vi0: mmu@febd0000 {
+               ipmmu_vi0: iommu@febd0000 {
                        compatible = "renesas,ipmmu-r8a77970";
                        reg = <0 0xfebd0000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 9>;
                        status = "disabled";
                };
 
+               rpc: spi@ee200000 {
+                       compatible = "renesas,r8a77970-rpc-if",
+                                    "renesas,rcar-gen3-rpc-if";
+                       reg = <0 0xee200000 0 0x200>,
+                             <0 0x08000000 0 0x4000000>,
+                             <0 0xee208000 0 0x100>;
+                       reg-names = "regs", "dirmap", "wbuf";
+                       interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 917>;
+                       power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
+                       resets = <&cpg 917>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
                gic: interrupt-controller@f1010000 {
                        compatible = "arm,gic-400";
                        #interrupt-cells = <3>;
                                #address-cells = <1>;
                                #size-cells = <0>;
 
+                               port@0 {
+                                       reg = <0>;
+                               };
+
                                port@1 {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
                        clock-names = "du.0";
                        power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
                        resets = <&cpg 724>;
-                       vsps = <&vspd0 0>;
+                       reset-names = "du.0";
+                       renesas,vsps = <&vspd0 0>;
+
                        status = "disabled";
 
                        ports {
 
                                port@0 {
                                        reg = <0>;
-                                       du_out_rgb: endpoint {
-                                       };
                                };
 
                                port@1 {
                                };
                                port@1 {
                                        reg = <1>;
-                                       lvds0_out: endpoint {
-                                       };
                                };
                        };
                };
index f0a0a51d73c051163da67cc806f1e3e7d0869355..1d326552e2facd06b93fe0e0cd21d48c8c7f60c9 100644 (file)
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Device Tree Source for the Condor board
+ * Device Tree Source for the Condor board with R-Car V3H
  *
  * Copyright (C) 2018 Renesas Electronics Corp.
  * Copyright (C) 2018 Cogent Embedded, Inc.
@@ -8,279 +8,9 @@
 
 /dts-v1/;
 #include "r8a77980.dtsi"
+#include "condor-common.dtsi"
 
 / {
        model = "Renesas Condor board based on r8a77980";
        compatible = "renesas,condor", "renesas,r8a77980";
-
-       aliases {
-               serial0 = &scif0;
-               ethernet0 = &gether;
-       };
-
-       chosen {
-               stdout-path = "serial0:115200n8";
-       };
-
-       d1_8v: regulator-2 {
-               compatible = "regulator-fixed";
-               regulator-name = "D1.8V";
-               regulator-min-microvolt = <1800000>;
-               regulator-max-microvolt = <1800000>;
-               regulator-boot-on;
-               regulator-always-on;
-       };
-
-       d3_3v: regulator-0 {
-               compatible = "regulator-fixed";
-               regulator-name = "D3.3V";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
-               regulator-boot-on;
-               regulator-always-on;
-       };
-
-       hdmi-out {
-               compatible = "hdmi-connector";
-               type = "a";
-
-               port {
-                       hdmi_con: endpoint {
-                               remote-endpoint = <&adv7511_out>;
-                       };
-               };
-       };
-
-       lvds-decoder {
-               compatible = "thine,thc63lvd1024";
-               vcc-supply = <&d3_3v>;
-
-               ports {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-
-                       port@0 {
-                               reg = <0>;
-                               thc63lvd1024_in: endpoint {
-                                       remote-endpoint = <&lvds0_out>;
-                               };
-                       };
-
-                       port@2 {
-                               reg = <2>;
-                               thc63lvd1024_out: endpoint {
-                                       remote-endpoint = <&adv7511_in>;
-                               };
-                       };
-               };
-       };
-
-       memory@48000000 {
-               device_type = "memory";
-               /* first 128MB is reserved for secure area. */
-               reg = <0 0x48000000 0 0x78000000>;
-       };
-
-       vddq_vin01: regulator-1 {
-               compatible = "regulator-fixed";
-               regulator-name = "VDDQ_VIN01";
-               regulator-min-microvolt = <1800000>;
-               regulator-max-microvolt = <1800000>;
-               regulator-boot-on;
-               regulator-always-on;
-       };
-
-       x1_clk: x1-clock {
-               compatible = "fixed-clock";
-               #clock-cells = <0>;
-               clock-frequency = <148500000>;
-       };
-};
-
-&canfd {
-       pinctrl-0 = <&canfd0_pins>;
-       pinctrl-names = "default";
-       status = "okay";
-
-       channel0 {
-               status = "okay";
-       };
-};
-
-&du {
-       clocks = <&cpg CPG_MOD 724>,
-                <&x1_clk>;
-       clock-names = "du.0", "dclkin.0";
-       status = "okay";
-};
-
-&extal_clk {
-       clock-frequency = <16666666>;
-};
-
-&extalr_clk {
-       clock-frequency = <32768>;
-};
-
-&gether {
-       pinctrl-0 = <&gether_pins>;
-       pinctrl-names = "default";
-
-       phy-mode = "rgmii-id";
-       phy-handle = <&phy0>;
-       renesas,no-ether-link;
-       status = "okay";
-
-       phy0: ethernet-phy@0 {
-               rxc-skew-ps = <1500>;
-               reg = <0>;
-               interrupt-parent = <&gpio4>;
-               interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
-       };
-};
-
-&i2c0 {
-       pinctrl-0 = <&i2c0_pins>;
-       pinctrl-names = "default";
-
-       status = "okay";
-       clock-frequency = <400000>;
-
-       io_expander0: gpio@20 {
-               compatible = "onnn,pca9654";
-               reg = <0x20>;
-               gpio-controller;
-               #gpio-cells = <2>;
-       };
-
-       io_expander1: gpio@21 {
-               compatible = "onnn,pca9654";
-               reg = <0x21>;
-               gpio-controller;
-               #gpio-cells = <2>;
-       };
-
-       hdmi@39 {
-               compatible = "adi,adv7511w";
-               reg = <0x39>;
-               interrupt-parent = <&gpio1>;
-               interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
-               avdd-supply = <&d1_8v>;
-               dvdd-supply = <&d1_8v>;
-               pvdd-supply = <&d1_8v>;
-               bgvdd-supply = <&d1_8v>;
-               dvdd-3v-supply = <&d3_3v>;
-
-               adi,input-depth = <8>;
-               adi,input-colorspace = "rgb";
-               adi,input-clock = "1x";
-               adi,input-style = <1>;
-               adi,input-justification = "evenly";
-
-               ports {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-
-                       port@0 {
-                               reg = <0>;
-                               adv7511_in: endpoint {
-                                       remote-endpoint = <&thc63lvd1024_out>;
-                               };
-                       };
-
-                       port@1 {
-                               reg = <1>;
-                               adv7511_out: endpoint {
-                                       remote-endpoint = <&hdmi_con>;
-                               };
-                       };
-               };
-       };
-};
-
-&lvds0 {
-       status = "okay";
-
-       ports {
-               port@1 {
-                       lvds0_out: endpoint {
-                               remote-endpoint = <&thc63lvd1024_in>;
-                       };
-               };
-       };
-};
-
-&mmc0 {
-       pinctrl-0 = <&mmc_pins>;
-       pinctrl-1 = <&mmc_pins>;
-       pinctrl-names = "default", "state_uhs";
-
-       vmmc-supply = <&d3_3v>;
-       vqmmc-supply = <&vddq_vin01>;
-       mmc-hs200-1_8v;
-       bus-width = <8>;
-       non-removable;
-       status = "okay";
-};
-
-&pciec {
-       status = "okay";
-};
-
-&pcie_bus_clk {
-       clock-frequency = <100000000>;
-};
-
-&pcie_phy {
-       status = "okay";
-};
-
-&pfc {
-       canfd0_pins: canfd0 {
-               groups = "canfd0_data_a";
-               function = "canfd0";
-       };
-
-       gether_pins: gether {
-               groups = "gether_mdio_a", "gether_rgmii",
-                        "gether_txcrefclk", "gether_txcrefclk_mega";
-               function = "gether";
-       };
-
-       i2c0_pins: i2c0 {
-               groups = "i2c0";
-               function = "i2c0";
-       };
-
-       mmc_pins: mmc {
-               groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
-               function = "mmc";
-               power-source = <1800>;
-       };
-
-       scif0_pins: scif0 {
-               groups = "scif0_data";
-               function = "scif0";
-       };
-
-       scif_clk_pins: scif_clk {
-               groups = "scif_clk_b";
-               function = "scif_clk";
-       };
-};
-
-&rwdt {
-       timeout-sec = <60>;
-       status = "okay";
-};
-
-&scif0 {
-       pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>;
-       pinctrl-names = "default";
-
-       status = "okay";
-};
-
-&scif_clk {
-       clock-frequency = <14745600>;
 };
index b340fb469999392b31e826536270cdcc7caea667..c4ac28a0f7161d000714571af0cb6b44fa01ec21 100644 (file)
        #address-cells = <2>;
        #size-cells = <2>;
 
-       aliases {
-               i2c0 = &i2c0;
-               i2c1 = &i2c1;
-               i2c2 = &i2c2;
-               i2c3 = &i2c3;
-               i2c4 = &i2c4;
-               i2c5 = &i2c5;
-       };
-
        /* External CAN clock - to be overridden by boards that provide it */
        can_clk: can {
                compatible = "fixed-clock";
                        compatible = "renesas,r8a77980-wdt",
                                     "renesas,rcar-gen3-wdt";
                        reg = <0 0xe6020000 0 0x0c>;
+                       interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 402>;
                        power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
                        resets = <&cpg 402>;
                        resets = <&cpg 907>;
                };
 
-               pfc: pin-controller@e6060000 {
+               pfc: pinctrl@e6060000 {
                        compatible = "renesas,pfc-r8a77980";
                        reg = <0 0xe6060000 0 0x50c>;
                };
                        reg = <0 0xe66c0000 0 0x8000>;
                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ch_int", "g_int";
                        clocks = <&cpg CPG_MOD 914>,
                                 <&cpg CPG_CORE R8A77980_CLK_CANFD>,
                                 <&can_clk>;
                                          "ch20", "ch21", "ch22", "ch23",
                                          "ch24";
                        clocks = <&cpg CPG_MOD 812>;
+                       clock-names = "fck";
                        power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
                        resets = <&cpg 812>;
                        phy-mode = "rgmii";
+                       rx-internal-delay-ps = <0>;
+                       tx-internal-delay-ps = <2000>;
                        iommus = <&ipmmu_ds1 33>;
                        #address-cells = <1>;
                        #size-cells = <0>;
 
                                        reg = <1>;
 
-                                       vin4csi41: endpoint@2 {
-                                               reg = <2>;
+                                       vin4csi41: endpoint@3 {
+                                               reg = <3>;
                                                remote-endpoint = <&csi41vin4>;
                                        };
                                };
 
                                        reg = <1>;
 
-                                       vin5csi41: endpoint@2 {
-                                               reg = <2>;
+                                       vin5csi41: endpoint@3 {
+                                               reg = <3>;
                                                remote-endpoint = <&csi41vin5>;
                                        };
                                };
 
                                        reg = <1>;
 
-                                       vin6csi41: endpoint@2 {
-                                               reg = <2>;
+                                       vin6csi41: endpoint@3 {
+                                               reg = <3>;
                                                remote-endpoint = <&csi41vin6>;
                                        };
                                };
 
                                        reg = <1>;
 
-                                       vin7csi41: endpoint@2 {
-                                               reg = <2>;
+                                       vin7csi41: endpoint@3 {
+                                               reg = <3>;
                                                remote-endpoint = <&csi41vin7>;
                                        };
                                };
                        status = "disabled";
                };
 
-               ipmmu_ds1: mmu@e7740000 {
+               ipmmu_ds1: iommu@e7740000 {
                        compatible = "renesas,ipmmu-r8a77980";
                        reg = <0 0xe7740000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 0>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_ir: mmu@ff8b0000 {
+               ipmmu_ir: iommu@ff8b0000 {
                        compatible = "renesas,ipmmu-r8a77980";
                        reg = <0 0xff8b0000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 3>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_mm: mmu@e67b0000 {
+               ipmmu_mm: iommu@e67b0000 {
                        compatible = "renesas,ipmmu-r8a77980";
                        reg = <0 0xe67b0000 0 0x1000>;
                        interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
                        #iommu-cells = <1>;
                };
 
-               ipmmu_rt: mmu@ffc80000 {
+               ipmmu_rt: iommu@ffc80000 {
                        compatible = "renesas,ipmmu-r8a77980";
                        reg = <0 0xffc80000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 10>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_vc0: mmu@fe990000 {
+               ipmmu_vc0: iommu@fe990000 {
                        compatible = "renesas,ipmmu-r8a77980";
                        reg = <0 0xfe990000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 12>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_vi0: mmu@febd0000 {
+               ipmmu_vi0: iommu@febd0000 {
                        compatible = "renesas,ipmmu-r8a77980";
                        reg = <0 0xfebd0000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 14>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_vip0: mmu@e7b00000 {
+               ipmmu_vip0: iommu@e7b00000 {
                        compatible = "renesas,ipmmu-r8a77980";
                        reg = <0 0xe7b00000 0 0x1000>;
+                       renesas,ipmmu-main = <&ipmmu_mm 4>;
                        power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_vip1: mmu@e7960000 {
+               ipmmu_vip1: iommu@e7960000 {
                        compatible = "renesas,ipmmu-r8a77980";
                        reg = <0 0xe7960000 0 0x1000>;
+                       renesas,ipmmu-main = <&ipmmu_mm 11>;
                        power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
                        #iommu-cells = <1>;
                };
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee140000 0 0x2000>;
                        interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 314>;
+                       clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77980_CLK_SD0H>;
+                       clock-names = "core", "clkh";
                        power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
                        resets = <&cpg 314>;
                        max-frequency = <200000000>;
                        status = "disabled";
                };
 
+               rpc: spi@ee200000 {
+                       compatible = "renesas,r8a77980-rpc-if",
+                                    "renesas,rcar-gen3-rpc-if";
+                       reg = <0 0xee200000 0 0x200>,
+                             <0 0x08000000 0 0x4000000>,
+                             <0 0xee208000 0 0x100>;
+                       reg-names = "regs", "dirmap", "wbuf";
+                       interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 917>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 917>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
                gic: interrupt-controller@f1010000 {
                        compatible = "arm,gic-400";
                        #interrupt-cells = <3>;
                                #address-cells = <1>;
                                #size-cells = <0>;
 
+                               port@0 {
+                                       reg = <0>;
+                               };
+
                                port@1 {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
                                #address-cells = <1>;
                                #size-cells = <0>;
 
+                               port@0 {
+                                       reg = <0>;
+                               };
+
                                port@1 {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
                };
 
                du: display@feb00000 {
-                       compatible = "renesas,du-r8a77980",
-                                    "renesas,du-r8a77970";
+                       compatible = "renesas,du-r8a77980";
                        reg = <0 0xfeb00000 0 0x80000>;
                        interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 724>;
                        clock-names = "du.0";
                        power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
                        resets = <&cpg 724>;
-                       vsps = <&vspd0 0>;
+                       reset-names = "du.0";
+                       renesas,vsps = <&vspd0 0>;
+
                        status = "disabled";
 
                        ports {
 
                                port@0 {
                                        reg = <0>;
-                                       du_out_rgb: endpoint {
-                                       };
                                };
 
                                port@1 {
 
                                port@1 {
                                        reg = <1>;
-                                       lvds0_out: endpoint {
-                                       };
                                };
                        };
                };
        };
 
        thermal-zones {
-               thermal-sensor-1 {
+               sensor1_thermal: sensor1-thermal {
                        polling-delay-passive = <250>;
                        polling-delay = <1000>;
                        thermal-sensors = <&tsc 0>;
                        };
                };
 
-               thermal-sensor-2 {
+               sensor2_thermal: sensor2-thermal {
                        polling-delay-passive = <250>;
                        polling-delay = <1000>;
                        thermal-sensors = <&tsc 1>;
index 07a4c9bbae49179363d90c36088909010e147b09..9da0fd08f8c46b35f7846a942608a21f7cdc8ca8 100644 (file)
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Device Tree Source for the ebisu board
+ * Device Tree Source for the Ebisu board with R-Car E3
  *
  * Copyright (C) 2018 Renesas Electronics Corp.
  */
 
 /dts-v1/;
 #include "r8a77990.dtsi"
-#include <dt-bindings/gpio/gpio.h>
+#include "ebisu.dtsi"
 
 / {
        model = "Renesas Ebisu board based on r8a77990";
        compatible = "renesas,ebisu", "renesas,r8a77990";
-
-       aliases {
-               serial0 = &scif2;
-               ethernet0 = &avb;
-       };
-
-       chosen {
-               bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
-               stdout-path = "serial0:115200n8";
-       };
-
-       audio_clkout: audio-clkout {
-               /*
-                * This is same as <&rcar_sound 0>
-                * but needed to avoid cs2000/rcar_sound probe dead-lock
-                */
-               compatible = "fixed-clock";
-               #clock-cells = <0>;
-               clock-frequency = <11289600>;
-       };
-
-       backlight: backlight {
-               compatible = "pwm-backlight";
-               pwms = <&pwm3 0 50000>;
-
-               brightness-levels = <512 511 505 494 473 440 392 327 241 133 0>;
-               default-brightness-level = <10>;
-
-               power-supply = <&reg_12p0v>;
-       };
-
-       cvbs-in {
-               compatible = "composite-video-connector";
-               label = "CVBS IN";
-
-               port {
-                       cvbs_con: endpoint {
-                               remote-endpoint = <&adv7482_ain7>;
-                       };
-               };
-       };
-
-       hdmi-in {
-               compatible = "hdmi-connector";
-               label = "HDMI IN";
-               type = "a";
-
-               port {
-                       hdmi_in_con: endpoint {
-                               remote-endpoint = <&adv7482_hdmi>;
-                       };
-               };
-       };
-
-       hdmi-out {
-               compatible = "hdmi-connector";
-               type = "a";
-
-               port {
-                       hdmi_con_out: endpoint {
-                               remote-endpoint = <&adv7511_out>;
-                       };
-               };
-       };
-
-       lvds-decoder {
-               compatible = "thine,thc63lvd1024";
-               vcc-supply = <&reg_3p3v>;
-
-               ports {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-
-                       port@0 {
-                               reg = <0>;
-                               thc63lvd1024_in: endpoint {
-                                       remote-endpoint = <&lvds0_out>;
-                               };
-                       };
-
-                       port@2 {
-                               reg = <2>;
-                               thc63lvd1024_out: endpoint {
-                                       remote-endpoint = <&adv7511_in>;
-                               };
-                       };
-               };
-       };
-
-       memory@48000000 {
-               device_type = "memory";
-               /* first 128MB is reserved for secure area. */
-               reg = <0x0 0x48000000 0x0 0x38000000>;
-       };
-
-       reg_1p8v: regulator0 {
-               compatible = "regulator-fixed";
-               regulator-name = "fixed-1.8V";
-               regulator-min-microvolt = <1800000>;
-               regulator-max-microvolt = <1800000>;
-               regulator-boot-on;
-               regulator-always-on;
-       };
-
-       reg_3p3v: regulator1 {
-               compatible = "regulator-fixed";
-               regulator-name = "fixed-3.3V";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
-               regulator-boot-on;
-               regulator-always-on;
-       };
-
-       reg_12p0v: regulator2 {
-               compatible = "regulator-fixed";
-               regulator-name = "D12.0V";
-               regulator-min-microvolt = <12000000>;
-               regulator-max-microvolt = <12000000>;
-               regulator-boot-on;
-               regulator-always-on;
-       };
-
-       rsnd_ak4613: sound {
-               compatible = "simple-audio-card";
-
-               simple-audio-card,name = "rsnd-ak4613";
-               simple-audio-card,format = "left_j";
-               simple-audio-card,bitclock-master = <&sndcpu>;
-               simple-audio-card,frame-master = <&sndcpu>;
-
-               sndcodec: simple-audio-card,codec {
-                       sound-dai = <&ak4613>;
-               };
-
-               sndcpu: simple-audio-card,cpu {
-                       sound-dai = <&rcar_sound>;
-               };
-       };
-
-       vbus0_usb2: regulator-vbus0-usb2 {
-               compatible = "regulator-fixed";
-
-               regulator-name = "USB20_VBUS_CN";
-               regulator-min-microvolt = <5000000>;
-               regulator-max-microvolt = <5000000>;
-
-               gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>;
-               enable-active-high;
-       };
-
-       vcc_sdhi0: regulator-vcc-sdhi0 {
-               compatible = "regulator-fixed";
-
-               regulator-name = "SDHI0 Vcc";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
-
-               gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
-               enable-active-high;
-       };
-
-       vccq_sdhi0: regulator-vccq-sdhi0 {
-               compatible = "regulator-gpio";
-
-               regulator-name = "SDHI0 VccQ";
-               regulator-min-microvolt = <1800000>;
-               regulator-max-microvolt = <3300000>;
-
-               gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
-               gpios-states = <1>;
-               states = <3300000 1>, <1800000 0>;
-       };
-
-       vcc_sdhi1: regulator-vcc-sdhi1 {
-               compatible = "regulator-fixed";
-
-               regulator-name = "SDHI1 Vcc";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
-
-               gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
-               enable-active-high;
-       };
-
-       vccq_sdhi1: regulator-vccq-sdhi1 {
-               compatible = "regulator-gpio";
-
-               regulator-name = "SDHI1 VccQ";
-               regulator-min-microvolt = <1800000>;
-               regulator-max-microvolt = <3300000>;
-
-               gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
-               gpios-states = <1>;
-               states = <3300000 1>, <1800000 0>;
-       };
-
-       vga {
-               compatible = "vga-connector";
-
-               port {
-                       vga_in: endpoint {
-                               remote-endpoint = <&adv7123_out>;
-                       };
-               };
-       };
-
-       vga-encoder {
-               compatible = "adi,adv7123";
-
-               ports {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-
-                       port@0 {
-                               reg = <0>;
-                               adv7123_in: endpoint {
-                                       remote-endpoint = <&du_out_rgb>;
-                               };
-                       };
-                       port@1 {
-                               reg = <1>;
-                               adv7123_out: endpoint {
-                                       remote-endpoint = <&vga_in>;
-                               };
-                       };
-               };
-       };
-
-       x12_clk: x12 {
-               compatible = "fixed-clock";
-               #clock-cells = <0>;
-               clock-frequency = <24576000>;
-       };
-
-       x13_clk: x13 {
-               compatible = "fixed-clock";
-               #clock-cells = <0>;
-               clock-frequency = <74250000>;
-       };
-};
-
-&audio_clk_a {
-       clock-frequency = <22579200>;
-};
-
-&avb {
-       pinctrl-0 = <&avb_pins>;
-       pinctrl-names = "default";
-       phy-handle = <&phy0>;
-       status = "okay";
-
-       phy0: ethernet-phy@0 {
-               rxc-skew-ps = <1500>;
-               reg = <0>;
-               interrupt-parent = <&gpio2>;
-               interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
-               reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
-               /*
-                * TX clock internal delay mode is required for reliable
-                * 1Gbps communication using the KSZ9031RNX phy present on
-                * the Ebisu board, however, TX clock internal delay mode
-                * isn't supported on r8a77990.  Thus, limit speed to
-                * 100Mbps for reliable communication.
-                */
-               max-speed = <100>;
-       };
-};
-
-&canfd {
-       pinctrl-0 = <&canfd0_pins>;
-       pinctrl-names = "default";
-       status = "okay";
-
-       channel0 {
-               status = "okay";
-       };
-};
-
-&csi40 {
-       status = "okay";
-
-       ports {
-               port@0 {
-                       reg = <0>;
-
-                       csi40_in: endpoint {
-                               clock-lanes = <0>;
-                               data-lanes = <1 2>;
-                               remote-endpoint = <&adv7482_txa>;
-                       };
-               };
-       };
-};
-
-&du {
-       pinctrl-0 = <&du_pins>;
-       pinctrl-names = "default";
-       status = "okay";
-
-       clocks = <&cpg CPG_MOD 724>,
-                <&cpg CPG_MOD 723>,
-                <&x13_clk>;
-       clock-names = "du.0", "du.1", "dclkin.0";
-
-       ports {
-               port@0 {
-                       endpoint {
-                               remote-endpoint = <&adv7123_in>;
-                       };
-               };
-       };
-};
-
-&ehci0 {
-       dr_mode = "otg";
-       status = "okay";
-};
-
-&extal_clk {
-       clock-frequency = <48000000>;
-};
-
-&hsusb {
-       dr_mode = "otg";
-       status = "okay";
-};
-
-&i2c0 {
-       status = "okay";
-
-       io_expander: gpio@20 {
-               compatible = "onnn,pca9654";
-               reg = <0x20>;
-               gpio-controller;
-               #gpio-cells = <2>;
-               interrupt-parent = <&gpio2>;
-               interrupts = <22 IRQ_TYPE_LEVEL_LOW>;
-       };
-
-       hdmi-encoder@39 {
-               compatible = "adi,adv7511w";
-               reg = <0x39>;
-               interrupt-parent = <&gpio1>;
-               interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
-
-               adi,input-depth = <8>;
-               adi,input-colorspace = "rgb";
-               adi,input-clock = "1x";
-               adi,input-style = <1>;
-               adi,input-justification = "evenly";
-
-               ports {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-
-                       port@0 {
-                               reg = <0>;
-                               adv7511_in: endpoint {
-                                       remote-endpoint = <&thc63lvd1024_out>;
-                               };
-                       };
-
-                       port@1 {
-                               reg = <1>;
-                               adv7511_out: endpoint {
-                                       remote-endpoint = <&hdmi_con_out>;
-                               };
-                       };
-               };
-       };
-
-       video-receiver@70 {
-               compatible = "adi,adv7482";
-               reg = <0x70>;
-
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               interrupt-parent = <&gpio0>;
-               interrupt-names = "intrq1", "intrq2";
-               interrupts = <7 IRQ_TYPE_LEVEL_LOW>,
-                            <17 IRQ_TYPE_LEVEL_LOW>;
-
-               port@7 {
-                       reg = <7>;
-
-                       adv7482_ain7: endpoint {
-                               remote-endpoint = <&cvbs_con>;
-                       };
-               };
-
-               port@8 {
-                       reg = <8>;
-
-                       adv7482_hdmi: endpoint {
-                               remote-endpoint = <&hdmi_in_con>;
-                       };
-               };
-
-               port@a {
-                       reg = <10>;
-
-                       adv7482_txa: endpoint {
-                               clock-lanes = <0>;
-                               data-lanes = <1 2>;
-                               remote-endpoint = <&csi40_in>;
-                       };
-               };
-       };
-};
-
-&i2c3 {
-       status = "okay";
-
-       ak4613: codec@10 {
-               compatible = "asahi-kasei,ak4613";
-               #sound-dai-cells = <0>;
-               reg = <0x10>;
-               clocks = <&rcar_sound 3>;
-
-               asahi-kasei,in1-single-end;
-               asahi-kasei,in2-single-end;
-               asahi-kasei,out1-single-end;
-               asahi-kasei,out2-single-end;
-               asahi-kasei,out3-single-end;
-               asahi-kasei,out4-single-end;
-               asahi-kasei,out5-single-end;
-               asahi-kasei,out6-single-end;
-       };
-
-       cs2000: clk-multiplier@4f {
-               #clock-cells = <0>;
-               compatible = "cirrus,cs2000-cp";
-               reg = <0x4f>;
-               clocks = <&audio_clkout>, <&x12_clk>;
-               clock-names = "clk_in", "ref_clk";
-
-               assigned-clocks = <&cs2000>;
-               assigned-clock-rates = <24576000>; /* 1/1 divide */
-       };
-};
-
-&i2c_dvfs {
-       status = "okay";
-
-       clock-frequency = <400000>;
-
-       pmic: pmic@30 {
-               pinctrl-0 = <&irq0_pins>;
-               pinctrl-names = "default";
-
-               compatible = "rohm,bd9571mwv";
-               reg = <0x30>;
-               interrupt-parent = <&intc_ex>;
-               interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
-               interrupt-controller;
-               #interrupt-cells = <2>;
-               gpio-controller;
-               #gpio-cells = <2>;
-               rohm,ddr-backup-power = <0x1>;
-               rohm,rstbmode-level;
-       };
-};
-
-&lvds0 {
-       status = "okay";
-
-       clocks = <&cpg CPG_MOD 727>,
-                <&x13_clk>,
-                <&extal_clk>;
-       clock-names = "fck", "dclkin.0", "extal";
-
-       ports {
-               port@1 {
-                       lvds0_out: endpoint {
-                               remote-endpoint = <&thc63lvd1024_in>;
-                       };
-               };
-       };
-};
-
-&lvds1 {
-       /*
-        * Even though the LVDS1 output is not connected, the encoder must be
-        * enabled to supply a pixel clock to the DU for the DPAD output when
-        * LVDS0 is in use.
-        */
-       status = "okay";
-
-       clocks = <&cpg CPG_MOD 727>,
-                <&x13_clk>,
-                <&extal_clk>;
-       clock-names = "fck", "dclkin.0", "extal";
-};
-
-&ohci0 {
-       dr_mode = "otg";
-       status = "okay";
-};
-
-&pcie_bus_clk {
-       clock-frequency = <100000000>;
-};
-
-&pciec0 {
-       status = "okay";
-};
-
-&pfc {
-       avb_pins: avb {
-               mux {
-                       groups = "avb_link", "avb_mii";
-                       function = "avb";
-               };
-       };
-
-       canfd0_pins: canfd0 {
-               groups = "canfd0_data";
-               function = "canfd0";
-       };
-
-       du_pins: du {
-               groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
-               function = "du";
-       };
-
-       irq0_pins: irq0 {
-               groups = "intc_ex_irq0";
-               function = "intc_ex";
-       };
-
-       pwm3_pins: pwm3 {
-               groups = "pwm3_b";
-               function = "pwm3";
-       };
-
-       pwm5_pins: pwm5 {
-               groups = "pwm5_a";
-               function = "pwm5";
-       };
-
-       scif2_pins: scif2 {
-               groups = "scif2_data_a";
-               function = "scif2";
-       };
-
-       sdhi0_pins: sd0 {
-               groups = "sdhi0_data4", "sdhi0_ctrl";
-               function = "sdhi0";
-               power-source = <3300>;
-       };
-
-       sdhi0_pins_uhs: sd0_uhs {
-               groups = "sdhi0_data4", "sdhi0_ctrl";
-               function = "sdhi0";
-               power-source = <1800>;
-       };
-
-       sdhi1_pins: sd1 {
-               groups = "sdhi1_data4", "sdhi1_ctrl";
-               function = "sdhi1";
-               power-source = <3300>;
-       };
-
-       sdhi1_pins_uhs: sd1_uhs {
-               groups = "sdhi1_data4", "sdhi1_ctrl";
-               function = "sdhi1";
-               power-source = <1800>;
-       };
-
-       sdhi3_pins: sd3 {
-               groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
-               function = "sdhi3";
-               power-source = <1800>;
-       };
-
-       sound_clk_pins: sound_clk {
-               groups = "audio_clk_a", "audio_clk_b_a", "audio_clk_c_a",
-                        "audio_clkout_a", "audio_clkout1_a";
-               function = "audio_clk";
-       };
-
-       sound_pins: sound {
-               groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data";
-               function = "ssi";
-       };
-
-       usb0_pins: usb {
-               groups = "usb0_b", "usb0_id";
-               function = "usb0";
-       };
-
-       usb30_pins: usb30 {
-               groups = "usb30";
-               function = "usb30";
-       };
-};
-
-&pwm3 {
-       pinctrl-0 = <&pwm3_pins>;
-       pinctrl-names = "default";
-
-       status = "okay";
-};
-
-&pwm5 {
-       pinctrl-0 = <&pwm5_pins>;
-       pinctrl-names = "default";
-
-       status = "okay";
-};
-
-&rcar_sound {
-       pinctrl-0 = <&sound_pins &sound_clk_pins>;
-       pinctrl-names = "default";
-
-       /* Single DAI */
-       #sound-dai-cells = <0>;
-
-       /* audio_clkout0/1/2/3 */
-       #clock-cells = <1>;
-       clock-frequency = <12288000 11289600>;
-
-       status = "okay";
-
-       /* update <audio_clk_b> to <cs2000> */
-       clocks = <&cpg CPG_MOD 1005>,
-                <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
-                <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
-                <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
-                <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
-                <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
-                <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
-                <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
-                <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
-                <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
-                <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
-                <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
-                <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
-                <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
-                <&audio_clk_a>, <&cs2000>, <&audio_clk_c>,
-                <&cpg CPG_CORE R8A77990_CLK_ZA2>;
-
-       rcar_sound,dai {
-               dai0 {
-                       playback = <&ssi0 &src0 &dvc0>;
-                       capture  = <&ssi1 &src1 &dvc1>;
-               };
-       };
-
-};
-
-&rwdt {
-       timeout-sec = <60>;
-       status = "okay";
-};
-
-&scif2 {
-       pinctrl-0 = <&scif2_pins>;
-       pinctrl-names = "default";
-
-       status = "okay";
-};
-
-&sdhi0 {
-       pinctrl-0 = <&sdhi0_pins>;
-       pinctrl-1 = <&sdhi0_pins_uhs>;
-       pinctrl-names = "default", "state_uhs";
-
-       vmmc-supply = <&vcc_sdhi0>;
-       vqmmc-supply = <&vccq_sdhi0>;
-       cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
-       wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
-       bus-width = <4>;
-       sd-uhs-sdr50;
-       sd-uhs-sdr104;
-       status = "okay";
-};
-
-&sdhi1 {
-       pinctrl-0 = <&sdhi1_pins>;
-       pinctrl-1 = <&sdhi1_pins_uhs>;
-       pinctrl-names = "default", "state_uhs";
-
-       vmmc-supply = <&vcc_sdhi1>;
-       vqmmc-supply = <&vccq_sdhi1>;
-       cd-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>;
-       bus-width = <4>;
-       sd-uhs-sdr50;
-       sd-uhs-sdr104;
-       status = "okay";
-};
-
-&sdhi3 {
-       /* used for on-board 8bit eMMC */
-       pinctrl-0 = <&sdhi3_pins>;
-       pinctrl-1 = <&sdhi3_pins>;
-       pinctrl-names = "default", "state_uhs";
-
-       vmmc-supply = <&reg_3p3v>;
-       vqmmc-supply = <&reg_1p8v>;
-       mmc-ddr-1_8v;
-       mmc-hs200-1_8v;
-       mmc-hs400-1_8v;
-       bus-width = <8>;
-       non-removable;
-       status = "okay";
-};
-
-&ssi1 {
-       shared-pin;
-};
-
-&usb2_phy0 {
-       pinctrl-0 = <&usb0_pins>;
-       pinctrl-names = "default";
-
-       vbus-supply = <&vbus0_usb2>;
-       status = "okay";
-};
-
-&usb3_peri0 {
-       companion = <&xhci0>;
-       status = "okay";
-};
-
-&vin4 {
-       status = "okay";
-};
-
-&vin5 {
-       status = "okay";
-};
-
-&xhci0 {
-       pinctrl-0 = <&usb30_pins>;
-       pinctrl-names = "default";
-
-       status = "okay";
 };
index 32d91f2102460f276914b370a334e3f8c098d77b..3053b4b2149788c6ace5958bb7fd2616a18f4546 100644 (file)
        #address-cells = <2>;
        #size-cells = <2>;
 
-       aliases {
-               i2c0 = &i2c0;
-               i2c1 = &i2c1;
-               i2c2 = &i2c2;
-               i2c3 = &i2c3;
-               i2c4 = &i2c4;
-               i2c5 = &i2c5;
-               i2c6 = &i2c6;
-               i2c7 = &i2c7;
-       };
-
        /*
         * The external audio clocks are configured as 0 Hz fixed frequency
         * clocks by default.
@@ -55,7 +44,7 @@
                clock-frequency = <0>;
        };
 
-       cluster1_opp: opp_table10 {
+       cluster1_opp: opp-table-1 {
                compatible = "operating-points-v2";
                opp-shared;
                opp-800000000 {
@@ -88,6 +77,7 @@
                        power-domains = <&sysc R8A77990_PD_CA53_CPU0>;
                        next-level-cache = <&L2_CA53>;
                        enable-method = "psci";
+                       cpu-idle-states = <&CPU_SLEEP_0>;
                        dynamic-power-coefficient = <277>;
                        clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
                        operating-points-v2 = <&cluster1_opp>;
                        power-domains = <&sysc R8A77990_PD_CA53_CPU1>;
                        next-level-cache = <&L2_CA53>;
                        enable-method = "psci";
+                       cpu-idle-states = <&CPU_SLEEP_0>;
                        clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
                        operating-points-v2 = <&cluster1_opp>;
                };
                        cache-unified;
                        cache-level = <2>;
                };
+
+               idle-states {
+                       entry-method = "psci";
+
+                       CPU_SLEEP_0: cpu-sleep-0 {
+                               compatible = "arm,idle-state";
+                               arm,psci-suspend-param = <0x0010000>;
+                               local-timer-stop;
+                               entry-latency-us = <700>;
+                               exit-latency-us = <700>;
+                               min-residency-us = <5000>;
+                       };
+               };
        };
 
        extal_clk: extal {
                        compatible = "renesas,r8a77990-wdt",
                                     "renesas,rcar-gen3-wdt";
                        reg = <0 0xe6020000 0 0x0c>;
+                       interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 402>;
                        power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
                        resets = <&cpg 402>;
                        resets = <&cpg 906>;
                };
 
-               pfc: pin-controller@e6060000 {
+               pfc: pinctrl@e6060000 {
                        compatible = "renesas,pfc-r8a77990";
                        reg = <0 0xe6060000 0 0x508>;
                };
                i2c_dvfs: i2c@e60b0000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       compatible = "renesas,iic-r8a77990";
-                       reg = <0 0xe60b0000 0 0x15>;
+                       compatible = "renesas,iic-r8a77990",
+                                    "renesas,rcar-gen3-iic",
+                                    "renesas,rmobile-iic";
+                       reg = <0 0xe60b0000 0 0x425>;
                        interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 926>;
                        power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
                        resets = <&cpg 407>;
                };
 
+               tmu0: timer@e61e0000 {
+                       compatible = "renesas,tmu-r8a77990", "renesas,tmu";
+                       reg = <0 0xe61e0000 0 0x30>;
+                       interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 125>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+                       resets = <&cpg 125>;
+                       status = "disabled";
+               };
+
+               tmu1: timer@e6fc0000 {
+                       compatible = "renesas,tmu-r8a77990", "renesas,tmu";
+                       reg = <0 0xe6fc0000 0 0x30>;
+                       interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 124>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+                       resets = <&cpg 124>;
+                       status = "disabled";
+               };
+
+               tmu2: timer@e6fd0000 {
+                       compatible = "renesas,tmu-r8a77990", "renesas,tmu";
+                       reg = <0 0xe6fd0000 0 0x30>;
+                       interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 123>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+                       resets = <&cpg 123>;
+                       status = "disabled";
+               };
+
+               tmu3: timer@e6fe0000 {
+                       compatible = "renesas,tmu-r8a77990", "renesas,tmu";
+                       reg = <0 0xe6fe0000 0 0x30>;
+                       interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 122>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+                       resets = <&cpg 122>;
+                       status = "disabled";
+               };
+
+               tmu4: timer@ffc00000 {
+                       compatible = "renesas,tmu-r8a77990", "renesas,tmu";
+                       reg = <0 0xffc00000 0 0x30>;
+                       interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 121>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+                       resets = <&cpg 121>;
+                       status = "disabled";
+               };
+
                i2c0: i2c@e6500000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        dma-channels = <2>;
                };
 
+               arm_cc630p: crypto@e6601000 {
+                       compatible = "arm,cryptocell-630p-ree";
+                       interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+                       reg = <0x0 0xe6601000 0 0x1000>;
+                       clocks = <&cpg CPG_MOD 229>;
+                       resets = <&cpg 229>;
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+               };
+
                dmac0: dma-controller@e6700000 {
                        compatible = "renesas,dmac-r8a77990",
                                     "renesas,rcar-dmac";
                               <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
                };
 
-               ipmmu_ds0: mmu@e6740000 {
+               ipmmu_ds0: iommu@e6740000 {
                        compatible = "renesas,ipmmu-r8a77990";
                        reg = <0 0xe6740000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 0>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_ds1: mmu@e7740000 {
+               ipmmu_ds1: iommu@e7740000 {
                        compatible = "renesas,ipmmu-r8a77990";
                        reg = <0 0xe7740000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 1>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_hc: mmu@e6570000 {
+               ipmmu_hc: iommu@e6570000 {
                        compatible = "renesas,ipmmu-r8a77990";
                        reg = <0 0xe6570000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 2>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_mm: mmu@e67b0000 {
+               ipmmu_mm: iommu@e67b0000 {
                        compatible = "renesas,ipmmu-r8a77990";
                        reg = <0 0xe67b0000 0 0x1000>;
                        interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
                        #iommu-cells = <1>;
                };
 
-               ipmmu_mp: mmu@ec670000 {
+               ipmmu_mp: iommu@ec670000 {
                        compatible = "renesas,ipmmu-r8a77990";
                        reg = <0 0xec670000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 4>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_pv0: mmu@fd800000 {
+               ipmmu_pv0: iommu@fd800000 {
                        compatible = "renesas,ipmmu-r8a77990";
                        reg = <0 0xfd800000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 6>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_rt: mmu@ffc80000 {
+               ipmmu_rt: iommu@ffc80000 {
                        compatible = "renesas,ipmmu-r8a77990";
                        reg = <0 0xffc80000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 10>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_vc0: mmu@fe6b0000 {
+               ipmmu_vc0: iommu@fe6b0000 {
                        compatible = "renesas,ipmmu-r8a77990";
                        reg = <0 0xfe6b0000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 12>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_vi0: mmu@febd0000 {
+               ipmmu_vi0: iommu@febd0000 {
                        compatible = "renesas,ipmmu-r8a77990";
                        reg = <0 0xfebd0000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 14>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_vp0: mmu@fe990000 {
+               ipmmu_vp0: iommu@fe990000 {
                        compatible = "renesas,ipmmu-r8a77990";
                        reg = <0 0xfe990000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 16>;
                                          "ch20", "ch21", "ch22", "ch23",
                                          "ch24";
                        clocks = <&cpg CPG_MOD 812>;
+                       clock-names = "fck";
                        power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
                        resets = <&cpg 812>;
                        phy-mode = "rgmii";
+                       rx-internal-delay-ps = <0>;
                        iommus = <&ipmmu_ds0 16>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        reg = <0 0xe66c0000 0 0x8000>;
                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
                                   <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ch_int", "g_int";
                        clocks = <&cpg CPG_MOD 914>,
                               <&cpg CPG_CORE R8A77990_CLK_CANFD>,
                               <&can_clk>;
                        reg = <0 0xe6ea0000 0 0x0064>;
                        interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 210>;
-                       dmas = <&dmac1 0x43>, <&dmac1 0x42>,
-                              <&dmac2 0x43>, <&dmac2 0x42>;
-                       dma-names = "tx", "rx", "tx", "rx";
+                       dmas = <&dmac0 0x43>, <&dmac0 0x42>;
+                       dma-names = "tx", "rx";
                        power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
                        resets = <&cpg 210>;
                        #address-cells = <1>;
 
                                        vin4csi40: endpoint@2 {
                                                reg = <2>;
-                                               remote-endpoint= <&csi40vin4>;
+                                               remote-endpoint = <&csi40vin4>;
                                        };
                                };
                        };
 
                                        vin5csi40: endpoint@2 {
                                                reg = <2>;
-                                               remote-endpoint= <&csi40vin5>;
+                                               remote-endpoint = <&csi40vin5>;
                                        };
                                };
                        };
                };
 
+               drif00: rif@e6f40000 {
+                       compatible = "renesas,r8a77990-drif",
+                                    "renesas,rcar-gen3-drif";
+                       reg = <0 0xe6f40000 0 0x84>;
+                       interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 515>;
+                       clock-names = "fck";
+                       dmas = <&dmac1 0x20>, <&dmac2 0x20>;
+                       dma-names = "rx", "rx";
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+                       resets = <&cpg 515>;
+                       renesas,bonding = <&drif01>;
+                       status = "disabled";
+               };
+
+               drif01: rif@e6f50000 {
+                       compatible = "renesas,r8a77990-drif",
+                                    "renesas,rcar-gen3-drif";
+                       reg = <0 0xe6f50000 0 0x84>;
+                       interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 514>;
+                       clock-names = "fck";
+                       dmas = <&dmac1 0x22>, <&dmac2 0x22>;
+                       dma-names = "rx", "rx";
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+                       resets = <&cpg 514>;
+                       renesas,bonding = <&drif00>;
+                       status = "disabled";
+               };
+
+               drif10: rif@e6f60000 {
+                       compatible = "renesas,r8a77990-drif",
+                                    "renesas,rcar-gen3-drif";
+                       reg = <0 0xe6f60000 0 0x84>;
+                       interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 513>;
+                       clock-names = "fck";
+                       dmas = <&dmac1 0x24>, <&dmac2 0x24>;
+                       dma-names = "rx", "rx";
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+                       resets = <&cpg 513>;
+                       renesas,bonding = <&drif11>;
+                       status = "disabled";
+               };
+
+               drif11: rif@e6f70000 {
+                       compatible = "renesas,r8a77990-drif",
+                                    "renesas,rcar-gen3-drif";
+                       reg = <0 0xe6f70000 0 0x84>;
+                       interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 512>;
+                       clock-names = "fck";
+                       dmas = <&dmac1 0x26>, <&dmac2 0x26>;
+                       dma-names = "rx", "rx";
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+                       resets = <&cpg 512>;
+                       renesas,bonding = <&drif10>;
+                       status = "disabled";
+               };
+
+               drif20: rif@e6f80000 {
+                       compatible = "renesas,r8a77990-drif",
+                                    "renesas,rcar-gen3-drif";
+                       reg = <0 0xe6f80000 0 0x84>;
+                       interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 511>;
+                       clock-names = "fck";
+                       dmas = <&dmac0 0x28>;
+                       dma-names = "rx";
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+                       resets = <&cpg 511>;
+                       renesas,bonding = <&drif21>;
+                       status = "disabled";
+               };
+
+               drif21: rif@e6f90000 {
+                       compatible = "renesas,r8a77990-drif",
+                                    "renesas,rcar-gen3-drif";
+                       reg = <0 0xe6f90000 0 0x84>;
+                       interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 510>;
+                       clock-names = "fck";
+                       dmas = <&dmac0 0x2a>;
+                       dma-names = "rx";
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+                       resets = <&cpg 510>;
+                       renesas,bonding = <&drif20>;
+                       status = "disabled";
+               };
+
+               drif30: rif@e6fa0000 {
+                       compatible = "renesas,r8a77990-drif",
+                                    "renesas,rcar-gen3-drif";
+                       reg = <0 0xe6fa0000 0 0x84>;
+                       interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 509>;
+                       clock-names = "fck";
+                       dmas = <&dmac0 0x2c>;
+                       dma-names = "rx";
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+                       resets = <&cpg 509>;
+                       renesas,bonding = <&drif31>;
+                       status = "disabled";
+               };
+
+               drif31: rif@e6fb0000 {
+                       compatible = "renesas,r8a77990-drif",
+                                    "renesas,rcar-gen3-drif";
+                       reg = <0 0xe6fb0000 0 0x84>;
+                       interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 508>;
+                       clock-names = "fck";
+                       dmas = <&dmac0 0x2e>;
+                       dma-names = "rx";
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+                       resets = <&cpg 508>;
+                       renesas,bonding = <&drif30>;
+                       status = "disabled";
+               };
+
                rcar_sound: sound@ec500000 {
                        /*
                         * #sound-dai-cells is required
                         * clkout       : #clock-cells = <0>;   <&rcar_sound>;
                         * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
                         */
-                       compatible =  "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3";
-                       reg =   <0 0xec500000 0 0x1000>, /* SCU */
-                               <0 0xec5a0000 0 0x100>,  /* ADG */
-                               <0 0xec540000 0 0x1000>, /* SSIU */
-                               <0 0xec541000 0 0x280>,  /* SSI */
-                               <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
+                       compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3";
+                       reg = <0 0xec500000 0 0x1000>, /* SCU */
+                             <0 0xec5a0000 0 0x100>,  /* ADG */
+                             <0 0xec540000 0 0x1000>, /* SSIU */
+                             <0 0xec541000 0 0x280>,  /* SSI */
+                             <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
                        reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
 
                        clocks = <&cpg CPG_MOD 1005>,
                        };
                };
 
+               mlp: mlp@ec520000 {
+                       compatible = "renesas,r8a77990-mlp",
+                                    "renesas,rcar-gen3-mlp";
+                       reg = <0 0xec520000 0 0x800>;
+                       interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
+                               <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 802>;
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+                       resets = <&cpg 802>;
+                       status = "disabled";
+               };
+
                audma0: dma-controller@ec700000 {
                        compatible = "renesas,dmac-r8a77990",
                                     "renesas,rcar-dmac";
                        status = "disabled";
                };
 
-               sdhi0: sd@ee100000 {
+               sdhi0: mmc@ee100000 {
                        compatible = "renesas,sdhi-r8a77990",
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee100000 0 0x2000>;
                        interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 314>;
+                       clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77990_CLK_SD0H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
                        resets = <&cpg 314>;
                        status = "disabled";
                };
 
-               sdhi1: sd@ee120000 {
+               sdhi1: mmc@ee120000 {
                        compatible = "renesas,sdhi-r8a77990",
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee120000 0 0x2000>;
                        interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 313>;
+                       clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77990_CLK_SD1H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
                        resets = <&cpg 313>;
                        status = "disabled";
                };
 
-               sdhi3: sd@ee160000 {
+               sdhi3: mmc@ee160000 {
                        compatible = "renesas,sdhi-r8a77990",
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee160000 0 0x2000>;
                        interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 311>;
+                       clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77990_CLK_SD3H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
                        resets = <&cpg 311>;
                        status = "disabled";
                };
 
+               rpc: spi@ee200000 {
+                       compatible = "renesas,r8a77990-rpc-if",
+                                    "renesas,rcar-gen3-rpc-if";
+                       reg = <0 0xee200000 0 0x200>,
+                             <0 0x08000000 0 0x04000000>,
+                             <0 0xee208000 0 0x100>;
+                       reg-names = "regs", "dirmap", "wbuf";
+                       interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 917>;
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+                       resets = <&cpg 917>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
                gic: interrupt-controller@f1010000 {
                        compatible = "arm,gic-400";
                        #interrupt-cells = <3>;
                                #address-cells = <1>;
                                #size-cells = <0>;
 
+                               port@0 {
+                                       reg = <0>;
+                               };
+
                                port@1 {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
                        reg = <0 0xfeb00000 0 0x40000>;
                        interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 724>,
-                                <&cpg CPG_MOD 723>;
+                       clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
                        clock-names = "du.0", "du.1";
                        resets = <&cpg 724>;
                        reset-names = "du.0";
 
                        renesas,cmms = <&cmm0>, <&cmm1>;
-                       vsps = <&vspd0 0>, <&vspd1 0>;
+                       renesas,vsps = <&vspd0 0>, <&vspd1 0>;
 
                        status = "disabled";
 
 
                                port@0 {
                                        reg = <0>;
-                                       du_out_rgb: endpoint {
-                                       };
                                };
 
                                port@1 {
 
                                port@1 {
                                        reg = <1>;
-                                       lvds0_out: endpoint {
-                                       };
                                };
                        };
                };
 
                                port@1 {
                                        reg = <1>;
-                                       lvds1_out: endpoint {
-                                       };
                                };
                        };
                };
                cpu-thermal {
                        polling-delay-passive = <250>;
                        polling-delay = <0>;
-                       thermal-sensors = <&thermal 0>;
+                       thermal-sensors = <&thermal>;
                        sustainable-power = <717>;
 
                        cooling-maps {
index 67634cb01d6b68567e23d1554b969915181df26c..384825617fcff1ff6fb1d68d631689d47ce94a90 100644 (file)
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Device Tree Source for the Draak board
+ * Device Tree Source for the Draak board with R-Car D3
  *
  * Copyright (C) 2016-2018 Renesas Electronics Corp.
  * Copyright (C) 2017 Glider bvba
@@ -8,521 +8,9 @@
 
 /dts-v1/;
 #include "r8a77995.dtsi"
-#include <dt-bindings/gpio/gpio.h>
+#include "draak.dtsi"
 
 / {
        model = "Renesas Draak board based on r8a77995";
        compatible = "renesas,draak", "renesas,r8a77995";
-
-       aliases {
-               serial0 = &scif2;
-               ethernet0 = &avb;
-       };
-
-       backlight: backlight {
-               compatible = "pwm-backlight";
-               pwms = <&pwm1 0 50000>;
-
-               brightness-levels = <512 511 505 494 473 440 392 327 241 133 0>;
-               default-brightness-level = <10>;
-
-               power-supply = <&reg_12p0v>;
-               enable-gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
-       };
-
-       chosen {
-               bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
-               stdout-path = "serial0:115200n8";
-       };
-
-       composite-in {
-               compatible = "composite-video-connector";
-
-               port {
-                       composite_con_in: endpoint {
-                               remote-endpoint = <&adv7180_in>;
-                       };
-               };
-       };
-
-       hdmi-in {
-               compatible = "hdmi-connector";
-               type = "a";
-
-               port {
-                       hdmi_con_in: endpoint {
-                               remote-endpoint = <&adv7612_in>;
-                       };
-               };
-       };
-
-       hdmi-out {
-               compatible = "hdmi-connector";
-               type = "a";
-
-               port {
-                       hdmi_con_out: endpoint {
-                               remote-endpoint = <&adv7511_out>;
-                       };
-               };
-       };
-
-       lvds-decoder {
-               compatible = "thine,thc63lvd1024";
-               vcc-supply = <&reg_3p3v>;
-
-               ports {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-
-                       port@0 {
-                               reg = <0>;
-                               thc63lvd1024_in: endpoint {
-                                       remote-endpoint = <&lvds0_out>;
-                               };
-                       };
-
-                       port@2 {
-                               reg = <2>;
-                               thc63lvd1024_out: endpoint {
-                                       remote-endpoint = <&adv7511_in>;
-                               };
-                       };
-               };
-       };
-
-       memory@48000000 {
-               device_type = "memory";
-               /* first 128MB is reserved for secure area. */
-               reg = <0x0 0x48000000 0x0 0x18000000>;
-       };
-
-       reg_1p8v: regulator-1p8v {
-               compatible = "regulator-fixed";
-               regulator-name = "fixed-1.8V";
-               regulator-min-microvolt = <1800000>;
-               regulator-max-microvolt = <1800000>;
-               regulator-boot-on;
-               regulator-always-on;
-       };
-
-       reg_3p3v: regulator-3p3v {
-               compatible = "regulator-fixed";
-               regulator-name = "fixed-3.3V";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
-               regulator-boot-on;
-               regulator-always-on;
-       };
-
-       reg_12p0v: regulator-12p0v {
-               compatible = "regulator-fixed";
-               regulator-name = "D12.0V";
-               regulator-min-microvolt = <12000000>;
-               regulator-max-microvolt = <12000000>;
-               regulator-boot-on;
-               regulator-always-on;
-       };
-
-       vga {
-               compatible = "vga-connector";
-
-               port {
-                       vga_in: endpoint {
-                               remote-endpoint = <&adv7123_out>;
-                       };
-               };
-       };
-
-       vga-encoder {
-               compatible = "adi,adv7123";
-
-               ports {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-
-                       port@0 {
-                               reg = <0>;
-                               adv7123_in: endpoint {
-                                       remote-endpoint = <&du_out_rgb>;
-                               };
-                       };
-                       port@1 {
-                               reg = <1>;
-                               adv7123_out: endpoint {
-                                       remote-endpoint = <&vga_in>;
-                               };
-                       };
-               };
-       };
-
-       x12_clk: x12 {
-               compatible = "fixed-clock";
-               #clock-cells = <0>;
-               clock-frequency = <74250000>;
-       };
-};
-
-&avb {
-       pinctrl-0 = <&avb0_pins>;
-       pinctrl-names = "default";
-       renesas,no-ether-link;
-       phy-handle = <&phy0>;
-       status = "okay";
-
-       phy0: ethernet-phy@0 {
-               rxc-skew-ps = <1500>;
-               reg = <0>;
-               interrupt-parent = <&gpio5>;
-               interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
-               /*
-                * TX clock internal delay mode is required for reliable
-                * 1Gbps communication using the KSZ9031RNX phy present on
-                * the Draak board, however, TX clock internal delay mode
-                * isn't supported on r8a77995.  Thus, limit speed to
-                * 100Mbps for reliable communication.
-                */
-               max-speed = <100>;
-       };
-};
-
-&can0 {
-       pinctrl-0 = <&can0_pins>;
-       pinctrl-names = "default";
-       status = "okay";
-};
-
-&can1 {
-       pinctrl-0 = <&can1_pins>;
-       pinctrl-names = "default";
-       status = "okay";
-};
-
-&du {
-       pinctrl-0 = <&du_pins>;
-       pinctrl-names = "default";
-       status = "okay";
-
-       clocks = <&cpg CPG_MOD 724>,
-                <&cpg CPG_MOD 723>,
-                <&x12_clk>;
-       clock-names = "du.0", "du.1", "dclkin.0";
-
-       ports {
-               port@0 {
-                       endpoint {
-                               remote-endpoint = <&adv7123_in>;
-                       };
-               };
-       };
-};
-
-&ehci0 {
-       dr_mode = "host";
-       status = "okay";
-};
-
-&extal_clk {
-       clock-frequency = <48000000>;
-};
-
-&hsusb {
-       dr_mode = "host";
-       status = "okay";
-};
-
-&i2c0 {
-       pinctrl-0 = <&i2c0_pins>;
-       pinctrl-names = "default";
-       status = "okay";
-
-       composite-in@20 {
-               compatible = "adi,adv7180cp";
-               reg = <0x20>;
-
-               ports {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-
-                       port@0 {
-                               reg = <0>;
-                               adv7180_in: endpoint {
-                                       remote-endpoint = <&composite_con_in>;
-                               };
-                       };
-
-                       port@3 {
-                               reg = <3>;
-
-                               /*
-                                * The VIN4 video input path is shared between
-                                * CVBS and HDMI inputs through SW[49-53]
-                                * switches.
-                                *
-                                * CVBS is the default selection, link it to
-                                * VIN4 here.
-                                */
-                               adv7180_out: endpoint {
-                                       remote-endpoint = <&vin4_in>;
-                               };
-                       };
-               };
-
-       };
-
-       hdmi-encoder@39 {
-               compatible = "adi,adv7511w";
-               reg = <0x39>, <0x3f>, <0x38>, <0x3c>;
-               reg-names = "main", "edid", "packet", "cec";
-               interrupt-parent = <&gpio1>;
-               interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
-
-               /* Depends on LVDS */
-               max-clock = <135000000>;
-               min-vrefresh = <50>;
-
-               adi,input-depth = <8>;
-               adi,input-colorspace = "rgb";
-               adi,input-clock = "1x";
-               adi,input-style = <1>;
-               adi,input-justification = "evenly";
-
-               ports {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-
-                       port@0 {
-                               reg = <0>;
-                               adv7511_in: endpoint {
-                                       remote-endpoint = <&thc63lvd1024_out>;
-                               };
-                       };
-
-                       port@1 {
-                               reg = <1>;
-                               adv7511_out: endpoint {
-                                       remote-endpoint = <&hdmi_con_out>;
-                               };
-                       };
-               };
-       };
-
-       hdmi-decoder@4c {
-               compatible = "adi,adv7612";
-               reg = <0x4c>;
-               default-input = <0>;
-
-               ports {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-
-                       port@0 {
-                               reg = <0>;
-
-                               adv7612_in: endpoint {
-                                       remote-endpoint = <&hdmi_con_in>;
-                               };
-                       };
-
-                       port@2 {
-                               reg = <2>;
-
-                               /*
-                                * The VIN4 video input path is shared between
-                                * CVBS and HDMI inputs through SW[49-53]
-                                * switches.
-                                *
-                                * CVBS is the default selection, leave HDMI
-                                * not connected here.
-                                */
-                               adv7612_out: endpoint {
-                                       pclk-sample = <0>;
-                                       hsync-active = <0>;
-                                       vsync-active = <0>;
-                               };
-                       };
-               };
-       };
-
-       eeprom@50 {
-               compatible = "rohm,br24t01", "atmel,24c01";
-               reg = <0x50>;
-               pagesize = <8>;
-       };
-};
-
-&i2c1 {
-       pinctrl-0 = <&i2c1_pins>;
-       pinctrl-names = "default";
-       status = "okay";
-};
-
-&lvds0 {
-       status = "okay";
-
-       clocks = <&cpg CPG_MOD 727>,
-                <&x12_clk>,
-                <&extal_clk>;
-       clock-names = "fck", "dclkin.0", "extal";
-
-       ports {
-               port@1 {
-                       lvds0_out: endpoint {
-                               remote-endpoint = <&thc63lvd1024_in>;
-                       };
-               };
-       };
-};
-
-&lvds1 {
-       /*
-        * Even though the LVDS1 output is not connected, the encoder must be
-        * enabled to supply a pixel clock to the DU for the DPAD output when
-        * LVDS0 is in use.
-        */
-       status = "okay";
-
-       clocks = <&cpg CPG_MOD 727>,
-                <&x12_clk>,
-                <&extal_clk>;
-       clock-names = "fck", "dclkin.0", "extal";
-};
-
-&ohci0 {
-       dr_mode = "host";
-       status = "okay";
-};
-
-&pfc {
-       avb0_pins: avb {
-               mux {
-                       groups = "avb0_link", "avb0_mdio", "avb0_mii";
-                       function = "avb0";
-               };
-       };
-
-       can0_pins: can0 {
-               groups = "can0_data_a";
-               function = "can0";
-       };
-
-       can1_pins: can1 {
-               groups = "can1_data_a";
-               function = "can1";
-       };
-
-       du_pins: du {
-               groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
-               function = "du";
-       };
-
-       i2c0_pins: i2c0 {
-               groups = "i2c0";
-               function = "i2c0";
-       };
-
-       i2c1_pins: i2c1 {
-               groups = "i2c1";
-               function = "i2c1";
-       };
-
-       pwm0_pins: pwm0 {
-               groups = "pwm0_c";
-               function = "pwm0";
-       };
-
-       pwm1_pins: pwm1 {
-               groups = "pwm1_c";
-               function = "pwm1";
-       };
-
-       scif2_pins: scif2 {
-               groups = "scif2_data";
-               function = "scif2";
-       };
-
-       sdhi2_pins: sd2 {
-               groups = "mmc_data8", "mmc_ctrl";
-               function = "mmc";
-               power-source = <1800>;
-       };
-
-       sdhi2_pins_uhs: sd2_uhs {
-               groups = "mmc_data8", "mmc_ctrl";
-               function = "mmc";
-               power-source = <1800>;
-       };
-
-       usb0_pins: usb0 {
-               groups = "usb0";
-               function = "usb0";
-       };
-
-       vin4_pins_cvbs: vin4 {
-               groups = "vin4_data8", "vin4_sync", "vin4_clk";
-               function = "vin4";
-       };
-};
-
-&pwm0 {
-       pinctrl-0 = <&pwm0_pins>;
-       pinctrl-names = "default";
-
-       status = "okay";
-};
-
-&pwm1 {
-       pinctrl-0 = <&pwm1_pins>;
-       pinctrl-names = "default";
-
-       status = "okay";
-};
-
-&rwdt {
-       timeout-sec = <60>;
-       status = "okay";
-};
-
-&scif2 {
-       pinctrl-0 = <&scif2_pins>;
-       pinctrl-names = "default";
-
-       status = "okay";
-};
-
-&sdhi2 {
-       /* used for on-board eMMC */
-       pinctrl-0 = <&sdhi2_pins>;
-       pinctrl-1 = <&sdhi2_pins_uhs>;
-       pinctrl-names = "default", "state_uhs";
-
-       vmmc-supply = <&reg_3p3v>;
-       vqmmc-supply = <&reg_1p8v>;
-       bus-width = <8>;
-       mmc-hs200-1_8v;
-       non-removable;
-       status = "okay";
-};
-
-&usb2_phy0 {
-       pinctrl-0 = <&usb0_pins>;
-       pinctrl-names = "default";
-
-       renesas,no-otg-pins;
-       status = "okay";
-};
-
-&vin4 {
-       pinctrl-0 = <&vin4_pins_cvbs>;
-       pinctrl-names = "default";
-
-       status = "okay";
-
-       ports {
-               port {
-                       vin4_in: endpoint {
-                               remote-endpoint = <&adv7180_out>;
-                       };
-               };
-       };
 };
index 9503007c34c004dfe7427a429a9030ebe1d5a81a..f040d03e0a87ad7717e35493f636900abef883ff 100644 (file)
        #address-cells = <2>;
        #size-cells = <2>;
 
+       /*
+        * The external audio clocks are configured as 0 Hz fixed frequency
+        * clocks by default.
+        * Boards that provide audio clocks should override them.
+        */
+       audio_clk_a: audio_clk_a {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <0>;
+       };
+
+       audio_clk_b: audio_clk_b {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <0>;
+       };
+
        /* External CAN clock - to be overridden by boards that provide it */
        can_clk: can {
                compatible = "fixed-clock";
@@ -77,6 +94,7 @@
                        compatible = "renesas,r8a77995-wdt",
                                     "renesas,rcar-gen3-wdt";
                        reg = <0 0xe6020000 0 0x0c>;
+                       interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 402>;
                        power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
                        resets = <&cpg 402>;
                        resets = <&cpg 906>;
                };
 
-               pfc: pin-controller@e6060000 {
+               pfc: pinctrl@e6060000 {
                        compatible = "renesas,pfc-r8a77995";
                        reg = <0 0xe6060000 0 0x508>;
                };
 
+               cmt0: timer@e60f0000 {
+                       compatible = "renesas,r8a77995-cmt0",
+                                    "renesas,rcar-gen3-cmt0";
+                       reg = <0 0xe60f0000 0 0x1004>;
+                       interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 303>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+                       resets = <&cpg 303>;
+                       status = "disabled";
+               };
+
+               cmt1: timer@e6130000 {
+                       compatible = "renesas,r8a77995-cmt1",
+                                    "renesas,rcar-gen3-cmt1";
+                       reg = <0 0xe6130000 0 0x1004>;
+                       interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 302>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+                       resets = <&cpg 302>;
+                       status = "disabled";
+               };
+
+               cmt2: timer@e6140000 {
+                       compatible = "renesas,r8a77995-cmt1",
+                                    "renesas,rcar-gen3-cmt1";
+                       reg = <0 0xe6140000 0 0x1004>;
+                       interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 301>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+                       resets = <&cpg 301>;
+                       status = "disabled";
+               };
+
+               cmt3: timer@e6148000 {
+                       compatible = "renesas,r8a77995-cmt1",
+                                    "renesas,rcar-gen3-cmt1";
+                       reg = <0 0xe6148000 0 0x1004>;
+                       interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 300>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+                       resets = <&cpg 300>;
+                       status = "disabled";
+               };
+
                cpg: clock-controller@e6150000 {
                        compatible = "renesas,r8a77995-cpg-mssr";
                        reg = <0 0xe6150000 0 0x1000>;
                        resets = <&cpg 407>;
                };
 
+               tmu0: timer@e61e0000 {
+                       compatible = "renesas,tmu-r8a77995", "renesas,tmu";
+                       reg = <0 0xe61e0000 0 0x30>;
+                       interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 125>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+                       resets = <&cpg 125>;
+                       status = "disabled";
+               };
+
+               tmu1: timer@e6fc0000 {
+                       compatible = "renesas,tmu-r8a77995", "renesas,tmu";
+                       reg = <0 0xe6fc0000 0 0x30>;
+                       interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 124>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+                       resets = <&cpg 124>;
+                       status = "disabled";
+               };
+
+               tmu2: timer@e6fd0000 {
+                       compatible = "renesas,tmu-r8a77995", "renesas,tmu";
+                       reg = <0 0xe6fd0000 0 0x30>;
+                       interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 123>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+                       resets = <&cpg 123>;
+                       status = "disabled";
+               };
+
+               tmu3: timer@e6fe0000 {
+                       compatible = "renesas,tmu-r8a77995", "renesas,tmu";
+                       reg = <0 0xe6fe0000 0 0x30>;
+                       interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 122>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+                       resets = <&cpg 122>;
+                       status = "disabled";
+               };
+
+               tmu4: timer@ffc00000 {
+                       compatible = "renesas,tmu-r8a77995", "renesas,tmu";
+                       reg = <0 0xffc00000 0 0x30>;
+                       interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 121>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+                       resets = <&cpg 121>;
+                       status = "disabled";
+               };
+
                i2c0: i2c@e6500000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        dma-channels = <2>;
                };
 
+               arm_cc630p: crypto@e6601000 {
+                       compatible = "arm,cryptocell-630p-ree";
+                       interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+                       reg = <0x0 0xe6601000 0 0x1000>;
+                       clocks = <&cpg CPG_MOD 229>;
+                       resets = <&cpg 229>;
+                       power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+               };
+
                canfd: can@e66c0000 {
                        compatible = "renesas,r8a77995-canfd",
                                     "renesas,rcar-gen3-canfd";
                        reg = <0 0xe66c0000 0 0x8000>;
                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
                                   <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ch_int", "g_int";
                        clocks = <&cpg CPG_MOD 914>,
                               <&cpg CPG_CORE R8A77995_CLK_CANFD>,
                               <&can_clk>;
                               <&ipmmu_ds1 22>, <&ipmmu_ds1 23>;
                };
 
-               ipmmu_ds0: mmu@e6740000 {
+               ipmmu_ds0: iommu@e6740000 {
                        compatible = "renesas,ipmmu-r8a77995";
                        reg = <0 0xe6740000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 0>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_ds1: mmu@e7740000 {
+               ipmmu_ds1: iommu@e7740000 {
                        compatible = "renesas,ipmmu-r8a77995";
                        reg = <0 0xe7740000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 1>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_hc: mmu@e6570000 {
+               ipmmu_hc: iommu@e6570000 {
                        compatible = "renesas,ipmmu-r8a77995";
                        reg = <0 0xe6570000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 2>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_mm: mmu@e67b0000 {
+               ipmmu_mm: iommu@e67b0000 {
                        compatible = "renesas,ipmmu-r8a77995";
                        reg = <0 0xe67b0000 0 0x1000>;
                        interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
                        #iommu-cells = <1>;
                };
 
-               ipmmu_mp: mmu@ec670000 {
+               ipmmu_mp: iommu@ec670000 {
                        compatible = "renesas,ipmmu-r8a77995";
                        reg = <0 0xec670000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 4>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_pv0: mmu@fd800000 {
+               ipmmu_pv0: iommu@fd800000 {
                        compatible = "renesas,ipmmu-r8a77995";
                        reg = <0 0xfd800000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 6>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_rt: mmu@ffc80000 {
+               ipmmu_rt: iommu@ffc80000 {
                        compatible = "renesas,ipmmu-r8a77995";
                        reg = <0 0xffc80000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 10>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_vc0: mmu@fe6b0000 {
+               ipmmu_vc0: iommu@fe6b0000 {
                        compatible = "renesas,ipmmu-r8a77995";
                        reg = <0 0xfe6b0000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 12>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_vi0: mmu@febd0000 {
+               ipmmu_vi0: iommu@febd0000 {
                        compatible = "renesas,ipmmu-r8a77995";
                        reg = <0 0xfebd0000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 14>;
                        #iommu-cells = <1>;
                };
 
-               ipmmu_vp0: mmu@fe990000 {
+               ipmmu_vp0: iommu@fe990000 {
                        compatible = "renesas,ipmmu-r8a77995";
                        reg = <0 0xfe990000 0 0x1000>;
                        renesas,ipmmu-main = <&ipmmu_mm 16>;
                                          "ch20", "ch21", "ch22", "ch23",
                                          "ch24";
                        clocks = <&cpg CPG_MOD 812>;
+                       clock-names = "fck";
                        power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
                        resets = <&cpg 812>;
                        phy-mode = "rgmii";
+                       rx-internal-delay-ps = <1800>;
                        iommus = <&ipmmu_ds0 16>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        status = "disabled";
                };
 
+               rcar_sound: sound@ec500000 {
+                       /*
+                        * #sound-dai-cells is required
+                        *
+                        * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
+                        * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
+                        */
+                       /*
+                        * #clock-cells is required for audio_clkout0/1/2/3
+                        *
+                        * clkout       : #clock-cells = <0>;   <&rcar_sound>;
+                        * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
+                        */
+                       compatible = "renesas,rcar_sound-r8a77995", "renesas,rcar_sound-gen3";
+                       reg = <0 0xec500000 0 0x1000>, /* SCU */
+                             <0 0xec5a0000 0 0x100>,  /* ADG */
+                             <0 0xec540000 0 0x1000>, /* SSIU */
+                             <0 0xec541000 0 0x280>,  /* SSI */
+                             <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
+                       reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
+
+                       clocks = <&cpg CPG_MOD 1005>,
+                                <&cpg CPG_MOD 1011>, <&cpg CPG_MOD 1012>,
+                                <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
+                                <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
+                                <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
+                                <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
+                                <&audio_clk_a>, <&audio_clk_b>,
+                                <&cpg CPG_CORE R8A77995_CLK_ZA2>;
+                       clock-names = "ssi-all",
+                                     "ssi.4", "ssi.3",
+                                     "src.6", "src.5",
+                                     "mix.1", "mix.0",
+                                     "ctu.1", "ctu.0",
+                                     "dvc.0", "dvc.1",
+                                     "clk_a", "clk_b", "clk_i";
+                       power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+                       resets = <&cpg 1005>,
+                                <&cpg 1011>, <&cpg 1012>;
+                       reset-names = "ssi-all",
+                                     "ssi.4", "ssi.3";
+                       status = "disabled";
+
+                       rcar_sound,ctu {
+                               ctu00: ctu-0 { };
+                               ctu01: ctu-1 { };
+                               ctu02: ctu-2 { };
+                               ctu03: ctu-3 { };
+                               ctu10: ctu-4 { };
+                               ctu11: ctu-5 { };
+                               ctu12: ctu-6 { };
+                               ctu13: ctu-7 { };
+                       };
+
+                       rcar_sound,dvc {
+                               dvc0: dvc-0 {
+                                       dmas = <&audma0 0xbc>;
+                                       dma-names = "tx";
+                               };
+                               dvc1: dvc-1 {
+                                       dmas = <&audma0 0xbe>;
+                                       dma-names = "tx";
+                               };
+                       };
+
+                       rcar_sound,mix {
+                               mix0: mix-0 { };
+                               mix1: mix-1 { };
+                       };
+
+                       rcar_sound,src {
+                               src5: src-5 {
+                                       interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+                                       dmas = <&audma0 0x8f>, <&audma0 0xb2>;
+                                       dma-names = "rx", "tx";
+                               };
+                               src6: src-6 {
+                                       interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+                                       dmas = <&audma0 0x91>, <&audma0 0xb4>;
+                                       dma-names = "rx", "tx";
+                               };
+                       };
+
+                       rcar_sound,ssi {
+                               ssi3: ssi-3 {
+                                       interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
+                                       dmas = <&audma0 0x07>, <&audma0 0x08>,
+                                              <&audma0 0x6f>, <&audma0 0x70>;
+                                       dma-names = "rx", "tx", "rxu", "txu";
+                               };
+                               ssi4: ssi-4 {
+                                       interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
+                                       dmas = <&audma0 0x09>, <&audma0 0x0a>,
+                                              <&audma0 0x71>, <&audma0 0x72>;
+                                       dma-names = "rx", "tx", "rxu", "txu";
+                               };
+                       };
+               };
+
+               mlp: mlp@ec520000 {
+                       compatible = "renesas,r8a77995-mlp",
+                                    "renesas,rcar-gen3-mlp";
+                       reg = <0 0xec520000 0 0x800>;
+                       interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
+                               <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 802>;
+                       power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+                       resets = <&cpg 802>;
+                       status = "disabled";
+               };
+
+               audma0: dma-controller@ec700000 {
+                       compatible = "renesas,dmac-r8a77995",
+                                    "renesas,rcar-dmac";
+                       reg = <0 0xec700000 0 0x10000>;
+                       interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "error",
+                                       "ch0", "ch1", "ch2", "ch3",
+                                       "ch4", "ch5", "ch6", "ch7",
+                                       "ch8", "ch9", "ch10", "ch11",
+                                       "ch12", "ch13", "ch14", "ch15";
+                       clocks = <&cpg CPG_MOD 502>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+                       resets = <&cpg 502>;
+                       #dma-cells = <1>;
+                       dma-channels = <16>;
+                       iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
+                                <&ipmmu_mp 2>, <&ipmmu_mp 3>,
+                                <&ipmmu_mp 4>, <&ipmmu_mp 5>,
+                                <&ipmmu_mp 6>, <&ipmmu_mp 7>,
+                                <&ipmmu_mp 8>, <&ipmmu_mp 9>,
+                                <&ipmmu_mp 10>, <&ipmmu_mp 11>,
+                                <&ipmmu_mp 12>, <&ipmmu_mp 13>,
+                                <&ipmmu_mp 14>, <&ipmmu_mp 15>;
+               };
+
                ohci0: usb@ee080000 {
                        compatible = "generic-ohci";
                        reg = <0 0xee080000 0 0x100>;
                        status = "disabled";
                };
 
-               sdhi2: sd@ee140000 {
+               sdhi2: mmc@ee140000 {
                        compatible = "renesas,sdhi-r8a77995",
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee140000 0 0x2000>;
                        interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 312>;
+                       clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A77995_CLK_SD0H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
                        resets = <&cpg 312>;
                        status = "disabled";
                };
 
+               rpc: spi@ee200000 {
+                       compatible = "renesas,r8a77995-rpc-if",
+                                    "renesas,rcar-gen3-rpc-if";
+                       reg = <0 0xee200000 0 0x200>,
+                             <0 0x08000000 0 0x04000000>,
+                             <0 0xee208000 0 0x100>;
+                       reg-names = "regs", "dirmap", "wbuf";
+                       interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 917>;
+                       power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+                       resets = <&cpg 917>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
                gic: interrupt-controller@f1010000 {
                        compatible = "arm,gic-400";
                        #interrupt-cells = <3>;
                        reg = <0 0xfeb00000 0 0x40000>;
                        interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 724>,
-                                <&cpg CPG_MOD 723>;
+                       clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
                        clock-names = "du.0", "du.1";
                        resets = <&cpg 724>;
                        reset-names = "du.0";
 
                        renesas,cmms = <&cmm0>, <&cmm1>;
-                       vsps = <&vspd0 0>, <&vspd1 0>;
+                       renesas,vsps = <&vspd0 0>, <&vspd1 0>;
 
                        status = "disabled";
 
 
                                port@0 {
                                        reg = <0>;
-                                       du_out_rgb: endpoint {
-                                       };
                                };
 
                                port@1 {
 
                                port@1 {
                                        reg = <1>;
-                                       lvds0_out: endpoint {
-                                       };
                                };
                        };
                };
 
                                port@1 {
                                        reg = <1>;
-                                       lvds1_out: endpoint {
-                                       };
                                };
                        };
                };
index fa284a7260d68251c0a786d591a7e59fe44fc413..99b73e21c82c2b18261fd98bc29be7982d926c09 100644 (file)
@@ -6,12 +6,84 @@
  */
 
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
 #include "r8a779a0.dtsi"
 
 / {
        model = "Renesas Falcon CPU board";
        compatible = "renesas,falcon-cpu", "renesas,r8a779a0";
 
+       aliases {
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               i2c2 = &i2c2;
+               i2c3 = &i2c3;
+               i2c4 = &i2c4;
+               i2c5 = &i2c5;
+               i2c6 = &i2c6;
+               serial0 = &scif0;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       keys {
+               compatible = "gpio-keys";
+
+               pinctrl-0 = <&keys_pins>;
+               pinctrl-names = "default";
+
+               key-1 {
+                       gpios = <&gpio6 18 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_1>;
+                       label = "SW47";
+                       wakeup-source;
+                       debounce-interval = <20>;
+               };
+
+               key-2 {
+                       gpios = <&gpio6 19 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_2>;
+                       label = "SW48";
+                       wakeup-source;
+                       debounce-interval = <20>;
+               };
+
+               key-3 {
+                       gpios = <&gpio6 20 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_3>;
+                       label = "SW49";
+                       wakeup-source;
+                       debounce-interval = <20>;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               led-1 {
+                       gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>;
+                       color = <LED_COLOR_ID_GREEN>;
+                       function = LED_FUNCTION_INDICATOR;
+                       function-enumerator = <1>;
+               };
+               led-2 {
+                       gpios = <&gpio4 19 GPIO_ACTIVE_HIGH>;
+                       color = <LED_COLOR_ID_GREEN>;
+                       function = LED_FUNCTION_INDICATOR;
+                       function-enumerator = <2>;
+               };
+               led-3 {
+                       gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>;
+                       color = <LED_COLOR_ID_GREEN>;
+                       function = LED_FUNCTION_INDICATOR;
+                       function-enumerator = <3>;
+               };
+       };
+
        memory@48000000 {
                device_type = "memory";
                /* first 128MB is reserved for secure area. */
                reg = <0x7 0x00000000 0x0 0x80000000>;
        };
 
+       mini-dp-con {
+               compatible = "dp-connector";
+               label = "CN5";
+               type = "mini";
+
+               port {
+                       mini_dp_con_in: endpoint {
+                               remote-endpoint = <&sn65dsi86_out>;
+                       };
+               };
+       };
+
+       reg_1p2v: regulator-1p2v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-1.2V";
+               regulator-min-microvolt = <1200000>;
+               regulator-max-microvolt = <1200000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
        reg_1p8v: regulator-1p8v {
                compatible = "regulator-fixed";
                regulator-name = "fixed-1.8V";
                regulator-boot-on;
                regulator-always-on;
        };
+
+       sn65dsi86_refclk: clk-x6 {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <38400000>;
+       };
 };
 
-&avb0 {
-       pinctrl-0 = <&avb0_pins>;
-       pinctrl-names = "default";
-       phy-handle = <&phy0>;
-       tx-internal-delay-ps = <2000>;
+&dsi0 {
        status = "okay";
 
-       phy0: ethernet-phy@0 {
-               rxc-skew-ps = <1500>;
-               reg = <0>;
-               interrupt-parent = <&gpio4>;
-               interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
-               reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
+       ports {
+               port@1 {
+                       dsi0_out: endpoint {
+                               remote-endpoint = <&sn65dsi86_in>;
+                               data-lanes = <1 2 3 4>;
+                       };
+               };
        };
 };
 
+&du {
+       status = "okay";
+};
+
 &extal_clk {
        clock-frequency = <16666666>;
 };
 
        status = "okay";
        clock-frequency = <400000>;
+
+       eeprom@50 {
+               compatible = "rohm,br24g01", "atmel,24c01";
+               label = "cpu-board";
+               reg = <0x50>;
+               pagesize = <8>;
+       };
 };
 
 &i2c1 {
 
        status = "okay";
        clock-frequency = <400000>;
+
+       bridge@2c {
+               pinctrl-0 = <&irq0_pins>;
+               pinctrl-names = "default";
+
+               compatible = "ti,sn65dsi86";
+               reg = <0x2c>;
+
+               clocks = <&sn65dsi86_refclk>;
+               clock-names = "refclk";
+
+               interrupt-parent = <&intc_ex>;
+               interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
+
+               vccio-supply = <&reg_1p8v>;
+               vpll-supply = <&reg_1p8v>;
+               vcca-supply = <&reg_1p2v>;
+               vcc-supply = <&reg_1p2v>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                               sn65dsi86_in: endpoint {
+                                       remote-endpoint = <&dsi0_out>;
+                               };
+                       };
+
+                       port@1 {
+                               reg = <1>;
+                               sn65dsi86_out: endpoint {
+                                       remote-endpoint = <&mini_dp_con_in>;
+                               };
+                       };
+               };
+       };
 };
 
 &i2c6 {
        pinctrl-0 = <&scif_clk_pins>;
        pinctrl-names = "default";
 
-       avb0_pins: avb0 {
-               mux {
-                       groups = "avb0_link", "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk";
-                       function = "avb0";
-               };
-
-               pins_mdio {
-                       groups = "avb0_mdio";
-                       drive-strength = <21>;
-               };
-
-               pins_mii {
-                       groups = "avb0_rgmii";
-                       drive-strength = <21>;
-               };
-
-       };
-
        i2c0_pins: i2c0 {
                groups = "i2c0";
                function = "i2c0";
                function = "i2c6";
        };
 
+       irq0_pins: irq0 {
+               groups = "intc_ex_irq0";
+               function = "intc_ex";
+       };
+
+       keys_pins: keys {
+               pins = "GP_6_18", "GP_6_19", "GP_6_20";
+               bias-pull-up;
+       };
+
        mmc_pins: mmc {
                groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
                function = "mmc";
                power-source = <1800>;
        };
 
+       qspi0_pins: qspi0 {
+               groups = "qspi0_ctrl", "qspi0_data4";
+               function = "qspi0";
+       };
+
        scif0_pins: scif0 {
                groups = "scif0_data", "scif0_ctrl";
                function = "scif0";
        };
 };
 
+&rpc {
+       pinctrl-0 = <&qspi0_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+
+       flash@0 {
+               compatible = "spansion,s25fs512s", "jedec,spi-nor";
+               reg = <0>;
+               spi-max-frequency = <40000000>;
+               spi-rx-bus-width = <4>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       boot@0 {
+                               reg = <0x0 0xcc0000>;
+                               read-only;
+                       };
+                       user@cc0000 {
+                               reg = <0xcc0000 0x3340000>;
+                       };
+               };
+       };
+};
+
+&rwdt {
+       timeout-sec = <60>;
+       status = "okay";
+};
+
 &scif0 {
        pinctrl-0 = <&scif0_pins>;
        pinctrl-names = "default";
diff --git a/arch/arm/dts/r8a779a0-falcon-csi-dsi.dtsi b/arch/arm/dts/r8a779a0-falcon-csi-dsi.dtsi
new file mode 100644 (file)
index 0000000..e06b8ed
--- /dev/null
@@ -0,0 +1,265 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the Falcon CSI/DSI sub-board
+ *
+ * Copyright (C) 2021 Glider bv
+ */
+
+&csi40 {
+       status = "okay";
+
+       ports {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               port@0 {
+                       reg = <0>;
+
+                       csi40_in: endpoint {
+                               clock-lanes = <0>;
+                               data-lanes = <1 2 3 4>;
+                               remote-endpoint = <&max96712_out0>;
+                       };
+               };
+       };
+};
+
+&csi42 {
+       status = "okay";
+
+       ports {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               port@0 {
+                       reg = <0>;
+
+                       csi42_in: endpoint {
+                               clock-lanes = <0>;
+                               data-lanes = <1 2 3 4>;
+                               remote-endpoint = <&max96712_out1>;
+                       };
+               };
+       };
+};
+
+&csi43 {
+       status = "okay";
+
+       ports {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               port@0 {
+                       reg = <0>;
+
+                       csi43_in: endpoint {
+                               clock-lanes = <0>;
+                               data-lanes = <1 2 3 4>;
+                               remote-endpoint = <&max96712_out2>;
+                       };
+               };
+       };
+};
+
+&i2c0 {
+       pca9654_a: gpio@21 {
+               compatible = "onnn,pca9654";
+               reg = <0x21>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       pca9654_b: gpio@22 {
+               compatible = "onnn,pca9654";
+               reg = <0x22>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       pca9654_c: gpio@23 {
+               compatible = "onnn,pca9654";
+               reg = <0x23>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       eeprom@52 {
+               compatible = "rohm,br24g01", "atmel,24c01";
+               label = "csi-dsi-sub-board-id";
+               reg = <0x52>;
+               pagesize = <8>;
+       };
+};
+
+&i2c1 {
+       gmsl0: gmsl-deserializer@49 {
+               compatible = "maxim,max96712";
+               reg = <0x49>;
+               enable-gpios = <&pca9654_a 0 GPIO_ACTIVE_HIGH>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@4 {
+                               reg = <4>;
+                               max96712_out0: endpoint {
+                                       clock-lanes = <0>;
+                                       data-lanes = <1 2 3 4>;
+                                       remote-endpoint = <&csi40_in>;
+                               };
+                       };
+               };
+       };
+
+       gmsl1: gmsl-deserializer@4b {
+               compatible = "maxim,max96712";
+               reg = <0x4b>;
+               enable-gpios = <&pca9654_b 0 GPIO_ACTIVE_HIGH>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@4 {
+                               reg = <4>;
+                               max96712_out1: endpoint {
+                                       clock-lanes = <0>;
+                                       data-lanes = <1 2 3 4>;
+                                       lane-polarities = <0 0 0 0 1>;
+                                       remote-endpoint = <&csi42_in>;
+                               };
+                       };
+               };
+       };
+
+       gmsl2: gmsl-deserializer@6b {
+               compatible = "maxim,max96712";
+               reg = <0x6b>;
+               enable-gpios = <&pca9654_c 0 GPIO_ACTIVE_HIGH>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@4 {
+                               reg = <4>;
+                               max96712_out2: endpoint {
+                                       clock-lanes = <0>;
+                                       data-lanes = <1 2 3 4>;
+                                       lane-polarities = <0 0 0 0 1>;
+                                       remote-endpoint = <&csi43_in>;
+                               };
+                       };
+               };
+       };
+};
+
+&isp0 {
+       status = "okay";
+};
+
+&isp2 {
+       status = "okay";
+};
+
+&isp3 {
+       status = "okay";
+};
+
+&vin00 {
+       status = "okay";
+};
+
+&vin01 {
+       status = "okay";
+};
+
+&vin02 {
+       status = "okay";
+};
+
+&vin03 {
+       status = "okay";
+};
+
+&vin04 {
+       status = "okay";
+};
+
+&vin05 {
+       status = "okay";
+};
+
+&vin06 {
+       status = "okay";
+};
+
+&vin07 {
+       status = "okay";
+};
+
+&vin16 {
+       status = "okay";
+};
+
+&vin17 {
+       status = "okay";
+};
+
+&vin18 {
+       status = "okay";
+};
+
+&vin19 {
+       status = "okay";
+};
+
+&vin20 {
+       status = "okay";
+};
+
+&vin21 {
+       status = "okay";
+};
+
+&vin22 {
+       status = "okay";
+};
+
+&vin23 {
+       status = "okay";
+};
+
+&vin24 {
+       status = "okay";
+};
+
+&vin25 {
+       status = "okay";
+};
+
+&vin26 {
+       status = "okay";
+};
+
+&vin27 {
+       status = "okay";
+};
+
+&vin28 {
+       status = "okay";
+};
+
+&vin29 {
+       status = "okay";
+};
+
+&vin30 {
+       status = "okay";
+};
+
+&vin31 {
+       status = "okay";
+};
diff --git a/arch/arm/dts/r8a779a0-falcon-ethernet.dtsi b/arch/arm/dts/r8a779a0-falcon-ethernet.dtsi
new file mode 100644 (file)
index 0000000..e11bf9a
--- /dev/null
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the Falcon Ethernet sub-board
+ *
+ * Copyright (C) 2021 Glider bv
+ */
+
+&i2c0 {
+       eeprom@53 {
+               compatible = "rohm,br24g01", "atmel,24c01";
+               label = "ethernet-sub-board-id";
+               reg = <0x53>;
+               pagesize = <8>;
+       };
+};
index 06d3922a383699665db66c8f05e6ea11b814232b..9d28791c6050e7a6c4b7cfb6d6807a0d3b74d808 100644 (file)
@@ -21,7 +21,7 @@
        spi-max-frequency = <50000000>;
        status = "okay";
 
-       spi-flash@0 {
+       flash@0 {
                reg = <0>;
                compatible = "jedec,spi-nor";
                spi-max-frequency = <50000000>;
index 5617b81dd7dc3e8700b1b5105657f1ce4dfbae88..b2e67b82caf6ec3402071c1e3ce849c57d813533 100644 (file)
@@ -1,12 +1,14 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Device Tree Source for the Falcon CPU and BreakOut boards
+ * Device Tree Source for the Falcon CPU and BreakOut boards with R-Car V3U
  *
  * Copyright (C) 2020 Renesas Electronics Corp.
  */
 
 /dts-v1/;
 #include "r8a779a0-falcon-cpu.dtsi"
+#include "r8a779a0-falcon-csi-dsi.dtsi"
+#include "r8a779a0-falcon-ethernet.dtsi"
 
 / {
        model = "Renesas Falcon CPU and Breakout boards based on r8a779a0";
 
        aliases {
                ethernet0 = &avb0;
-               serial0 = &scif0;
        };
+};
+
+&avb0 {
+       pinctrl-0 = <&avb0_pins>;
+       pinctrl-names = "default";
+       phy-handle = <&phy0>;
+       tx-internal-delay-ps = <2000>;
+       status = "okay";
 
-       chosen {
-               stdout-path = "serial0:115200n8";
+       phy0: ethernet-phy@0 {
+               compatible = "ethernet-phy-id0022.1622",
+                            "ethernet-phy-ieee802.3-c22";
+               rxc-skew-ps = <1500>;
+               reg = <0>;
+               interrupt-parent = <&gpio4>;
+               interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
+               reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
        };
 };
 
-&rwdt {
-       timeout-sec = <60>;
+&canfd {
+       pinctrl-0 = <&canfd0_pins>, <&canfd1_pins>;
+       pinctrl-names = "default";
        status = "okay";
+
+       channel0 {
+               status = "okay";
+       };
+
+       channel1 {
+               status = "okay";
+       };
+};
+
+&i2c0 {
+       eeprom@51 {
+               compatible = "rohm,br24g01", "atmel,24c01";
+               label = "breakout-board";
+               reg = <0x51>;
+               pagesize = <8>;
+       };
+};
+
+&pfc {
+       avb0_pins: avb0 {
+               mux {
+                       groups = "avb0_link", "avb0_mdio", "avb0_rgmii",
+                                "avb0_txcrefclk";
+                       function = "avb0";
+               };
+
+               pins_mdio {
+                       groups = "avb0_mdio";
+                       drive-strength = <21>;
+               };
+
+               pins_mii {
+                       groups = "avb0_rgmii";
+                       drive-strength = <21>;
+               };
+
+       };
+
+       canfd0_pins: canfd0 {
+               groups = "canfd0_data";
+               function = "canfd0";
+       };
+
+       canfd1_pins: canfd1 {
+               groups = "canfd1_data";
+               function = "canfd1";
+       };
 };
index dfd6ae8b564fb1ba19d591ee7fcec5f0f72dea75..ed9400f903c9ecefde6a268fcb0b4d739b87303b 100644 (file)
        #address-cells = <2>;
        #size-cells = <2>;
 
-       aliases {
-               i2c0 = &i2c0;
-               i2c1 = &i2c1;
-               i2c2 = &i2c2;
-               i2c3 = &i2c3;
-               i2c4 = &i2c4;
-               i2c5 = &i2c5;
-               i2c6 = &i2c6;
+       /* External CAN clock - to be overridden by boards that provide it */
+       can_clk: can {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <0>;
        };
 
        cpus {
@@ -34,6 +31,7 @@
                        device_type = "cpu";
                        power-domains = <&sysc R8A779A0_PD_A1E0D0C0>;
                        next-level-cache = <&L3_CA76_0>;
+                       clocks = <&cpg CPG_CORE R8A779A0_CLK_Z0>;
                };
 
                L3_CA76_0: cache-controller-0 {
 
        pmu_a76 {
                compatible = "arm,cortex-a76-pmu";
-               interrupts-extended = <&gic GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>,
-                                     <&gic GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
-                                     <&gic GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
-                                     <&gic GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
+               interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
        };
 
        /* External SCIF clock - to be overridden by boards that provide it */
 
                rwdt: watchdog@e6020000 {
                        compatible = "renesas,r8a779a0-wdt",
-                                    "renesas,rcar-gen3-wdt";
+                                    "renesas,rcar-gen4-wdt";
                        reg = <0 0xe6020000 0 0x0c>;
+                       interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 907>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
                        resets = <&cpg 907>;
                        status = "disabled";
                };
 
-               pfc: pin-controller@e6050000 {
+               pfc: pinctrl@e6050000 {
                        compatible = "renesas,pfc-r8a779a0";
                        reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>,
                              <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>,
                };
 
                gpio0: gpio@e6058180 {
-                       compatible = "renesas,gpio-r8a779a0";
+                       compatible = "renesas,gpio-r8a779a0",
+                                    "renesas,rcar-gen4-gpio";
                        reg = <0 0xe6058180 0 0x54>;
                        interrupts = <GIC_SPI 832 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 916>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-                       resets =  <&cpg 916>;
+                       resets = <&cpg 916>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-ranges = <&pfc 0 0 28>;
                };
 
                gpio1: gpio@e6050180 {
-                       compatible = "renesas,gpio-r8a779a0";
+                       compatible = "renesas,gpio-r8a779a0",
+                                    "renesas,rcar-gen4-gpio";
                        reg = <0 0xe6050180 0 0x54>;
                        interrupts = <GIC_SPI 836 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 915>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-                       resets =  <&cpg 915>;
+                       resets = <&cpg 915>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-ranges = <&pfc 0 32 31>;
                };
 
                gpio2: gpio@e6050980 {
-                       compatible = "renesas,gpio-r8a779a0";
+                       compatible = "renesas,gpio-r8a779a0",
+                                    "renesas,rcar-gen4-gpio";
                        reg = <0 0xe6050980 0 0x54>;
                        interrupts = <GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 915>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-                       resets =  <&cpg 915>;
+                       resets = <&cpg 915>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-ranges = <&pfc 0 64 25>;
                };
 
                gpio3: gpio@e6058980 {
-                       compatible = "renesas,gpio-r8a779a0";
+                       compatible = "renesas,gpio-r8a779a0",
+                                    "renesas,rcar-gen4-gpio";
                        reg = <0 0xe6058980 0 0x54>;
                        interrupts = <GIC_SPI 844 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 916>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-                       resets =  <&cpg 916>;
+                       resets = <&cpg 916>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-ranges = <&pfc 0 96 17>;
                };
 
                gpio4: gpio@e6060180 {
-                       compatible = "renesas,gpio-r8a779a0";
+                       compatible = "renesas,gpio-r8a779a0",
+                                    "renesas,rcar-gen4-gpio";
                        reg = <0 0xe6060180 0 0x54>;
                        interrupts = <GIC_SPI 848 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 917>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-                       resets =  <&cpg 917>;
+                       resets = <&cpg 917>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-ranges = <&pfc 0 128 27>;
                };
 
                gpio5: gpio@e6060980 {
-                       compatible = "renesas,gpio-r8a779a0";
+                       compatible = "renesas,gpio-r8a779a0",
+                                    "renesas,rcar-gen4-gpio";
                        reg = <0 0xe6060980 0 0x54>;
                        interrupts = <GIC_SPI 852 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 917>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-                       resets =  <&cpg 917>;
+                       resets = <&cpg 917>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-ranges = <&pfc 0 160 21>;
                };
 
                gpio6: gpio@e6068180 {
-                       compatible = "renesas,gpio-r8a779a0";
+                       compatible = "renesas,gpio-r8a779a0",
+                                    "renesas,rcar-gen4-gpio";
                        reg = <0 0xe6068180 0 0x54>;
                        interrupts = <GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 918>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-                       resets =  <&cpg 918>;
+                       resets = <&cpg 918>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-ranges = <&pfc 0 192 21>;
                };
 
                gpio7: gpio@e6068980 {
-                       compatible = "renesas,gpio-r8a779a0";
+                       compatible = "renesas,gpio-r8a779a0",
+                                    "renesas,rcar-gen4-gpio";
                        reg = <0 0xe6068980 0 0x54>;
                        interrupts = <GIC_SPI 860 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 918>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-                       resets =  <&cpg 918>;
+                       resets = <&cpg 918>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-ranges = <&pfc 0 224 21>;
                };
 
                gpio8: gpio@e6069180 {
-                       compatible = "renesas,gpio-r8a779a0";
+                       compatible = "renesas,gpio-r8a779a0",
+                                    "renesas,rcar-gen4-gpio";
                        reg = <0 0xe6069180 0 0x54>;
                        interrupts = <GIC_SPI 864 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 918>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-                       resets =  <&cpg 918>;
+                       resets = <&cpg 918>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-ranges = <&pfc 0 256 21>;
                };
 
                gpio9: gpio@e6069980 {
-                       compatible = "renesas,gpio-r8a779a0";
+                       compatible = "renesas,gpio-r8a779a0",
+                                    "renesas,rcar-gen4-gpio";
                        reg = <0 0xe6069980 0 0x54>;
                        interrupts = <GIC_SPI 868 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 918>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-                       resets =  <&cpg 918>;
+                       resets = <&cpg 918>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-ranges = <&pfc 0 288 21>;
                        #interrupt-cells = <2>;
                };
 
+               cmt0: timer@e60f0000 {
+                       compatible = "renesas,r8a779a0-cmt0",
+                                    "renesas,rcar-gen4-cmt0";
+                       reg = <0 0xe60f0000 0 0x1004>;
+                       interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 501 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 910>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 910>;
+                       status = "disabled";
+               };
+
+               cmt1: timer@e6130000 {
+                       compatible = "renesas,r8a779a0-cmt1",
+                                    "renesas,rcar-gen4-cmt1";
+                       reg = <0 0xe6130000 0 0x1004>;
+                       interrupts = <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 911>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 911>;
+                       status = "disabled";
+               };
+
+               cmt2: timer@e6140000 {
+                       compatible = "renesas,r8a779a0-cmt1",
+                                    "renesas,rcar-gen4-cmt1";
+                       reg = <0 0xe6140000 0 0x1004>;
+                       interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 912>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 912>;
+                       status = "disabled";
+               };
+
+               cmt3: timer@e6148000 {
+                       compatible = "renesas,r8a779a0-cmt1",
+                                    "renesas,rcar-gen4-cmt1";
+                       reg = <0 0xe6148000 0 0x1004>;
+                       interrupts = <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 913>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 913>;
+                       status = "disabled";
+               };
+
                cpg: clock-controller@e6150000 {
                        compatible = "renesas,r8a779a0-cpg-mssr";
                        reg = <0 0xe6150000 0 0x4000>;
                        #power-domain-cells = <1>;
                };
 
+               tsc: thermal@e6190000 {
+                       compatible = "renesas,r8a779a0-thermal";
+                       reg = <0 0xe6190000 0 0x200>,
+                             <0 0xe6198000 0 0x200>,
+                             <0 0xe61a0000 0 0x200>,
+                             <0 0xe61a8000 0 0x200>,
+                             <0 0xe61b0000 0 0x200>;
+                       clocks = <&cpg CPG_MOD 919>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 919>;
+                       #thermal-sensor-cells = <1>;
+               };
+
+               intc_ex: interrupt-controller@e61c0000 {
+                       compatible = "renesas,intc-ex-r8a779a0", "renesas,irqc";
+                       #interrupt-cells = <2>;
+                       interrupt-controller;
+                       reg = <0 0xe61c0000 0 0x200>;
+                       interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_CORE R8A779A0_CLK_CP>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+               };
+
+               tmu0: timer@e61e0000 {
+                       compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
+                       reg = <0 0xe61e0000 0 0x30>;
+                       interrupts = <GIC_SPI 512 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 514 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 713>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 713>;
+                       status = "disabled";
+               };
+
+               tmu1: timer@e6fc0000 {
+                       compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
+                       reg = <0 0xe6fc0000 0 0x30>;
+                       interrupts = <GIC_SPI 504 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 505 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 714>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 714>;
+                       status = "disabled";
+               };
+
+               tmu2: timer@e6fd0000 {
+                       compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
+                       reg = <0 0xe6fd0000 0 0x30>;
+                       interrupts = <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 510 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 715>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 715>;
+                       status = "disabled";
+               };
+
+               tmu3: timer@e6fe0000 {
+                       compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
+                       reg = <0 0xe6fe0000 0 0x30>;
+                       interrupts = <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 716>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 716>;
+                       status = "disabled";
+               };
+
+               tmu4: timer@ffc00000 {
+                       compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
+                       reg = <0 0xffc00000 0 0x30>;
+                       interrupts = <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 717>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 717>;
+                       status = "disabled";
+               };
+
                i2c0: i2c@e6500000 {
                        compatible = "renesas,i2c-r8a779a0",
-                                    "renesas,rcar-gen3-i2c";
+                                    "renesas,rcar-gen4-i2c";
                        reg = <0 0xe6500000 0 0x40>;
                        interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 518>;
 
                i2c1: i2c@e6508000 {
                        compatible = "renesas,i2c-r8a779a0",
-                                    "renesas,rcar-gen3-i2c";
+                                    "renesas,rcar-gen4-i2c";
                        reg = <0 0xe6508000 0 0x40>;
                        interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 519>;
 
                i2c2: i2c@e6510000 {
                        compatible = "renesas,i2c-r8a779a0",
-                                    "renesas,rcar-gen3-i2c";
+                                    "renesas,rcar-gen4-i2c";
                        reg = <0 0xe6510000 0 0x40>;
                        interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 520>;
 
                i2c3: i2c@e66d0000 {
                        compatible = "renesas,i2c-r8a779a0",
-                                    "renesas,rcar-gen3-i2c";
+                                    "renesas,rcar-gen4-i2c";
                        reg = <0 0xe66d0000 0 0x40>;
                        interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 521>;
 
                i2c4: i2c@e66d8000 {
                        compatible = "renesas,i2c-r8a779a0",
-                                    "renesas,rcar-gen3-i2c";
+                                    "renesas,rcar-gen4-i2c";
                        reg = <0 0xe66d8000 0 0x40>;
                        interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 522>;
 
                i2c5: i2c@e66e0000 {
                        compatible = "renesas,i2c-r8a779a0",
-                                    "renesas,rcar-gen3-i2c";
+                                    "renesas,rcar-gen4-i2c";
                        reg = <0 0xe66e0000 0 0x40>;
                        interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 523>;
 
                i2c6: i2c@e66e8000 {
                        compatible = "renesas,i2c-r8a779a0",
-                                    "renesas,rcar-gen3-i2c";
+                                    "renesas,rcar-gen4-i2c";
                        reg = <0 0xe66e8000 0 0x40>;
                        interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 524>;
 
                hscif0: serial@e6540000 {
                        compatible = "renesas,hscif-r8a779a0",
-                                    "renesas,rcar-gen3-hscif", "renesas,hscif";
+                                    "renesas,rcar-gen4-hscif", "renesas,hscif";
                        reg = <0 0xe6540000 0 0x60>;
                        interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 514>,
 
                hscif1: serial@e6550000 {
                        compatible = "renesas,hscif-r8a779a0",
-                                    "renesas,rcar-gen3-hscif", "renesas,hscif";
+                                    "renesas,rcar-gen4-hscif", "renesas,hscif";
                        reg = <0 0xe6550000 0 0x60>;
                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 515>,
 
                hscif2: serial@e6560000 {
                        compatible = "renesas,hscif-r8a779a0",
-                                    "renesas,rcar-gen3-hscif", "renesas,hscif";
+                                    "renesas,rcar-gen4-hscif", "renesas,hscif";
                        reg = <0 0xe6560000 0 0x60>;
                        interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 516>,
 
                hscif3: serial@e66a0000 {
                        compatible = "renesas,hscif-r8a779a0",
-                                    "renesas,rcar-gen3-hscif", "renesas,hscif";
+                                    "renesas,rcar-gen4-hscif", "renesas,hscif";
                        reg = <0 0xe66a0000 0 0x60>;
                        interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 517>,
                        status = "disabled";
                };
 
+               canfd: can@e6660000 {
+                       compatible = "renesas,r8a779a0-canfd";
+                       reg = <0 0xe6660000 0 0x8000>;
+                       interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+                                       <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ch_int", "g_int";
+                       clocks = <&cpg CPG_MOD 328>,
+                                <&cpg CPG_CORE R8A779A0_CLK_CANFD>,
+                                <&can_clk>;
+                       clock-names = "fck", "canfd", "can_clk";
+                       assigned-clocks = <&cpg CPG_CORE R8A779A0_CLK_CANFD>;
+                       assigned-clock-rates = <80000000>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 328>;
+                       status = "disabled";
+
+                       channel0 {
+                               status = "disabled";
+                       };
+
+                       channel1 {
+                               status = "disabled";
+                       };
+
+                       channel2 {
+                               status = "disabled";
+                       };
+
+                       channel3 {
+                               status = "disabled";
+                       };
+
+                       channel4 {
+                               status = "disabled";
+                       };
+
+                       channel5 {
+                               status = "disabled";
+                       };
+
+                       channel6 {
+                               status = "disabled";
+                       };
+
+                       channel7 {
+                               status = "disabled";
+                       };
+               };
+
                avb0: ethernet@e6800000 {
                        compatible = "renesas,etheravb-r8a779a0",
                                     "renesas,etheravb-rcar-gen3";
                                          "ch20", "ch21", "ch22", "ch23",
                                          "ch24";
                        clocks = <&cpg CPG_MOD 211>;
+                       clock-names = "fck";
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
                        resets = <&cpg 211>;
                        phy-mode = "rgmii";
                                          "ch20", "ch21", "ch22", "ch23",
                                          "ch24";
                        clocks = <&cpg CPG_MOD 212>;
+                       clock-names = "fck";
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
                        resets = <&cpg 212>;
                        phy-mode = "rgmii";
                                        "ch20", "ch21", "ch22", "ch23",
                                        "ch24";
                        clocks = <&cpg CPG_MOD 213>;
+                       clock-names = "fck";
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
                        resets = <&cpg 213>;
                        phy-mode = "rgmii";
                                        "ch20", "ch21", "ch22", "ch23",
                                        "ch24";
                        clocks = <&cpg CPG_MOD 214>;
+                       clock-names = "fck";
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
                        resets = <&cpg 214>;
                        phy-mode = "rgmii";
                                        "ch20", "ch21", "ch22", "ch23",
                                        "ch24";
                        clocks = <&cpg CPG_MOD 215>;
+                       clock-names = "fck";
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
                        resets = <&cpg 215>;
                        phy-mode = "rgmii";
                                        "ch20", "ch21", "ch22", "ch23",
                                        "ch24";
                        clocks = <&cpg CPG_MOD 216>;
+                       clock-names = "fck";
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
                        resets = <&cpg 216>;
                        phy-mode = "rgmii";
 
                scif0: serial@e6e60000 {
                        compatible = "renesas,scif-r8a779a0",
-                                    "renesas,rcar-gen3-scif", "renesas,scif";
+                                    "renesas,rcar-gen4-scif", "renesas,scif";
                        reg = <0 0xe6e60000 0 64>;
                        interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 702>,
 
                scif1: serial@e6e68000 {
                        compatible = "renesas,scif-r8a779a0",
-                                    "renesas,rcar-gen3-scif", "renesas,scif";
+                                    "renesas,rcar-gen4-scif", "renesas,scif";
                        reg = <0 0xe6e68000 0 64>;
                        interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 703>,
 
                scif3: serial@e6c50000 {
                        compatible = "renesas,scif-r8a779a0",
-                                    "renesas,rcar-gen3-scif", "renesas,scif";
+                                    "renesas,rcar-gen4-scif", "renesas,scif";
                        reg = <0 0xe6c50000 0 64>;
                        interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 704>,
 
                scif4: serial@e6c40000 {
                        compatible = "renesas,scif-r8a779a0",
-                                    "renesas,rcar-gen3-scif", "renesas,scif";
+                                    "renesas,rcar-gen4-scif", "renesas,scif";
                        reg = <0 0xe6c40000 0 64>;
                        interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 705>,
                        status = "disabled";
                };
 
+               tpu: pwm@e6e80000 {
+                       compatible = "renesas,tpu-r8a779a0", "renesas,tpu";
+                       reg = <0 0xe6e80000 0 0x148>;
+                       interrupts = <GIC_SPI 515 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 718>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 718>;
+                       #pwm-cells = <3>;
+                       status = "disabled";
+               };
+
                msiof0: spi@e6e90000 {
                        compatible = "renesas,msiof-r8a779a0",
                                     "renesas,rcar-gen3-msiof";
                        status = "disabled";
                };
 
-               dmac1: dma-controller@e7350000 {
-                       compatible = "renesas,dmac-r8a779a0";
-                       reg = <0 0xe7350000 0 0x1000>,
-                             <0 0xe7300000 0 0x10000>;
-                       interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
-                       interrupt-names = "error",
-                                         "ch0", "ch1", "ch2", "ch3", "ch4",
-                                         "ch5", "ch6", "ch7", "ch8", "ch9",
-                                         "ch10", "ch11", "ch12", "ch13",
-                                         "ch14", "ch15";
-                       clocks = <&cpg CPG_MOD 709>;
-                       clock-names = "fck";
+               vin00: video@e6ef0000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6ef0000 0 0x1000>;
+                       interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 730>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-                       resets = <&cpg 709>;
-                       #dma-cells = <1>;
-                       dma-channels = <16>;
+                       resets = <&cpg 730>;
+                       renesas,id = <0>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin00isp0: endpoint@0 {
+                                               reg = <0>;
+                                               remote-endpoint = <&isp0vin00>;
+                                       };
+                               };
+                       };
                };
 
-               dmac2: dma-controller@e7351000 {
-                       compatible = "renesas,dmac-r8a779a0";
-                       reg = <0 0xe7351000 0 0x1000>,
-                             <0 0xe7310000 0 0x10000>;
-                       interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
-                       interrupt-names = "error",
-                                         "ch0", "ch1", "ch2", "ch3", "ch4",
-                                         "ch5", "ch6", "ch7";
-                       clocks = <&cpg CPG_MOD 710>;
-                       clock-names = "fck";
+               vin01: video@e6ef1000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6ef1000 0 0x1000>;
+                       interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 731>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-                       resets = <&cpg 710>;
-                       #dma-cells = <1>;
-                       dma-channels = <8>;
+                       resets = <&cpg 731>;
+                       renesas,id = <1>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin01isp0: endpoint@0 {
+                                               reg = <0>;
+                                               remote-endpoint = <&isp0vin01>;
+                                       };
+                               };
+                       };
                };
 
-               mmc0: mmc@ee140000 {
-                       compatible = "renesas,sdhi-r8a779a0",
-                                    "renesas,rcar-gen3-sdhi";
-                       reg = <0 0xee140000 0 0x2000>;
-                       interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 706>;
+               vin02: video@e6ef2000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6ef2000 0 0x1000>;
+                       interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 800>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-                       resets = <&cpg 706>;
-                       max-frequency = <200000000>;
+                       resets = <&cpg 800>;
+                       renesas,id = <2>;
                        status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin02isp0: endpoint@0 {
+                                               reg = <0>;
+                                               remote-endpoint = <&isp0vin02>;
+                                       };
+                               };
+                       };
                };
 
-               gic: interrupt-controller@f1000000 {
-                       compatible = "arm,gic-v3";
-                       #interrupt-cells = <3>;
-                       #address-cells = <0>;
-                       interrupt-controller;
-                       reg = <0x0 0xf1000000 0 0x20000>,
-                             <0x0 0xf1060000 0 0x110000>;
-                       interrupts = <GIC_PPI 9
-                                     (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
+               vin03: video@e6ef3000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6ef3000 0 0x1000>;
+                       interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 801>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 801>;
+                       renesas,id = <3>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin03isp0: endpoint@0 {
+                                               reg = <0>;
+                                               remote-endpoint = <&isp0vin03>;
+                                       };
+                               };
+                       };
+               };
+
+               vin04: video@e6ef4000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6ef4000 0 0x1000>;
+                       interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 802>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 802>;
+                       renesas,id = <4>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin04isp0: endpoint@0 {
+                                               reg = <0>;
+                                               remote-endpoint = <&isp0vin04>;
+                                       };
+                               };
+                       };
                };
 
-               prr: chipid@fff00044 {
-                       compatible = "renesas,prr";
-                       reg = <0 0xfff00044 0 4>;
+               vin05: video@e6ef5000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6ef5000 0 0x1000>;
+                       interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 803>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 803>;
+                       renesas,id = <5>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin05isp0: endpoint@0 {
+                                               reg = <0>;
+                                               remote-endpoint = <&isp0vin05>;
+                                       };
+                               };
+                       };
+               };
+
+               vin06: video@e6ef6000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6ef6000 0 0x1000>;
+                       interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 804>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 804>;
+                       renesas,id = <6>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin06isp0: endpoint@0 {
+                                               reg = <0>;
+                                               remote-endpoint = <&isp0vin06>;
+                                       };
+                               };
+                       };
+               };
+
+               vin07: video@e6ef7000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6ef7000 0 0x1000>;
+                       interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 805>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 805>;
+                       renesas,id = <7>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin07isp0: endpoint@0 {
+                                               reg = <0>;
+                                               remote-endpoint = <&isp0vin07>;
+                                       };
+                               };
+                       };
+               };
+
+               vin08: video@e6ef8000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6ef8000 0 0x1000>;
+                       interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 806>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 806>;
+                       renesas,id = <8>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin08isp1: endpoint@1 {
+                                               reg = <1>;
+                                               remote-endpoint = <&isp1vin08>;
+                                       };
+                               };
+                       };
+               };
+
+               vin09: video@e6ef9000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6ef9000 0 0x1000>;
+                       interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 807>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 807>;
+                       renesas,id = <9>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin09isp1: endpoint@1 {
+                                               reg = <1>;
+                                               remote-endpoint = <&isp1vin09>;
+                                       };
+                               };
+                       };
+               };
+
+               vin10: video@e6efa000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6efa000 0 0x1000>;
+                       interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 808>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 808>;
+                       renesas,id = <10>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin10isp1: endpoint@1 {
+                                               reg = <1>;
+                                               remote-endpoint = <&isp1vin10>;
+                                       };
+                               };
+                       };
+               };
+
+               vin11: video@e6efb000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6efb000 0 0x1000>;
+                       interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 809>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 809>;
+                       renesas,id = <11>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin11isp1: endpoint@1 {
+                                               reg = <1>;
+                                               remote-endpoint = <&isp1vin11>;
+                                       };
+                               };
+                       };
+               };
+
+               vin12: video@e6efc000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6efc000 0 0x1000>;
+                       interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 810>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 810>;
+                       renesas,id = <12>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin12isp1: endpoint@1 {
+                                               reg = <1>;
+                                               remote-endpoint = <&isp1vin12>;
+                                       };
+                               };
+                       };
+               };
+
+               vin13: video@e6efd000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6efd000 0 0x1000>;
+                       interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 811>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 811>;
+                       renesas,id = <13>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin13isp1: endpoint@1 {
+                                               reg = <1>;
+                                               remote-endpoint = <&isp1vin13>;
+                                       };
+                               };
+                       };
+               };
+
+               vin14: video@e6efe000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6efe000 0 0x1000>;
+                       interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 812>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 812>;
+                       renesas,id = <14>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin14isp1: endpoint@1 {
+                                               reg = <1>;
+                                               remote-endpoint = <&isp1vin14>;
+                                       };
+                               };
+                       };
+               };
+
+               vin15: video@e6eff000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6eff000 0 0x1000>;
+                       interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 813>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 813>;
+                       renesas,id = <15>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin15isp1: endpoint@1 {
+                                               reg = <1>;
+                                               remote-endpoint = <&isp1vin15>;
+                                       };
+                               };
+                       };
+               };
+
+               vin16: video@e6ed0000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6ed0000 0 0x1000>;
+                       interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 814>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 814>;
+                       renesas,id = <16>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin16isp2: endpoint@2 {
+                                               reg = <2>;
+                                               remote-endpoint = <&isp2vin16>;
+                                       };
+                               };
+                       };
+               };
+
+               vin17: video@e6ed1000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6ed1000 0 0x1000>;
+                       interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 815>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 815>;
+                       renesas,id = <17>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin17isp2: endpoint@2 {
+                                               reg = <2>;
+                                               remote-endpoint = <&isp2vin17>;
+                                       };
+                               };
+                       };
+               };
+
+               vin18: video@e6ed2000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6ed2000 0 0x1000>;
+                       interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 816>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 816>;
+                       renesas,id = <18>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin18isp2: endpoint@2 {
+                                               reg = <2>;
+                                               remote-endpoint = <&isp2vin18>;
+                                       };
+                               };
+                       };
+               };
+
+               vin19: video@e6ed3000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6ed3000 0 0x1000>;
+                       interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 817>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 817>;
+                       renesas,id = <19>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin19isp2: endpoint@2 {
+                                               reg = <2>;
+                                               remote-endpoint = <&isp2vin19>;
+                                       };
+                               };
+                       };
+               };
+
+               vin20: video@e6ed4000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6ed4000 0 0x1000>;
+                       interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 818>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 818>;
+                       renesas,id = <20>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin20isp2: endpoint@2 {
+                                               reg = <2>;
+                                               remote-endpoint = <&isp2vin20>;
+                                       };
+                               };
+                       };
+               };
+
+               vin21: video@e6ed5000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6ed5000 0 0x1000>;
+                       interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 819>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 819>;
+                       renesas,id = <21>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin21isp2: endpoint@2 {
+                                               reg = <2>;
+                                               remote-endpoint = <&isp2vin21>;
+                                       };
+                               };
+                       };
+               };
+
+               vin22: video@e6ed6000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6ed6000 0 0x1000>;
+                       interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 820>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 820>;
+                       renesas,id = <22>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin22isp2: endpoint@2 {
+                                               reg = <2>;
+                                               remote-endpoint = <&isp2vin22>;
+                                       };
+                               };
+                       };
+               };
+
+               vin23: video@e6ed7000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6ed7000 0 0x1000>;
+                       interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 821>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 821>;
+                       renesas,id = <23>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin23isp2: endpoint@2 {
+                                               reg = <2>;
+                                               remote-endpoint = <&isp2vin23>;
+                                       };
+                               };
+                       };
+               };
+
+               vin24: video@e6ed8000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6ed8000 0 0x1000>;
+                       interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 822>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 822>;
+                       renesas,id = <24>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin24isp3: endpoint@3 {
+                                               reg = <3>;
+                                               remote-endpoint = <&isp3vin24>;
+                                       };
+                               };
+                       };
+               };
+
+               vin25: video@e6ed9000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6ed9000 0 0x1000>;
+                       interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 823>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 823>;
+                       renesas,id = <25>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin25isp3: endpoint@3 {
+                                               reg = <3>;
+                                               remote-endpoint = <&isp3vin25>;
+                                       };
+                               };
+                       };
+               };
+
+               vin26: video@e6eda000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6eda000 0 0x1000>;
+                       interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 824>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 824>;
+                       renesas,id = <26>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin26isp3: endpoint@3 {
+                                               reg = <3>;
+                                               remote-endpoint = <&isp3vin26>;
+                                       };
+                               };
+                       };
+               };
+
+               vin27: video@e6edb000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6edb000 0 0x1000>;
+                       interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 825>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 825>;
+                       renesas,id = <27>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin27isp3: endpoint@3 {
+                                               reg = <3>;
+                                               remote-endpoint = <&isp3vin27>;
+                                       };
+                               };
+                       };
+               };
+
+               vin28: video@e6edc000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6edc000 0 0x1000>;
+                       interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 826>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 826>;
+                       renesas,id = <28>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin28isp3: endpoint@3 {
+                                               reg = <3>;
+                                               remote-endpoint = <&isp3vin28>;
+                                       };
+                               };
+                       };
+               };
+
+               vin29: video@e6edd000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6edd000 0 0x1000>;
+                       interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 827>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 827>;
+                       renesas,id = <29>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin29isp3: endpoint@3 {
+                                               reg = <3>;
+                                               remote-endpoint = <&isp3vin29>;
+                                       };
+                               };
+                       };
+               };
+
+               vin30: video@e6ede000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6ede000 0 0x1000>;
+                       interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 828>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 828>;
+                       renesas,id = <30>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin30isp3: endpoint@3 {
+                                               reg = <3>;
+                                               remote-endpoint = <&isp3vin30>;
+                                       };
+                               };
+                       };
+               };
+
+               vin31: video@e6edf000 {
+                       compatible = "renesas,vin-r8a779a0";
+                       reg = <0 0xe6edf000 0 0x1000>;
+                       interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 829>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 829>;
+                       renesas,id = <31>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@2 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <2>;
+
+                                       vin31isp3: endpoint@3 {
+                                               reg = <3>;
+                                               remote-endpoint = <&isp3vin31>;
+                                       };
+                               };
+                       };
+               };
+
+               dmac1: dma-controller@e7350000 {
+                       compatible = "renesas,dmac-r8a779a0",
+                                    "renesas,rcar-gen4-dmac";
+                       reg = <0 0xe7350000 0 0x1000>,
+                             <0 0xe7300000 0 0x10000>;
+                       interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "error",
+                                         "ch0", "ch1", "ch2", "ch3", "ch4",
+                                         "ch5", "ch6", "ch7", "ch8", "ch9",
+                                         "ch10", "ch11", "ch12", "ch13",
+                                         "ch14", "ch15";
+                       clocks = <&cpg CPG_MOD 709>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 709>;
+                       #dma-cells = <1>;
+                       dma-channels = <16>;
+               };
+
+               dmac2: dma-controller@e7351000 {
+                       compatible = "renesas,dmac-r8a779a0",
+                                    "renesas,rcar-gen4-dmac";
+                       reg = <0 0xe7351000 0 0x1000>,
+                             <0 0xe7310000 0 0x10000>;
+                       interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "error",
+                                         "ch0", "ch1", "ch2", "ch3", "ch4",
+                                         "ch5", "ch6", "ch7";
+                       clocks = <&cpg CPG_MOD 710>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 710>;
+                       #dma-cells = <1>;
+                       dma-channels = <8>;
+               };
+
+               mmc0: mmc@ee140000 {
+                       compatible = "renesas,sdhi-r8a779a0",
+                                    "renesas,rcar-gen4-sdhi";
+                       reg = <0 0xee140000 0 0x2000>;
+                       interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 706>, <&cpg CPG_CORE R8A779A0_CLK_SD0H>;
+                       clock-names = "core", "clkh";
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 706>;
+                       max-frequency = <200000000>;
+                       iommus = <&ipmmu_ds0 32>;
+                       status = "disabled";
+               };
+
+               rpc: spi@ee200000 {
+                       compatible = "renesas,r8a779a0-rpc-if",
+                                    "renesas,rcar-gen3-rpc-if";
+                       reg = <0 0xee200000 0 0x200>,
+                             <0 0x08000000 0 0x04000000>,
+                             <0 0xee208000 0 0x100>;
+                       reg-names = "regs", "dirmap", "wbuf";
+                       interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 629>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 629>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
+               ipmmu_rt0: iommu@ee480000 {
+                       compatible = "renesas,ipmmu-r8a779a0",
+                                    "renesas,rcar-gen4-ipmmu-vmsa";
+                       reg = <0 0xee480000 0 0x20000>;
+                       renesas,ipmmu-main = <&ipmmu_mm 10>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       #iommu-cells = <1>;
+               };
+
+               ipmmu_rt1: iommu@ee4c0000 {
+                       compatible = "renesas,ipmmu-r8a779a0",
+                                    "renesas,rcar-gen4-ipmmu-vmsa";
+                       reg = <0 0xee4c0000 0 0x20000>;
+                       renesas,ipmmu-main = <&ipmmu_mm 19>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       #iommu-cells = <1>;
+               };
+
+               ipmmu_ds0: iommu@eed00000 {
+                       compatible = "renesas,ipmmu-r8a779a0",
+                                    "renesas,rcar-gen4-ipmmu-vmsa";
+                       reg = <0 0xeed00000 0 0x20000>;
+                       renesas,ipmmu-main = <&ipmmu_mm 0>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       #iommu-cells = <1>;
+               };
+
+               ipmmu_ds1: iommu@eed40000 {
+                       compatible = "renesas,ipmmu-r8a779a0",
+                                    "renesas,rcar-gen4-ipmmu-vmsa";
+                       reg = <0 0xeed40000 0 0x20000>;
+                       renesas,ipmmu-main = <&ipmmu_mm 1>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       #iommu-cells = <1>;
+               };
+
+               ipmmu_ir: iommu@eed80000 {
+                       compatible = "renesas,ipmmu-r8a779a0",
+                                    "renesas,rcar-gen4-ipmmu-vmsa";
+                       reg = <0 0xeed80000 0 0x20000>;
+                       renesas,ipmmu-main = <&ipmmu_mm 3>;
+                       power-domains = <&sysc R8A779A0_PD_A3IR>;
+                       #iommu-cells = <1>;
+               };
+
+               ipmmu_vc0: iommu@eedc0000 {
+                       compatible = "renesas,ipmmu-r8a779a0",
+                                    "renesas,rcar-gen4-ipmmu-vmsa";
+                       reg = <0 0xeedc0000 0 0x20000>;
+                       renesas,ipmmu-main = <&ipmmu_mm 12>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       #iommu-cells = <1>;
+               };
+
+               ipmmu_vi0: iommu@eee80000 {
+                       compatible = "renesas,ipmmu-r8a779a0",
+                                    "renesas,rcar-gen4-ipmmu-vmsa";
+                       reg = <0 0xeee80000 0 0x20000>;
+                       renesas,ipmmu-main = <&ipmmu_mm 14>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       #iommu-cells = <1>;
+               };
+
+               ipmmu_vi1: iommu@eeec0000 {
+                       compatible = "renesas,ipmmu-r8a779a0",
+                                    "renesas,rcar-gen4-ipmmu-vmsa";
+                       reg = <0 0xeeec0000 0 0x20000>;
+                       renesas,ipmmu-main = <&ipmmu_mm 15>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       #iommu-cells = <1>;
+               };
+
+               ipmmu_3dg: iommu@eee00000 {
+                       compatible = "renesas,ipmmu-r8a779a0",
+                                    "renesas,rcar-gen4-ipmmu-vmsa";
+                       reg = <0 0xeee00000 0 0x20000>;
+                       renesas,ipmmu-main = <&ipmmu_mm 6>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       #iommu-cells = <1>;
+               };
+
+               ipmmu_vip0: iommu@eef00000 {
+                       compatible = "renesas,ipmmu-r8a779a0",
+                                    "renesas,rcar-gen4-ipmmu-vmsa";
+                       reg = <0 0xeef00000 0 0x20000>;
+                       renesas,ipmmu-main = <&ipmmu_mm 5>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       #iommu-cells = <1>;
+               };
+
+               ipmmu_vip1: iommu@eef40000 {
+                       compatible = "renesas,ipmmu-r8a779a0",
+                                    "renesas,rcar-gen4-ipmmu-vmsa";
+                       reg = <0 0xeef40000 0 0x20000>;
+                       renesas,ipmmu-main = <&ipmmu_mm 11>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       #iommu-cells = <1>;
+               };
+
+               ipmmu_mm: iommu@eefc0000 {
+                       compatible = "renesas,ipmmu-r8a779a0",
+                                    "renesas,rcar-gen4-ipmmu-vmsa";
+                       reg = <0 0xeefc0000 0 0x20000>;
+                       interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       #iommu-cells = <1>;
+               };
+
+               gic: interrupt-controller@f1000000 {
+                       compatible = "arm,gic-v3";
+                       #interrupt-cells = <3>;
+                       #address-cells = <0>;
+                       interrupt-controller;
+                       reg = <0x0 0xf1000000 0 0x20000>,
+                             <0x0 0xf1060000 0 0x110000>;
+                       interrupts = <GIC_PPI 9
+                                     (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
+               };
+
+               fcpvd0: fcp@fea10000 {
+                       compatible = "renesas,fcpv";
+                       reg = <0 0xfea10000 0 0x200>;
+                       clocks = <&cpg CPG_MOD 508>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 508>;
+               };
+
+               fcpvd1: fcp@fea11000 {
+                       compatible = "renesas,fcpv";
+                       reg = <0 0xfea11000 0 0x200>;
+                       clocks = <&cpg CPG_MOD 509>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 509>;
+               };
+
+               vspd0: vsp@fea20000 {
+                       compatible = "renesas,vsp2";
+                       reg = <0 0xfea20000 0 0x5000>;
+                       interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 830>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 830>;
+
+                       renesas,fcp = <&fcpvd0>;
+               };
+
+               vspd1: vsp@fea28000 {
+                       compatible = "renesas,vsp2";
+                       reg = <0 0xfea28000 0 0x5000>;
+                       interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 831>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 831>;
+
+                       renesas,fcp = <&fcpvd1>;
+               };
+
+               csi40: csi2@feaa0000 {
+                       compatible = "renesas,r8a779a0-csi2";
+                       reg = <0 0xfeaa0000 0 0x10000>;
+                       interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 331>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 331>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       reg = <0>;
+                               };
+
+                               port@1 {
+                                       reg = <1>;
+                                       csi40isp0: endpoint {
+                                               remote-endpoint = <&isp0csi40>;
+                                       };
+                               };
+                       };
+               };
+
+               csi41: csi2@feab0000 {
+                       compatible = "renesas,r8a779a0-csi2";
+                       reg = <0 0xfeab0000 0 0x10000>;
+                       interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 400>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 400>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       reg = <0>;
+                               };
+
+                               port@1 {
+                                       reg = <1>;
+                                       csi41isp1: endpoint {
+                                               remote-endpoint = <&isp1csi41>;
+                                       };
+                               };
+                       };
+               };
+
+               csi42: csi2@fed60000 {
+                       compatible = "renesas,r8a779a0-csi2";
+                       reg = <0 0xfed60000 0 0x10000>;
+                       interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 401>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 401>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       reg = <0>;
+                               };
+
+                               port@1 {
+                                       reg = <1>;
+                                       csi42isp2: endpoint {
+                                               remote-endpoint = <&isp2csi42>;
+                                       };
+                               };
+                       };
+               };
+
+               csi43: csi2@fed70000 {
+                       compatible = "renesas,r8a779a0-csi2";
+                       reg = <0 0xfed70000 0 0x10000>;
+                       interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 402>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 402>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       reg = <0>;
+                               };
+
+                               port@1 {
+                                       reg = <1>;
+                                       csi43isp3: endpoint {
+                                               remote-endpoint = <&isp3csi43>;
+                                       };
+                               };
+                       };
+               };
+
+               du: display@feb00000 {
+                       compatible = "renesas,du-r8a779a0";
+                       reg = <0 0xfeb00000 0 0x40000>;
+                       interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 411>;
+                       clock-names = "du.0";
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 411>;
+                       reset-names = "du.0";
+                       renesas,vsps = <&vspd0 0>, <&vspd1 0>;
+
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       reg = <0>;
+                                       du_out_dsi0: endpoint {
+                                               remote-endpoint = <&dsi0_in>;
+                                       };
+                               };
+
+                               port@1 {
+                                       reg = <1>;
+                                       du_out_dsi1: endpoint {
+                                               remote-endpoint = <&dsi1_in>;
+                                       };
+                               };
+                       };
+               };
+
+               isp0: isp@fed00000 {
+                       compatible = "renesas,r8a779a0-isp";
+                       reg = <0 0xfed00000 0 0x10000>;
+                       interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 612>;
+                       power-domains = <&sysc R8A779A0_PD_A3ISP01>;
+                       resets = <&cpg 612>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <0>;
+
+                                       isp0csi40: endpoint@0 {
+                                               reg = <0>;
+                                               remote-endpoint = <&csi40isp0>;
+                                       };
+                               };
+
+                               port@1 {
+                                       reg = <1>;
+                                       isp0vin00: endpoint {
+                                               remote-endpoint = <&vin00isp0>;
+                                       };
+                               };
+
+                               port@2 {
+                                       reg = <2>;
+                                       isp0vin01: endpoint {
+                                               remote-endpoint = <&vin01isp0>;
+                                       };
+                               };
+
+                               port@3 {
+                                       reg = <3>;
+                                       isp0vin02: endpoint {
+                                               remote-endpoint = <&vin02isp0>;
+                                       };
+                               };
+
+                               port@4 {
+                                       reg = <4>;
+                                       isp0vin03: endpoint {
+                                               remote-endpoint = <&vin03isp0>;
+                                       };
+                               };
+
+                               port@5 {
+                                       reg = <5>;
+                                       isp0vin04: endpoint {
+                                               remote-endpoint = <&vin04isp0>;
+                                       };
+                               };
+
+                               port@6 {
+                                       reg = <6>;
+                                       isp0vin05: endpoint {
+                                               remote-endpoint = <&vin05isp0>;
+                                       };
+                               };
+
+                               port@7 {
+                                       reg = <7>;
+                                       isp0vin06: endpoint {
+                                               remote-endpoint = <&vin06isp0>;
+                                       };
+                               };
+
+                               port@8 {
+                                       reg = <8>;
+                                       isp0vin07: endpoint {
+                                               remote-endpoint = <&vin07isp0>;
+                                       };
+                               };
+                       };
+               };
+
+               isp1: isp@fed20000 {
+                       compatible = "renesas,r8a779a0-isp";
+                       reg = <0 0xfed20000 0 0x10000>;
+                       interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 613>;
+                       power-domains = <&sysc R8A779A0_PD_A3ISP01>;
+                       resets = <&cpg 613>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <0>;
+
+                                       isp1csi41: endpoint@1 {
+                                               reg = <1>;
+                                               remote-endpoint = <&csi41isp1>;
+                                       };
+                               };
+
+                               port@1 {
+                                       reg = <1>;
+                                       isp1vin08: endpoint {
+                                               remote-endpoint = <&vin08isp1>;
+                                       };
+                               };
+
+                               port@2 {
+                                       reg = <2>;
+                                       isp1vin09: endpoint {
+                                               remote-endpoint = <&vin09isp1>;
+                                       };
+                               };
+
+                               port@3 {
+                                       reg = <3>;
+                                       isp1vin10: endpoint {
+                                               remote-endpoint = <&vin10isp1>;
+                                       };
+                               };
+
+                               port@4 {
+                                       reg = <4>;
+                                       isp1vin11: endpoint {
+                                               remote-endpoint = <&vin11isp1>;
+                                       };
+                               };
+
+                               port@5 {
+                                       reg = <5>;
+                                       isp1vin12: endpoint {
+                                               remote-endpoint = <&vin12isp1>;
+                                       };
+                               };
+
+                               port@6 {
+                                       reg = <6>;
+                                       isp1vin13: endpoint {
+                                               remote-endpoint = <&vin13isp1>;
+                                       };
+                               };
+
+                               port@7 {
+                                       reg = <7>;
+                                       isp1vin14: endpoint {
+                                               remote-endpoint = <&vin14isp1>;
+                                       };
+                               };
+
+                               port@8 {
+                                       reg = <8>;
+                                       isp1vin15: endpoint {
+                                               remote-endpoint = <&vin15isp1>;
+                                       };
+                               };
+                       };
+               };
+
+               isp2: isp@fed30000 {
+                       compatible = "renesas,r8a779a0-isp";
+                       reg = <0 0xfed30000 0 0x10000>;
+                       interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 614>;
+                       power-domains = <&sysc R8A779A0_PD_A3ISP23>;
+                       resets = <&cpg 614>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <0>;
+
+                                       isp2csi42: endpoint@0 {
+                                               reg = <0>;
+                                               remote-endpoint = <&csi42isp2>;
+                                       };
+                               };
+
+                               port@1 {
+                                       reg = <1>;
+                                       isp2vin16: endpoint {
+                                               remote-endpoint = <&vin16isp2>;
+                                       };
+                               };
+
+                               port@2 {
+                                       reg = <2>;
+                                       isp2vin17: endpoint {
+                                               remote-endpoint = <&vin17isp2>;
+                                       };
+                               };
+
+                               port@3 {
+                                       reg = <3>;
+                                       isp2vin18: endpoint {
+                                               remote-endpoint = <&vin18isp2>;
+                                       };
+                               };
+
+                               port@4 {
+                                       reg = <4>;
+                                       isp2vin19: endpoint {
+                                               remote-endpoint = <&vin19isp2>;
+                                       };
+                               };
+
+                               port@5 {
+                                       reg = <5>;
+                                       isp2vin20: endpoint {
+                                               remote-endpoint = <&vin20isp2>;
+                                       };
+                               };
+
+                               port@6 {
+                                       reg = <6>;
+                                       isp2vin21: endpoint {
+                                               remote-endpoint = <&vin21isp2>;
+                                       };
+                               };
+
+                               port@7 {
+                                       reg = <7>;
+                                       isp2vin22: endpoint {
+                                               remote-endpoint = <&vin22isp2>;
+                                       };
+                               };
+
+                               port@8 {
+                                       reg = <8>;
+                                       isp2vin23: endpoint {
+                                               remote-endpoint = <&vin23isp2>;
+                                       };
+                               };
+                       };
+               };
+
+               isp3: isp@fed40000 {
+                       compatible = "renesas,r8a779a0-isp";
+                       reg = <0 0xfed40000 0 0x10000>;
+                       interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 615>;
+                       power-domains = <&sysc R8A779A0_PD_A3ISP23>;
+                       resets = <&cpg 615>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <0>;
+
+                                       isp3csi43: endpoint@1 {
+                                               reg = <1>;
+                                               remote-endpoint = <&csi43isp3>;
+                                       };
+                               };
+
+                               port@1 {
+                                       reg = <1>;
+                                       isp3vin24: endpoint {
+                                               remote-endpoint = <&vin24isp3>;
+                                       };
+                               };
+
+                               port@2 {
+                                       reg = <2>;
+                                       isp3vin25: endpoint {
+                                               remote-endpoint = <&vin25isp3>;
+                                       };
+                               };
+
+                               port@3 {
+                                       reg = <3>;
+                                       isp3vin26: endpoint {
+                                               remote-endpoint = <&vin26isp3>;
+                                       };
+                               };
+
+                               port@4 {
+                                       reg = <4>;
+                                       isp3vin27: endpoint {
+                                               remote-endpoint = <&vin27isp3>;
+                                       };
+                               };
+
+                               port@5 {
+                                       reg = <5>;
+                                       isp3vin28: endpoint {
+                                               remote-endpoint = <&vin28isp3>;
+                                       };
+                               };
+
+                               port@6 {
+                                       reg = <6>;
+                                       isp3vin29: endpoint {
+                                               remote-endpoint = <&vin29isp3>;
+                                       };
+                               };
+
+                               port@7 {
+                                       reg = <7>;
+                                       isp3vin30: endpoint {
+                                               remote-endpoint = <&vin30isp3>;
+                                       };
+                               };
+
+                               port@8 {
+                                       reg = <8>;
+                                       isp3vin31: endpoint {
+                                               remote-endpoint = <&vin31isp3>;
+                                       };
+                               };
+                       };
+               };
+
+               dsi0: dsi-encoder@fed80000 {
+                       compatible = "renesas,r8a779a0-dsi-csi2-tx";
+                       reg = <0 0xfed80000 0 0x10000>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       clocks = <&cpg CPG_MOD 415>,
+                                <&cpg CPG_CORE R8A779A0_CLK_DSI>,
+                                <&cpg CPG_CORE R8A779A0_CLK_CL16MCK>;
+                       clock-names = "fck", "dsi", "pll";
+                       resets = <&cpg 415>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       reg = <0>;
+                                       dsi0_in: endpoint {
+                                               remote-endpoint = <&du_out_dsi0>;
+                                       };
+                               };
+
+                               port@1 {
+                                       reg = <1>;
+                               };
+                       };
+               };
+
+               dsi1: dsi-encoder@fed90000 {
+                       compatible = "renesas,r8a779a0-dsi-csi2-tx";
+                       reg = <0 0xfed90000 0 0x10000>;
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       clocks = <&cpg CPG_MOD 416>,
+                                <&cpg CPG_CORE R8A779A0_CLK_DSI>,
+                                <&cpg CPG_CORE R8A779A0_CLK_CL16MCK>;
+                       clock-names = "fck", "dsi", "pll";
+                       resets = <&cpg 416>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       reg = <0>;
+                                       dsi1_in: endpoint {
+                                               remote-endpoint = <&du_out_dsi1>;
+                                       };
+                               };
+
+                               port@1 {
+                                       reg = <1>;
+                               };
+                       };
+               };
+
+               prr: chipid@fff00044 {
+                       compatible = "renesas,prr";
+                       reg = <0 0xfff00044 0 4>;
+               };
+       };
+
+       thermal-zones {
+               sensor1_thermal: sensor1-thermal {
+                       polling-delay-passive = <250>;
+                       polling-delay = <1000>;
+                       thermal-sensors = <&tsc 0>;
+
+                       trips {
+                               sensor1_crit: sensor1-crit {
+                                       temperature = <120000>;
+                                       hysteresis = <1000>;
+                                       type = "critical";
+                               };
+                       };
+               };
+
+               sensor2_thermal: sensor2-thermal {
+                       polling-delay-passive = <250>;
+                       polling-delay = <1000>;
+                       thermal-sensors = <&tsc 1>;
+
+                       trips {
+                               sensor2_crit: sensor2-crit {
+                                       temperature = <120000>;
+                                       hysteresis = <1000>;
+                                       type = "critical";
+                               };
+                       };
+               };
+
+               sensor3_thermal: sensor3-thermal {
+                       polling-delay-passive = <250>;
+                       polling-delay = <1000>;
+                       thermal-sensors = <&tsc 2>;
+
+                       trips {
+                               sensor3_crit: sensor3-crit {
+                                       temperature = <120000>;
+                                       hysteresis = <1000>;
+                                       type = "critical";
+                               };
+                       };
+               };
+
+               sensor4_thermal: sensor4-thermal {
+                       polling-delay-passive = <250>;
+                       polling-delay = <1000>;
+                       thermal-sensors = <&tsc 3>;
+
+                       trips {
+                               sensor4_crit: sensor4-crit {
+                                       temperature = <120000>;
+                                       hysteresis = <1000>;
+                                       type = "critical";
+                               };
+                       };
+               };
+
+               sensor5_thermal: sensor5-thermal {
+                       polling-delay-passive = <250>;
+                       polling-delay = <1000>;
+                       thermal-sensors = <&tsc 4>;
+
+                       trips {
+                               sensor5_crit: sensor5-crit {
+                                       temperature = <120000>;
+                                       hysteresis = <1000>;
+                                       type = "critical";
+                               };
+                       };
                };
        };
 
index ff88af8e39d3fa10fb69e10d21f621ede93d4754..29cedf4dc1a9df19fa6278c3fd08d612c8fe15e2 100644 (file)
        model = "Renesas R-Car Gen3 ULCB board";
 
        aliases {
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               i2c2 = &i2c2;
+               i2c3 = &i2c3;
+               i2c4 = &i2c4;
+               i2c5 = &i2c5;
+               i2c6 = &i2c6;
+               i2c7 = &i2c_dvfs;
                serial0 = &scif2;
                ethernet0 = &avb;
+               mmc0 = &sdhi2;
+               mmc1 = &sdhi0;
        };
 
        chosen {
@@ -46,6 +56,7 @@
 
                port {
                        hdmi0_con: endpoint {
+                               remote-endpoint = <&rcar_dw_hdmi0_out>;
                        };
                };
        };
@@ -73,7 +84,7 @@
                };
        };
 
-       reg_1p8v: regulator0 {
+       reg_1p8v: regulator-1p8v {
                compatible = "regulator-fixed";
                regulator-name = "fixed-1.8V";
                regulator-min-microvolt = <1800000>;
@@ -82,7 +93,7 @@
                regulator-always-on;
        };
 
-       reg_3p3v: regulator1 {
+       reg_3p3v: regulator-3p3v {
                compatible = "regulator-fixed";
                regulator-name = "fixed-3.3V";
                regulator-min-microvolt = <3300000>;
        };
 
        sound_card: sound {
-               compatible = "audio-graph-card";
+               compatible = "audio-graph-card2";
                label = "rcar-sound";
 
-               dais = <&rsnd_port0     /* ak4613 */
-                       &rsnd_port1     /* HDMI0  */
+               links = <&rsnd_port0    /* ak4613 */
+                        &rsnd_port1    /* HDMI0  */
                        >;
        };
 
        };
 };
 
+&a57_0 {
+       cpu-supply = <&dvfs>;
+};
+
 &audio_clk_a {
        clock-frequency = <22579200>;
 };
        pinctrl-0 = <&avb_pins>;
        pinctrl-names = "default";
        phy-handle = <&phy0>;
-       phy-mode = "rgmii-txid";
+       tx-internal-delay-ps = <2000>;
        status = "okay";
 
        phy0: ethernet-phy@0 {
+               compatible = "ethernet-phy-id0022.1622",
+                            "ethernet-phy-ieee802.3-c22";
                rxc-skew-ps = <1500>;
                reg = <0>;
                interrupt-parent = <&gpio2>;
        };
 };
 
-&hdmi0_con {
-       remote-endpoint = <&rcar_dw_hdmi0_out>;
-};
-
 &i2c2 {
        pinctrl-0 = <&i2c2_pins>;
        pinctrl-names = "default";
 };
 
 &rcar_sound {
-       pinctrl-0 = <&sound_pins &sound_clk_pins>;
+       pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
        pinctrl-names = "default";
 
        /* Single DAI */
                        reg = <0>;
                        rsnd_for_ak4613: endpoint {
                                remote-endpoint = <&ak4613_endpoint>;
-
-                               dai-format = "left_j";
-                               bitclock-master = <&rsnd_for_ak4613>;
-                               frame-master = <&rsnd_for_ak4613>;
-
-                               playback = <&ssi0 &src0 &dvc0>;
-                               capture  = <&ssi1 &src1 &dvc1>;
+                               bitclock-master;
+                               frame-master;
+                               playback = <&ssi0>, <&src0>, <&dvc0>;
+                               capture = <&ssi1>, <&src1>, <&dvc1>;
                        };
                };
                rsnd_port1: port@1 {
                        reg = <1>;
                        rsnd_for_hdmi: endpoint {
                                remote-endpoint = <&dw_hdmi0_snd_in>;
+                               bitclock-master;
+                               frame-master;
+                               playback = <&ssi2>;
+                       };
+               };
+       };
+};
 
-                               dai-format = "i2s";
-                               bitclock-master = <&rsnd_for_hdmi>;
-                               frame-master = <&rsnd_for_hdmi>;
+&rpc {
+       /* Left disabled.  To be enabled by firmware when unlocked. */
 
-                               playback = <&ssi2>;
+       flash@0 {
+               compatible = "cypress,hyperflash", "cfi-flash";
+               reg = <0>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       bootparam@0 {
+                               reg = <0x00000000 0x040000>;
+                               read-only;
+                       };
+                       bl2@40000 {
+                               reg = <0x00040000 0x140000>;
+                               read-only;
+                       };
+                       cert_header_sa6@180000 {
+                               reg = <0x00180000 0x040000>;
+                               read-only;
+                       };
+                       bl31@1c0000 {
+                               reg = <0x001c0000 0x040000>;
+                               read-only;
+                       };
+                       tee@200000 {
+                               reg = <0x00200000 0x440000>;
+                               read-only;
+                       };
+                       uboot@640000 {
+                               reg = <0x00640000 0x100000>;
+                               read-only;
+                       };
+                       dtb@740000 {
+                               reg = <0x00740000 0x080000>;
+                       };
+                       kernel@7c0000 {
+                               reg = <0x007c0000 0x1400000>;
+                       };
+                       user@1bc0000 {
+                               reg = <0x01bc0000 0x2440000>;
                        };
                };
        };
        bus-width = <8>;
        mmc-hs200-1_8v;
        mmc-hs400-1_8v;
+       no-sd;
+       no-sdio;
        non-removable;
+       full-pwr-cycle-in-suspend;
        status = "okay";
 };
 
index 00337e07ee609329df3b5827baccfc446d7a7b4d..ecc797a1b7806710470855e5094232c061718d08 100644 (file)
@@ -56,7 +56,7 @@ CONFIG_OF_REMOVE_PROPS="dmas dma-names interrupt-parent interrupts interrupts-ex
 CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SYS_MMC_ENV_DEV=2
+CONFIG_SYS_MMC_ENV_DEV=0
 CONFIG_SYS_MMC_ENV_PART=2
 CONFIG_VERSION_VARIABLE=y
 CONFIG_REGMAP=y
index 1e964880f6bd36b9a53d46b5307bf57f255eee12..31a79ee7e2408251b0c6bbaea15c6a68b82679f7 100644 (file)
@@ -58,7 +58,7 @@ CONFIG_OF_REMOVE_PROPS="dmas dma-names interrupt-parent interrupts interrupts-ex
 CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SYS_MMC_ENV_DEV=1
+CONFIG_SYS_MMC_ENV_DEV=0
 CONFIG_SYS_MMC_ENV_PART=2
 CONFIG_VERSION_VARIABLE=y
 CONFIG_REGMAP=y
index 26c014cc4f73ec4168b56049f7d5f70ad7a8c66b..699df3cf3ee3a20cd200c48fda3813ea77d4037a 100644 (file)
@@ -17,7 +17,7 @@
 #include <linux/kernel.h>
 #include <linux/math64.h>
 
-#include <dt-bindings/clk/versaclock.h>
+#include <dt-bindings/clock/versaclock.h>
 
 /* VersaClock5 registers */
 #define VC5_OTP_CONTROL                                0x00