Convert CONFIG_SYS_NAND_DBW_8 et al to Kconfig

This converts the following to Kconfig:
   CONFIG_SYS_NAND_DBW_8
   CONFIG_SYS_NAND_DBW_16

Note that all instances of the code check for CONFIG_SYS_NAND_DBW_16
being defined, and then "else" to CONFIG_SYS_NAND_DBW_8 whereas all of
the configs set CONFIG_SYS_NAND_DBW_8. So we introduce
CONFIG_SYS_NAND_DBW_16 as an option.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index da2c5795bc32cea77791ddc312fd05c76a949c1b..48a7507c643bddb7feecee2561754862d3822112 100644 (file)
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -83,6 +83,18 @@ config SPL_GENERATE_ATMEL_PMECC_HEADER
        help
          Generate Programmable Multibit ECC (PMECC) header for SPL image.
 
+choice
+       prompt "NAND bus width (bits)"
+       default SYS_NAND_DBW_8
+
+config SYS_NAND_DBW_8
+       bool "NAND bus width is 8 bits"
+
+config SYS_NAND_DBW_16
+       bool "NAND bus width is 16 bits"
+
+endchoice
+
 endif
 
 config NAND_BRCMNAND

diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h
index d51da9d506788311985182e14d4be87efc37f54d..60b47379e5e29b7f550f318ec7d8f79ab055ae88 100644 (file)
--- a/include/configs/at91sam9260ek.h
+++ b/include/configs/at91sam9260ek.h
@@ -44,7 +44,6 @@
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_SYS_NAND_BASE           ATMEL_BASE_CS3
-#define CONFIG_SYS_NAND_DBW_8
 #define CONFIG_SYS_NAND_MASK_ALE       (1 << 21)
 #define CONFIG_SYS_NAND_MASK_CLE       (1 << 22)
 #define CONFIG_SYS_NAND_ENABLE_PIN     AT91_PIN_PC14

diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h
index 5dc8f21a85355971841fdc067d984c5234dcf350..d80a686e9eef03e5dad4cc95431c0ccc2339a159 100644 (file)
--- a/include/configs/at91sam9261ek.h
+++ b/include/configs/at91sam9261ek.h
@@ -25,7 +25,6 @@
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_SYS_NAND_BASE                   0x40000000
-#define CONFIG_SYS_NAND_DBW_8
 /* our ALE is AD22 */
 #define CONFIG_SYS_NAND_MASK_ALE               (1 << 22)
 /* our CLE is AD21 */

diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h
index d31a7742a175da4b0233112367359f76f3ef6e75..89a8e43e1e09257676a8653be2a0f9e9f6b20976 100644 (file)
--- a/include/configs/at91sam9263ek.h
+++ b/include/configs/at91sam9263ek.h
@@ -151,7 +151,6 @@
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_SYS_NAND_BASE                   ATMEL_BASE_CS3
-#define CONFIG_SYS_NAND_DBW_8                  1
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE               (1 << 21)
 /* our CLE is AD22 */

diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h
index 01085476a4307722d159cd7682d56f5491df305f..55edd706ead99691d9ea593abd529c13cdfb8055 100644 (file)
--- a/include/configs/at91sam9m10g45ek.h
+++ b/include/configs/at91sam9m10g45ek.h
@@ -21,7 +21,6 @@
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_SYS_NAND_BASE                   ATMEL_BASE_CS3
-#define CONFIG_SYS_NAND_DBW_8
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE               (1 << 21)
 /* our CLE is AD22 */

diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h
index c60c248b747ecd6433f692e81f7a9fc2cf7a1c6e..0a512c217f8ea4d25ad90539bc0f8b8028eccfa8 100644 (file)
--- a/include/configs/at91sam9rlek.h
+++ b/include/configs/at91sam9rlek.h
@@ -26,7 +26,6 @@
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_SYS_NAND_BASE                   ATMEL_BASE_CS3
-#define CONFIG_SYS_NAND_DBW_8                  1
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE               (1 << 21)
 /* our CLE is AD22 */

diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h
index 71a2863bfc2b8000e18815792f217b4a9bf5b0bf..b8a14d571d6f8d6bc13cf5cf3d89769bac634a83 100644 (file)
--- a/include/configs/at91sam9x5ek.h
+++ b/include/configs/at91sam9x5ek.h
@@ -28,7 +28,6 @@
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_SYS_NAND_BASE           0x40000000
-#define CONFIG_SYS_NAND_DBW_8          1
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE       (1 << 21)
 /* our CLE is AD22 */

diff --git a/include/configs/corvus.h b/include/configs/corvus.h
index 0596afbf9fa2f1e038fba4d7693d5ea86e632f89..3e7c0c0d883be674c8c3c23f76e272a5c2417077 100644 (file)
--- a/include/configs/corvus.h
+++ b/include/configs/corvus.h
@@ -38,7 +38,6 @@
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_SYS_NAND_BASE                   ATMEL_BASE_CS3
-#define CONFIG_SYS_NAND_DBW_8
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE               (1 << 21)
 /* our CLE is AD22 */

diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h
index 22647abee0d3f5a74f2d7e1eed27bcaaaa4482a2..a18920d3f09e17b8dc82ebd58b080cbdde8518ce 100644 (file)
--- a/include/configs/ethernut5.h
+++ b/include/configs/ethernut5.h
@@ -38,7 +38,6 @@
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_SYS_NAND_BASE           0x40000000
-#define CONFIG_SYS_NAND_DBW_8
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE       (1 << 21)
 /* our CLE is AD22 */

diff --git a/include/configs/gardena-smart-gateway-at91sam.h b/include/configs/gardena-smart-gateway-at91sam.h
index 52b9fe2b1711734366fb75540c0f9b2ff837dee2..3d62efb38ff98d2bfaf8639339593174c3aa7b62 100644 (file)
--- a/include/configs/gardena-smart-gateway-at91sam.h
+++ b/include/configs/gardena-smart-gateway-at91sam.h
@@ -23,7 +23,6 @@
 
 /* NAND flash */
 #define CONFIG_SYS_NAND_BASE           0x40000000
-#define CONFIG_SYS_NAND_DBW_8          1
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE       BIT(21)
 /* our CLE is AD22 */

diff --git a/include/configs/meesc.h b/include/configs/meesc.h
index 9f913fad168f5125ec4bd3ad1fa530b7a1e7200f..30267e29a1260d1e300819580cfd95fea3c5ad4f 100644 (file)
--- a/include/configs/meesc.h
+++ b/include/configs/meesc.h
@@ -53,7 +53,6 @@
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 # define CONFIG_SYS_NAND_BASE                  ATMEL_BASE_CS3 /* 0x40000000 */
-# define CONFIG_SYS_NAND_DBW_8
 # define CONFIG_SYS_NAND_MASK_ALE              (1 << 21)
 # define CONFIG_SYS_NAND_MASK_CLE              (1 << 22)
 # define CONFIG_SYS_NAND_ENABLE_PIN            GPIO_PIN_PD(15)

diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h
index 278f1b5cc622361455cfb63724f67c406bd4e6a6..6a89fb1fa9a4d556d31302749ac50ffd560ce9d8 100644 (file)
--- a/include/configs/pm9261.h
+++ b/include/configs/pm9261.h
@@ -130,7 +130,6 @@
 
 /* NAND flash */
 #define CONFIG_SYS_NAND_BASE                   0x40000000
-#define CONFIG_SYS_NAND_DBW_8                  1
 /* our ALE is AD22 */
 #define CONFIG_SYS_NAND_MASK_ALE               (1 << 22)
 /* our CLE is AD21 */

diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h
index 7c23206a30064ac760c92becc22318d5a1a91009..c56db4d793d33c3c780267cd787e84730fee0ee1 100644 (file)
--- a/include/configs/pm9263.h
+++ b/include/configs/pm9263.h
@@ -147,7 +147,6 @@
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_SYS_NAND_BASE           0x40000000
-#define CONFIG_SYS_NAND_DBW_8          1
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE       (1 << 21)
 /* our CLE is AD22 */

diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h
index 35fd525683635d4e544676083b1e425308cc314e..7d3a326deaf09873f5860de645a81033ee7b8b88 100644 (file)
--- a/include/configs/pm9g45.h
+++ b/include/configs/pm9g45.h
@@ -26,7 +26,6 @@
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_SYS_NAND_BASE                   ATMEL_BASE_CS3
-#define CONFIG_SYS_NAND_DBW_8
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE               BIT(21)
 /* our CLE is AD22 */

diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h
index a77215d19becb60e82846ff28746c709e6ffddac..c8f5816fed99c61d7cb88ea05d57c3ba57522b73 100644 (file)
--- a/include/configs/smartweb.h
+++ b/include/configs/smartweb.h
@@ -55,7 +55,6 @@
 
 /* NAND flash settings */
 #define CONFIG_SYS_NAND_BASE           ATMEL_BASE_CS3
-#define CONFIG_SYS_NAND_DBW_8
 #define CONFIG_SYS_NAND_MASK_ALE       (1 << 21)
 #define CONFIG_SYS_NAND_MASK_CLE       (1 << 22)
 #define CONFIG_SYS_NAND_ENABLE_PIN     AT91_PIN_PC14

diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h
index c56fb378312b88b88ba91b8f3eeb3adc34d5c7f1..6aba1d3194c34ce7a30d28ef18234e5319c88013 100644 (file)
--- a/include/configs/snapper9g45.h
+++ b/include/configs/snapper9g45.h
@@ -31,7 +31,6 @@
 /* NAND Flash */
 #define CONFIG_SYS_NAND_ECC_BASE       ATMEL_BASE_ECC
 #define CONFIG_SYS_NAND_BASE           ATMEL_BASE_CS3
-#define CONFIG_SYS_NAND_DBW_8
 #define CONFIG_SYS_NAND_MASK_ALE       (1 << 21) /* AD21 */
 #define CONFIG_SYS_NAND_MASK_CLE       (1 << 22) /* AD22 */
 #define CONFIG_SYS_NAND_ENABLE_PIN     AT91_PIN_PC14

diff --git a/include/configs/taurus.h b/include/configs/taurus.h
index 45780d9a4ea02dab1369fc1ef87addebde15bf8b..ca9616d8af5aa9ec09456808fd7c7c4d59d9743e 100644 (file)
--- a/include/configs/taurus.h
+++ b/include/configs/taurus.h
@@ -55,7 +55,6 @@
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_SYS_NAND_BASE           ATMEL_BASE_CS3
-#define CONFIG_SYS_NAND_DBW_8
 #define CONFIG_SYS_NAND_MASK_ALE       (1 << 21)
 #define CONFIG_SYS_NAND_MASK_CLE       (1 << 22)
 #define CONFIG_SYS_NAND_ENABLE_PIN     AT91_PIN_PC14