The MXS starts with CPSR V bit set, which makes the CPU jump to high vectors
in case of an exception. Those high vectors are located at 0xffff0000, which
is where the BootROM exception table is located as well. U-Boot should handle
exceptions on its own using its own exception handling code, which is located
at 0x0, i.e. at low vectors. Clear the CPSR V bit, so that the CPU would jump
to low vectors on exception instead, and therefore run the U-Boot exception
handling code.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
* actually 0x20, this the associated <destination address>. Loading the PC
* register with an address performs a jump to that address.
*/
+noinline __attribute__((target("arm")))
void mx28_fixup_vt(uint32_t start_addr)
{
/* ldr pc, [pc, #0x18] */
/* cppcheck-suppress nullPointer */
vt[i + 8] = start_addr + (4 * i);
}
+
+ /* Make sure ARM core points to low vectors */
+ set_cr(get_cr() & ~CR_V);
}
#ifdef CONFIG_ARCH_MISC_INIT
#include <asm/arch/sys_proto.h>
#include <asm/gpio.h>
#include <asm/sections.h>
+#include <asm/system.h>
#include <linux/compiler.h>
#include "mxs_init.h"
return i;
}
-static void mxs_spl_fixup_vectors(void)
+static noinline
+__attribute__((target("arm")))
+void mxs_spl_fixup_vectors(void)
{
/*
* Copy our vector table to 0x0, since due to HAB, we cannot
/* cppcheck-suppress nullPointer */
memcpy(0x0, _start, 0x60);
+
+ /* Make sure ARM core points to low vectors */
+ set_cr(get_cr() & ~CR_V);
}
static void mxs_spl_console_init(void)