am335x_evm: add nand pinmux definition

Add NAND pins mux settings for AM335X devices. Enable NAND pins
for AM335X EVM board.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>

diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c
index 8437ef515afed9dc4fa27162f2a1407400ed0fd2..02837082cb807fad040f8c4007c7bb7d218cdbfc 100644 (file)
--- a/board/ti/am335x/mux.c
+++ b/board/ti/am335x/mux.c
@@ -171,6 +171,25 @@ static struct module_pin_mux mii1_pin_mux[] = {
        {-1},
 };
 
+static struct module_pin_mux nand_pin_mux[] = {
+       {OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)},   /* NAND AD0 */
+       {OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)},   /* NAND AD1 */
+       {OFFSET(gpmc_ad2), (MODE(0) | PULLUP_EN | RXACTIVE)},   /* NAND AD2 */
+       {OFFSET(gpmc_ad3), (MODE(0) | PULLUP_EN | RXACTIVE)},   /* NAND AD3 */
+       {OFFSET(gpmc_ad4), (MODE(0) | PULLUP_EN | RXACTIVE)},   /* NAND AD4 */
+       {OFFSET(gpmc_ad5), (MODE(0) | PULLUP_EN | RXACTIVE)},   /* NAND AD5 */
+       {OFFSET(gpmc_ad6), (MODE(0) | PULLUP_EN | RXACTIVE)},   /* NAND AD6 */
+       {OFFSET(gpmc_ad7), (MODE(0) | PULLUP_EN | RXACTIVE)},   /* NAND AD7 */
+       {OFFSET(gpmc_wait0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* NAND WAIT */
+       {OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN | RXACTIVE)},   /* NAND_WPN */
+       {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)},      /* NAND_CS0 */
+       {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */
+       {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)},   /* NAND_OE */
+       {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)},       /* NAND_WEN */
+       {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)},  /* NAND_BE_CLE */
+       {-1},
+};
+
 void enable_uart0_pin_mux(void)
 {
        configure_module_pin_mux(uart0_pin_mux);
@@ -257,6 +276,9 @@ void enable_board_pin_mux(struct am335x_baseboard_id *header)
                /* In profile #2 i2c1 and spi0 conflict. */
                if (profile & ~PROFILE_2)
                        configure_module_pin_mux(i2c1_pin_mux);
+               /* Profiles 2 & 3 don't have NAND */
+               if (profile & ~(PROFILE_2 | PROFILE_3))
+                       configure_module_pin_mux(nand_pin_mux);
                else if (profile == PROFILE_2) {
                        configure_module_pin_mux(mmc1_pin_mux);
                        configure_module_pin_mux(spi0_pin_mux);