armv8: fsl-layerscape: add missing qe base address define

Add define for QUICC Engine register block base address.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
[York S: revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index be0a6ae363ff18a095787400294eb9394271d40b..8c10526a6cfb3386a829c7ddf522295a4a0d9e7a 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -85,6 +85,8 @@
 #define GPIO3_BASE_ADDR                                (CONFIG_SYS_IMMR + 0x1320000)
 #define GPIO4_BASE_ADDR                                (CONFIG_SYS_IMMR + 0x1330000)
 
+#define QE_BASE_ADDR                           (CONFIG_SYS_IMMR + 0x1400000)
+
 #define LPUART_BASE                            (CONFIG_SYS_IMMR + 0x01950000)
 
 #define EDMA_BASE_ADDR                         (CONFIG_SYS_IMMR + 0x01c00000)