Make R5200 specific low level initialization board conditional.

diff --git a/CHANGELOG b/CHANGELOG
index 1b44e706b48dbb4cb309605b353e941bfe95b721..f2d7985feaa0438c6e7dcfe438339895b591b526 100644 (file)
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,8 @@
 Changes since U-Boot 1.1.4:
 ======================================================================
 
+* Make R5200 specific low level initialization board conditional.
+
 * Update CPU target identification strings for Coldfire family.
 
 * Update register definitions for MCF5271.

diff --git a/cpu/mcf52x2/start.S b/cpu/mcf52x2/start.S
index 8ae9591b8ac36d4f995552e5ecca5279a6d9cd41..3ab812b3d4bf0fe8fcdbab92bcc45663f8ce375f 100644 (file)
--- a/cpu/mcf52x2/start.S
+++ b/cpu/mcf52x2/start.S
@@ -55,7 +55,7 @@
  */
 _vectors:
 
-#ifndef        CONFIG_M5271
+#ifndef        CONFIG_R5200
 .long  0x00000000, _START
 #else
 .long  0x00000000, 0x400       /* Flash offset is 0 until we setup CS0 */
@@ -142,7 +142,9 @@ _start:
        /* Initialize RAMBAR1: locate SRAM and validate it */
        move.l  #(CFG_INIT_RAM_ADDR + 0x21), %d0
        movec   %d0, %RAMBAR1
-#ifdef CONFIG_M5271
+#endif
+
+#ifdef CONFIG_R5200
        move.l  #(_flash_setup-CFG_FLASH_BASE), %a0
        move.l  #(_flash_setup_end-CFG_FLASH_BASE), %a1
        move.l  #(CFG_INIT_RAM_ADDR), %a2
@@ -150,8 +152,6 @@ _copy_flash:
        move.l  (%a0)+, (%a2)+
        cmp.l   %a0, %a1
        bgt.s   _copy_flash
-#endif
-
        jmp     CFG_INIT_RAM_ADDR
 _after_flash_copy:
 #endif
@@ -174,18 +174,24 @@ _after_flash_copy:
        bsr cpu_init_f                          /* run low-level CPU init code (from flash) */
        bsr board_init_f                        /* run low-level board init code (from flash) */
 
-       /* board_init_f() does not return
+       /* board_init_f() does not return */
 
 /*------------------------------------------------------------------------------*/
 
-#ifdef CONFIG_M5271
+#ifdef CONFIG_R5200
 _flash_setup:
-       move.l  #0x1000, %d0
+       /* CSAR0 */
+       move.l  #((CFG_FLASH_BASE & 0xffff0000) >> 16), %d0
        move.w  %d0, 0x40000080
-       move.l  #0x2180, %d0
+
+       /* CSCR0 */
+       move.l  #0x2180, %d0            /* 8 wait states, 16bit port, auto ack,  */
        move.w  %d0, 0x4000008A
-       move.l  #0x3f0001, %d0
+
+       /* CSMR0 */
+       move.l  #0x001f0001, %d0        /* 2 MB, valid */
        move.l  %d0, 0x40000084
+
        jmp     _after_flash_copy.L
 _flash_setup_end:
 #endif

diff --git a/include/configs/r5200.h b/include/configs/r5200.h
index a17b4abb98ef42eb4dbd125709de4462e65b7de8..70497045906f3a3bad8949dacb96ce7f4bd44c9a 100644 (file)
--- a/include/configs/r5200.h
+++ b/include/configs/r5200.h
@@ -37,6 +37,7 @@
  */
 #define CONFIG_MCF52x2                 /* define processor family */
 #define CONFIG_M5271                   /* define processor type */
+#define CONFIG_R5200                   /* define board type */
 
 #define FEC_ENET
 #define CONFIG_NET_RETRY_COUNT 5