ppc4xx: Add 405 support to 4xx NAND driver ndfc.c

This patch adds support for 405 PPC's to the 4xx NAND driver
ndfc.c. This is in preparation for the new AMCC 405EZ.

Signed-off-by: Stefan Roese <sr@denx.de>

diff --git a/cpu/ppc4xx/ndfc.c b/cpu/ppc4xx/ndfc.c
index b198ff46ceb4a6c50141c0084eeee962e24666e6..08dfc3295291cf0c602b3380f98d6c5741849bbd 100644 (file)
--- a/cpu/ppc4xx/ndfc.c
+++ b/cpu/ppc4xx/ndfc.c
@@ -33,12 +33,13 @@
 
 #if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY) && \
        (defined(CONFIG_440EP) || defined(CONFIG_440GR) ||           \
-        defined(CONFIG_440EPX) || defined(CONFIG_440GRX))
+        defined(CONFIG_440EPX) || defined(CONFIG_440GRX) ||         \
+        defined(CONFIG_405EZ))
 
 #include <nand.h>
 #include <linux/mtd/ndfc.h>
 #include <asm/processor.h>
-#include <ppc440.h>
+#include <ppc4xx.h>
 
 static u8 hwctl = 0;
 
@@ -176,8 +177,7 @@ int board_nand_init(struct nand_chip *nand)
        /*
         * Setup EBC (CS0 only right now)
         */
-       mtdcr(ebccfga, xbcfg);
-       mtdcr(ebccfgd, 0xb8400000);
+       mtebc(EBC0_CFG, 0xb8400000);
 
        mtebc(pb0cr, CFG_EBC_PB0CR);
        mtebc(pb0ap, CFG_EBC_PB0AP);