B4860/B4420: Add PLL_NUM define for B4420/B4860 to use SerDes2 Refclks re-configuration

B4860 has two PLL per SerDes whereas B4420 has one PLL per SerDes,
add their defines in arch/powerpc/include/asm/config_mpc85xx.h

Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index 56587aebc0b6d3e454038aff18e70d6eb306c95c..0ec1417a47550ed99ba0f420967812eea55f3d0c 100644 (file)
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -667,6 +667,7 @@
 #ifdef CONFIG_PPC_B4860
 #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4
 #define CONFIG_MAX_CPUS                        4
+#define CONFIG_SYS_FSL_SRDS_NUM_PLLS   2
 #define CONFIG_SYS_FSL_NUM_CC_PLLS     4
 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS  { 1, 4, 4, 4 }
 #define CONFIG_SYS_NUM_FM1_DTSEC       6
@@ -679,6 +680,7 @@
 #define CONFIG_SYS_FSL_SRIO_LIODN
 #else
 #define CONFIG_MAX_CPUS                        2
+#define CONFIG_SYS_FSL_SRDS_NUM_PLLS   1
 #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 2
 #define CONFIG_SYS_FSL_NUM_CC_PLLS     4
 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS  { 1, 4 }