]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
ARM: dts: renesas: Synchronize RZ R8A774B1 RZ/G2N DTs with Linux 6.5.3
authorMarek Vasut <marek.vasut+renesas@mailbox.org>
Sun, 17 Sep 2023 14:13:16 +0000 (16:13 +0200)
committerMarek Vasut <marek.vasut+renesas@mailbox.org>
Sat, 30 Sep 2023 22:08:29 +0000 (00:08 +0200)
Synchronize RZ R8A774B1 RZ/G2N DTs with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
arch/arm/dts/r8a774b1-beacon-rzg2n-kit.dts
arch/arm/dts/r8a774b1-u-boot.dtsi
arch/arm/dts/r8a774b1.dtsi

index 89d708346ba8176dc5799d0c2aed4d081853da2f..8b9df6afffde71cb94fa7b54e5a7c9ee46a03ae9 100644 (file)
        compatible = "beacon,beacon-rzg2n", "renesas,r8a774b1";
 
        aliases {
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               i2c2 = &i2c2;
+               i2c3 = &i2c3;
+               i2c4 = &i2c4;
+               i2c5 = &i2c5;
+               i2c6 = &i2c6;
+               i2c7 = &iic_pmic;
                serial0 = &scif2;
                serial1 = &hscif0;
                serial2 = &hscif1;
        clock-names = "du.0", "du.1", "du.3",
                "dclkin.0", "dclkin.1", "dclkin.3";
 };
-
-/* Reference versaclock instead of audio_clk_a */
-&rcar_sound {
-       clocks = <&cpg CPG_MOD 1005>,
-                <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
-                <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
-                <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
-                <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
-                <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
-                <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
-                <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
-                <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
-                <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
-                <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
-                <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
-                <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
-                <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
-                <&versaclock6_bb 4>, <&audio_clk_b>,
-                <&audio_clk_c>,
-                <&cpg CPG_CORE R8A774B1_CLK_S0D4>;
-};
index 3b34f82160be6ed5a6b745f14fbfba0f11470f49..d4890ebc298ed0863387f9f26b812b12c4be09ad 100644 (file)
@@ -27,7 +27,6 @@
 /delete-node/ &hdmi0;
 /delete-node/ &lvds0;
 /delete-node/ &rcar_sound;
-/delete-node/ &sdhi2;
 /delete-node/ &sound_card;
 /delete-node/ &vin0;
 /delete-node/ &vin1;
index d541b48c7e384dab41ec065af054ddda5021bba3..75776decd2186f7dd586328dbba4cf44a5f538a7 100644 (file)
 
                rcar_sound: sound@ec500000 {
                        /*
-                        * #sound-dai-cells is required
+                        * #sound-dai-cells is required if simple-card
                         *
                         * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
                         * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
                                 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
                                 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
                                 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
-                       /* Map all possible DDR as inbound ranges */
-                       dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
+                       /* Map all possible DDR/IOMMU as inbound ranges */
+                       dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
                        interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
                        clock-names = "pcie", "pcie_bus";
                        power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
                        resets = <&cpg 319>;
+                       iommu-map = <0 &ipmmu_hc 0 1>;
+                       iommu-map-mask = <0>;
                        status = "disabled";
                };
 
                                 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
                                 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
                                 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
-                       /* Map all possible DDR as inbound ranges */
-                       dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
+                       /* Map all possible DDR/IOMMU as inbound ranges */
+                       dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
                        interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
                        clock-names = "pcie", "pcie_bus";
                        power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
                        resets = <&cpg 318>;
+                       iommu-map = <0 &ipmmu_hc 1 1>;
+                       iommu-map-mask = <0>;
                        status = "disabled";
                };