sunxi: Complete i2c support for each supported platform

Sunxi platforms come with at least 3 TWI (I2C) controllers and some platforms
even have up to 5. This adds support for every controller on each supported
platform, which is especially useful when using expansion ports on single-board-
computers.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
index dae60696f945cab323896d6dd499de881ab87f78..f403742d3ad0b73299c768245707c59234edd2f2 100644 (file)
--- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
@@ -94,6 +94,13 @@
 #define SUNXI_TWI0_BASE                        0x01c2ac00
 #define SUNXI_TWI1_BASE                        0x01c2b000
 #define SUNXI_TWI2_BASE                        0x01c2b400
+#ifdef CONFIG_MACH_SUN6I
+#define SUNXI_TWI3_BASE                        0x01c0b800
+#endif
+#ifdef CONFIG_MACH_SUN7I
+#define SUNXI_TWI3_BASE                        0x01c2b800
+#define SUNXI_TWI4_BASE                        0x01c2c000
+#endif
 
 #define SUNXI_CAN_BASE                 0x01c2bc00
 

diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
index f2270449c19882c68bda4051171f235ab91759ba..ae7cbb7e78051c8028a12b530d52599673d2069a 100644 (file)
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -148,7 +148,11 @@ enum sunxi_gpio_number {
 #define SUN6I_GPA_SDC2         5
 #define SUN6I_GPA_SDC3         4
 
-#define SUNXI_GPB_TWI0         2
+#define SUN4I_GPB_TWI0         2
+#define SUN4I_GPB_TWI1         2
+#define SUN5I_GPB_TWI1         2
+#define SUN4I_GPB_TWI2         2
+#define SUN5I_GPB_TWI2         2
 #define SUN4I_GPB_UART0                2
 #define SUN5I_GPB_UART0                2
 
@@ -160,6 +164,7 @@ enum sunxi_gpio_number {
 #define SUNXI_GPD_LVDS0                3
 
 #define SUN5I_GPE_SDC2         3
+#define SUN8I_GPE_TWI2         3
 
 #define SUNXI_GPF_SDC0         2
 #define SUNXI_GPF_UART0                4
@@ -169,12 +174,20 @@ enum sunxi_gpio_number {
 #define SUN5I_GPG_SDC1         2
 #define SUN6I_GPG_SDC1         2
 #define SUN8I_GPG_SDC1         2
+#define SUN6I_GPG_TWI3         2
 #define SUN5I_GPG_UART1                4
 
 #define SUN4I_GPH_SDC1         5
+#define SUN6I_GPH_TWI0         2
+#define SUN8I_GPH_TWI0         2
+#define SUN6I_GPH_TWI1         2
+#define SUN8I_GPH_TWI1         2
+#define SUN6I_GPH_TWI2         2
 #define SUN6I_GPH_UART0                2
 
 #define SUNXI_GPI_SDC3         2
+#define SUN7I_GPI_TWI3         3
+#define SUN7I_GPI_TWI4         3
 
 #define SUN6I_GPL0_R_P2WI_SCK  3
 #define SUN6I_GPL1_R_P2WI_SDA  3

diff --git a/arch/arm/include/asm/arch-sunxi/i2c.h b/arch/arm/include/asm/arch-sunxi/i2c.h
index 502e3c68eafd40d12337fd82e6d195a89b536cdc..561cd2be164d544fb4842a2c66ada4d226c2cad3 100644 (file)
--- a/arch/arm/include/asm/arch-sunxi/i2c.h
+++ b/arch/arm/include/asm/arch-sunxi/i2c.h
@@ -8,7 +8,22 @@
 
 #include <asm/arch/cpu.h>
 
+#ifdef CONFIG_I2C0_ENABLE
 #define CONFIG_I2C_MVTWSI_BASE0        SUNXI_TWI0_BASE
+#endif
+#ifdef CONFIG_I2C1_ENABLE
+#define CONFIG_I2C_MVTWSI_BASE1        SUNXI_TWI1_BASE
+#endif
+#ifdef CONFIG_I2C2_ENABLE
+#define CONFIG_I2C_MVTWSI_BASE2        SUNXI_TWI2_BASE
+#endif
+#ifdef CONFIG_I2C3_ENABLE
+#define CONFIG_I2C_MVTWSI_BASE3        SUNXI_TWI3_BASE
+#endif
+#ifdef CONFIG_I2C4_ENABLE
+#define CONFIG_I2C_MVTWSI_BASE4        SUNXI_TWI4_BASE
+#endif
+
 /* This is abp0-clk on sun4i/5i/7i / abp1-clk on sun6i/sun8i which is 24MHz */
 #define CONFIG_SYS_TCLK                24000000
 

diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index ccc2080d8c244f34e486005ba0c83b724e1a36ff..88e335836d7c48cd4e0333d61989383dff81e7af 100644 (file)
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -269,6 +269,44 @@ config USB2_VBUS_PIN
        ---help---
        See USB1_VBUS_PIN help text.
 
+config I2C0_ENABLE
+       bool "Enable I2C/TWI controller 0"
+       default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
+       default n if MACH_SUN6I || MACH_SUN8I
+       ---help---
+       This allows enabling I2C/TWI controller 0 by muxing its pins, enabling
+       its clock and setting up the bus. This is especially useful on devices
+       with slaves connected to the bus or with pins exposed through e.g. an
+       expansion port/header.
+
+config I2C1_ENABLE
+       bool "Enable I2C/TWI controller 1"
+       default n
+       ---help---
+       See I2C0_ENABLE help text.
+
+config I2C2_ENABLE
+       bool "Enable I2C/TWI controller 2"
+       default n
+       ---help---
+       See I2C0_ENABLE help text.
+
+if MACH_SUN6I || MACH_SUN7I
+config I2C3_ENABLE
+       bool "Enable I2C/TWI controller 3"
+       default n
+       ---help---
+       See I2C0_ENABLE help text.
+endif
+
+if MACH_SUN7I
+config I2C4_ENABLE
+       bool "Enable I2C/TWI controller 4"
+       default n
+       ---help---
+       See I2C0_ENABLE help text.
+endif
+
 config VIDEO
        boolean "Enable graphical uboot console on HDMI, LCD or VGA"
        default y

diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 7633d65e6c988e6f1a00c766500c2db370dbe930..dda50b55a50be5438a182ded6c6d157ee9340c24 100644 (file)
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -276,9 +276,82 @@ int board_mmc_init(bd_t *bis)
 
 void i2c_init_board(void)
 {
-       sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUNXI_GPB_TWI0);
-       sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUNXI_GPB_TWI0);
+#ifdef CONFIG_I2C0_ENABLE
+#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN5I) || defined(CONFIG_MACH_SUN7I)
+       sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN4I_GPB_TWI0);
+       sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN4I_GPB_TWI0);
        clock_twi_onoff(0, 1);
+#elif defined(CONFIG_MACH_SUN6I)
+       sunxi_gpio_set_cfgpin(SUNXI_GPH(14), SUN6I_GPH_TWI0);
+       sunxi_gpio_set_cfgpin(SUNXI_GPH(15), SUN6I_GPH_TWI0);
+       clock_twi_onoff(0, 1);
+#elif defined(CONFIG_MACH_SUN8I)
+       sunxi_gpio_set_cfgpin(SUNXI_GPH(2), SUN8I_GPH_TWI0);
+       sunxi_gpio_set_cfgpin(SUNXI_GPH(3), SUN8I_GPH_TWI0);
+       clock_twi_onoff(0, 1);
+#endif
+#endif
+
+#ifdef CONFIG_I2C1_ENABLE
+#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I)
+       sunxi_gpio_set_cfgpin(SUNXI_GPB(18), SUN4I_GPB_TWI1);
+       sunxi_gpio_set_cfgpin(SUNXI_GPB(19), SUN4I_GPB_TWI1);
+       clock_twi_onoff(1, 1);
+#elif defined(CONFIG_MACH_SUN5I)
+       sunxi_gpio_set_cfgpin(SUNXI_GPB(15), SUN5I_GPB_TWI1);
+       sunxi_gpio_set_cfgpin(SUNXI_GPB(16), SUN5I_GPB_TWI1);
+       clock_twi_onoff(1, 1);
+#elif defined(CONFIG_MACH_SUN6I)
+       sunxi_gpio_set_cfgpin(SUNXI_GPH(16), SUN6I_GPH_TWI1);
+       sunxi_gpio_set_cfgpin(SUNXI_GPH(17), SUN6I_GPH_TWI1);
+       clock_twi_onoff(1, 1);
+#elif defined(CONFIG_MACH_SUN8I)
+       sunxi_gpio_set_cfgpin(SUNXI_GPH(4), SUN8I_GPH_TWI1);
+       sunxi_gpio_set_cfgpin(SUNXI_GPH(5), SUN8I_GPH_TWI1);
+       clock_twi_onoff(1, 1);
+#endif
+#endif
+
+#ifdef CONFIG_I2C2_ENABLE
+#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I)
+       sunxi_gpio_set_cfgpin(SUNXI_GPB(20), SUN4I_GPB_TWI2);
+       sunxi_gpio_set_cfgpin(SUNXI_GPB(21), SUN4I_GPB_TWI2);
+       clock_twi_onoff(2, 1);
+#elif defined(CONFIG_MACH_SUN5I)
+       sunxi_gpio_set_cfgpin(SUNXI_GPB(17), SUN5I_GPB_TWI2);
+       sunxi_gpio_set_cfgpin(SUNXI_GPB(18), SUN5I_GPB_TWI2);
+       clock_twi_onoff(2, 1);
+#elif defined(CONFIG_MACH_SUN6I)
+       sunxi_gpio_set_cfgpin(SUNXI_GPH(18), SUN6I_GPH_TWI2);
+       sunxi_gpio_set_cfgpin(SUNXI_GPH(19), SUN6I_GPH_TWI2);
+       clock_twi_onoff(2, 1);
+#elif defined(CONFIG_MACH_SUN8I)
+       sunxi_gpio_set_cfgpin(SUNXI_GPE(12), SUN8I_GPE_TWI2);
+       sunxi_gpio_set_cfgpin(SUNXI_GPE(13), SUN8I_GPE_TWI2);
+       clock_twi_onoff(2, 1);
+#endif
+#endif
+
+#ifdef CONFIG_I2C3_ENABLE
+#if defined(CONFIG_MACH_SUN6I)
+       sunxi_gpio_set_cfgpin(SUNXI_GPG(10), SUN6I_GPG_TWI3);
+       sunxi_gpio_set_cfgpin(SUNXI_GPG(11), SUN6I_GPG_TWI3);
+       clock_twi_onoff(3, 1);
+#elif defined(CONFIG_MACH_SUN7I)
+       sunxi_gpio_set_cfgpin(SUNXI_GPI(0), SUN7I_GPI_TWI3);
+       sunxi_gpio_set_cfgpin(SUNXI_GPI(1), SUN7I_GPI_TWI3);
+       clock_twi_onoff(3, 1);
+#endif
+#endif
+
+#ifdef CONFIG_I2C4_ENABLE
+#if defined(CONFIG_MACH_SUN7I)
+       sunxi_gpio_set_cfgpin(SUNXI_GPI(2), SUN7I_GPI_TWI4);
+       sunxi_gpio_set_cfgpin(SUNXI_GPI(3), SUN7I_GPI_TWI4);
+       clock_twi_onoff(4, 1);
+#endif
+#endif
+
 #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
        soft_i2c_gpio_sda = sunxi_name_to_gpio(CONFIG_VIDEO_LCD_PANEL_I2C_SDA);
        soft_i2c_gpio_scl = sunxi_name_to_gpio(CONFIG_VIDEO_LCD_PANEL_I2C_SCL);

diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 1f7a1cb1f4f527e2ef856babfc533fe4633a85f7..438272cbda1f70d1a772f62e37f0a8c57d68dbad 100644 (file)
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -196,7 +196,11 @@
 #endif
 
 #define CONFIG_SYS_I2C
+#if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
+    defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
+    defined CONFIG_I2C4_ENABLE
 #define CONFIG_SYS_I2C_MVTWSI
+#endif
 #define CONFIG_SYS_I2C_SPEED           400000
 #define CONFIG_SYS_I2C_SLAVE           0x7f