arm: apple: t602x: Add missing MMIO regions to memmap

The memory maps for Apple's M2 Pro/Max/Ultra left MMIO space out which
was not used by any driver at the time. The display out exposed as
simple-framebuffer use a power-domain controlled by a device in an
unmapped region.
Add a map covering this region as well as another MMIO region in the
range 0x4'0000'0000 - 0x5'0000'0000. The added regions cover all MMIO
annotated in Apple's device tree in this range.

Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Eric Curtin <ecurtin@redhat.com>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>

diff --git a/arch/arm/mach-apple/board.c b/arch/arm/mach-apple/board.c
index 47393babbc62ae7abb5aa0d43b96c855526f4ebc..7a6151a97223cdd5be6401edc97d4f867a356748 100644 (file)
--- a/arch/arm/mach-apple/board.c
+++ b/arch/arm/mach-apple/board.c
@@ -370,6 +370,22 @@ static struct mm_region t6020_mem_map[] = {
                .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
                         PTE_BLOCK_NON_SHARE |
                         PTE_BLOCK_PXN | PTE_BLOCK_UXN
+       }, {
+               /* I/O */
+               .virt = 0x400000000,
+               .phys = 0x400000000,
+               .size = SZ_1G,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+                       PTE_BLOCK_NON_SHARE |
+                       PTE_BLOCK_PXN | PTE_BLOCK_UXN
+       }, {
+               /* I/O */
+               .virt = 0x480000000,
+               .phys = 0x480000000,
+               .size = SZ_1G,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+                       PTE_BLOCK_NON_SHARE |
+                       PTE_BLOCK_PXN | PTE_BLOCK_UXN
        }, {
                /* I/O */
                .virt = 0x580000000,
@@ -471,6 +487,22 @@ static struct mm_region t6022_mem_map[] = {
                .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
                         PTE_BLOCK_NON_SHARE |
                         PTE_BLOCK_PXN | PTE_BLOCK_UXN
+       }, {
+               /* I/O */
+               .virt = 0x400000000,
+               .phys = 0x400000000,
+               .size = SZ_1G,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+                       PTE_BLOCK_NON_SHARE |
+                       PTE_BLOCK_PXN | PTE_BLOCK_UXN
+       }, {
+               /* I/O */
+               .virt = 0x480000000,
+               .phys = 0x480000000,
+               .size = SZ_1G,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+                       PTE_BLOCK_NON_SHARE |
+                       PTE_BLOCK_PXN | PTE_BLOCK_UXN
        }, {
                /* I/O */
                .virt = 0x580000000,
@@ -551,6 +583,22 @@ static struct mm_region t6022_mem_map[] = {
                .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
                         PTE_BLOCK_NON_SHARE |
                         PTE_BLOCK_PXN | PTE_BLOCK_UXN
+       }, {
+               /* I/O */
+               .virt = 0x2400000000,
+               .phys = 0x2400000000,
+               .size = SZ_1G,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+                       PTE_BLOCK_NON_SHARE |
+                       PTE_BLOCK_PXN | PTE_BLOCK_UXN
+       }, {
+               /* I/O */
+               .virt = 0x2480000000,
+               .phys = 0x2480000000,
+               .size = SZ_1G,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+                       PTE_BLOCK_NON_SHARE |
+                       PTE_BLOCK_PXN | PTE_BLOCK_UXN
        }, {
                /* I/O */
                .virt = 0x2580000000,