ARM: dts: rmobile: Extract SDHI nodes on E3 Ebisu

The SDHI nodes are not in Linux 4.17 DTs in E3, pull them into U-Boot
specific DT extras until they hit mainline Linux, to make syncing of
DTs easier.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master

diff --git a/arch/arm/dts/r8a77990-ebisu-u-boot.dts b/arch/arm/dts/r8a77990-ebisu-u-boot.dts
index 8d4ea88a91f7f5acaa9795787d9d1c317f6f4d57..17b749545f7a03054cf7b5d72ed8f9d2722d8805 100644 (file)
--- a/arch/arm/dts/r8a77990-ebisu-u-boot.dts
+++ b/arch/arm/dts/r8a77990-ebisu-u-boot.dts
@@ -7,3 +7,161 @@
 
 #include "r8a77990-ebisu.dts"
 #include "r8a77990-u-boot.dtsi"
+
+/ {
+       reg_1p8v: regulator0 {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-1.8V";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       reg_3p3v: regulator1 {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-3.3V";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       vcc_sdhi0: regulator-vcc-sdhi0 {
+               compatible = "regulator-fixed";
+
+               regulator-name = "SDHI0 Vcc";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+
+               gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
+       vccq_sdhi0: regulator-vccq-sdhi0 {
+               compatible = "regulator-gpio";
+
+               regulator-name = "SDHI0 VccQ";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <3300000>;
+
+               gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
+               gpios-states = <1>;
+               states = <3300000 1
+                         1800000 0>;
+       };
+
+       vcc_sdhi1: regulator-vcc-sdhi1 {
+               compatible = "regulator-fixed";
+
+               regulator-name = "SDHI1 Vcc";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+
+               gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
+       vccq_sdhi1: regulator-vccq-sdhi1 {
+               compatible = "regulator-gpio";
+
+               regulator-name = "SDHI1 VccQ";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <3300000>;
+
+               gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
+               gpios-states = <1>;
+               states = <3300000 1
+                         1800000 0>;
+       };
+};
+
+&pfc {
+       sdhi0_pins: sd0 {
+               groups = "sdhi0_data4", "sdhi0_ctrl";
+               function = "sdhi0";
+               power-source = <3300>;
+       };
+
+       sdhi0_pins_uhs: sd0_uhs {
+               groups = "sdhi0_data4", "sdhi0_ctrl";
+               function = "sdhi0";
+               power-source = <1800>;
+       };
+
+       sdhi1_pins: sd1 {
+               groups = "sdhi1_data4", "sdhi1_ctrl";
+               function = "sdhi1";
+               power-source = <3300>;
+       };
+
+       sdhi1_pins_uhs: sd1_uhs {
+               groups = "sdhi1_data4", "sdhi1_ctrl";
+               function = "sdhi1";
+               power-source = <1800>;
+       };
+
+       sdhi3_pins: sd2 {
+               groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
+               function = "sdhi3";
+               power-source = <1800>;
+       };
+
+       sdhi3_pins_uhs: sd2_uhs {
+               groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
+               function = "sdhi3";
+               power-source = <1800>;
+       };
+};
+
+&sdhi0 {
+       /* full size SD */
+       pinctrl-0 = <&sdhi0_pins>;
+       pinctrl-1 = <&sdhi0_pins_uhs>;
+       pinctrl-names = "default", "state_uhs";
+
+       vmmc-supply = <&vcc_sdhi0>;
+       vqmmc-supply = <&vccq_sdhi0>;
+       cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
+       wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
+       bus-width = <4>;
+       sd-uhs-sdr12;
+       sd-uhs-sdr25;
+       sd-uhs-sdr50;
+       sd-uhs-sdr104;
+       status = "okay";
+       max-frequency = <208000000>;
+};
+
+&sdhi1 {
+       /* microSD */
+       pinctrl-0 = <&sdhi1_pins>;
+       pinctrl-1 = <&sdhi1_pins_uhs>;
+       pinctrl-names = "default", "state_uhs";
+
+       vmmc-supply = <&vcc_sdhi1>;
+       vqmmc-supply = <&vccq_sdhi1>;
+       cd-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>;
+       bus-width = <4>;
+       sd-uhs-sdr12;
+       sd-uhs-sdr25;
+       sd-uhs-sdr50;
+       sd-uhs-sdr104;
+       status = "okay";
+       max-frequency = <208000000>;
+};
+
+&sdhi3 {
+       /* used for on-board 8bit eMMC */
+       pinctrl-0 = <&sdhi3_pins>;
+       pinctrl-1 = <&sdhi3_pins_uhs>;
+       pinctrl-names = "default", "state_uhs";
+
+       vmmc-supply = <&reg_3p3v>;
+       vqmmc-supply = <&reg_1p8v>;
+       bus-width = <8>;
+       mmc-hs200-1_8v;
+       mmc-hs400-1_8v;
+       non-removable;
+       status = "okay";
+};

diff --git a/arch/arm/dts/r8a77990-ebisu.dts b/arch/arm/dts/r8a77990-ebisu.dts
index 0f269d04690bbb2b4273986a1662c36ea2e0f2d8..cea08d7488eceedbadf13c48afeb3d3c4690292a 100644 (file)
--- a/arch/arm/dts/r8a77990-ebisu.dts
+++ b/arch/arm/dts/r8a77990-ebisu.dts
@@ -142,42 +142,6 @@
                function = "scif_clk";
        };
 
-       sdhi0_pins: sd0 {
-               groups = "sdhi0_data4", "sdhi0_ctrl";
-               function = "sdhi0";
-               power-source = <3300>;
-       };
-
-       sdhi0_pins_uhs: sd0_uhs {
-               groups = "sdhi0_data4", "sdhi0_ctrl";
-               function = "sdhi0";
-               power-source = <1800>;
-       };
-
-       sdhi1_pins: sd1 {
-               groups = "sdhi1_data4", "sdhi1_ctrl";
-               function = "sdhi1";
-               power-source = <3300>;
-       };
-
-       sdhi1_pins_uhs: sd1_uhs {
-               groups = "sdhi1_data4", "sdhi1_ctrl";
-               function = "sdhi1";
-               power-source = <1800>;
-       };
-
-       sdhi3_pins: sd2 {
-               groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
-               function = "sdhi3";
-               power-source = <1800>;
-       };
-
-       sdhi3_pins_uhs: sd2_uhs {
-               groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
-               function = "sdhi3";
-               power-source = <1800>;
-       };
-
        usb0_pins: usb0 {
                groups = "usb0";
                function = "usb0";

diff --git a/arch/arm/dts/r8a77990-u-boot.dtsi b/arch/arm/dts/r8a77990-u-boot.dtsi
index 052caa720dc0a602bd98e2d894678cb314e000a1..288e57e4bca0511c6c68df523995d08f86bc5c19 100644 (file)
--- a/arch/arm/dts/r8a77990-u-boot.dtsi
+++ b/arch/arm/dts/r8a77990-u-boot.dtsi
@@ -15,4 +15,28 @@
                bank-width = <2>;
                status = "disabled";
        };
+
+       sdhi0: sd@ee100000 {
+               compatible = "renesas,sdhi-r8a77990";
+               reg = <0 0xee100000 0 0x2000>;
+               clocks = <&cpg CPG_MOD 314>;
+               max-frequency = <200000000>;
+               status = "disabled";
+       };
+
+       sdhi1: sd@ee120000 {
+               compatible = "renesas,sdhi-r8a77990";
+               reg = <0 0xee120000 0 0x2000>;
+               clocks = <&cpg CPG_MOD 313>;
+               max-frequency = <200000000>;
+               status = "disabled";
+       };
+
+       sdhi3: sd@ee160000 {
+               compatible = "renesas,sdhi-r8a77990";
+               reg = <0 0xee160000 0 0x2000>;
+               clocks = <&cpg CPG_MOD 311>;
+               max-frequency = <200000000>;
+               status = "disabled";
+       };
 };

diff --git a/arch/arm/dts/r8a77990.dtsi b/arch/arm/dts/r8a77990.dtsi
index 87625870e633d17aed9b141da9824f96cf83d973..593d35a267918e0418310f8ce8559610d9cadad2 100644 (file)
--- a/arch/arm/dts/r8a77990.dtsi
+++ b/arch/arm/dts/r8a77990.dtsi
@@ -223,30 +223,6 @@
                        reg = <0 0xe6160000 0 0x0200>;
                };
 
-               sdhi0: sd@ee100000 {
-                       compatible = "renesas,sdhi-r8a77990";
-                       reg = <0 0xee100000 0 0x2000>;
-                       clocks = <&cpg CPG_MOD 314>;
-                       max-frequency = <200000000>;
-                       status = "disabled";
-               };
-
-               sdhi1: sd@ee120000 {
-                       compatible = "renesas,sdhi-r8a77990";
-                       reg = <0 0xee120000 0 0x2000>;
-                       clocks = <&cpg CPG_MOD 313>;
-                       max-frequency = <200000000>;
-                       status = "disabled";
-               };
-
-               sdhi3: sd@ee160000 {
-                       compatible = "renesas,sdhi-r8a77990";
-                       reg = <0 0xee160000 0 0x2000>;
-                       clocks = <&cpg CPG_MOD 311>;
-                       max-frequency = <200000000>;
-                       status = "disabled";
-               };
-
                sysc: system-controller@e6180000 {
                        compatible = "renesas,r8a77990-sysc";
                        reg = <0 0xe6180000 0 0x0400>;