85xx: Report which "bank" of NOR flash we are booting from on FSL boards

The p2020DS, MPC8536DS, MPC8572DS, MPC8544DS boards are capable of
swizzling the upper address bits of the NOR flash we boot out of which
creates the concept of "virtual" banks.  This is useful in that we can
flash a test of image of u-boot and reset to one of the virtual banks
while still maintaining a working image in "bank 0".

The PIXIS FPGA exposes registers on LBC which we can use to determine
which "bank" we are booting out of (as well as setting which bank to
boot out of).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c
index 28b27ee8f134056aafc5c14e609c173b12f6e58d..66f095f7a0094be03714c15b50ca3a827b347ce5 100644 (file)
--- a/board/freescale/mpc8536ds/mpc8536ds.c
+++ b/board/freescale/mpc8536ds/mpc8536ds.c
@@ -60,10 +60,41 @@ int board_early_init_f (void)
 
 int checkboard (void)
 {
-       printf ("Board: MPC8536DS, System ID: 0x%02x, "
-               "System Version: 0x%02x, FPGA Version: 0x%02x\n",
-               in8(PIXIS_BASE + PIXIS_ID), in8(PIXIS_BASE + PIXIS_VER),
-               in8(PIXIS_BASE + PIXIS_PVER));
+       u8 vboot;
+       u8 *pixis_base = (u8 *)PIXIS_BASE;
+
+       puts("Board: MPC8536DS ");
+#ifdef CONFIG_PHYS_64BIT
+       puts("(36-bit addrmap) ");
+#endif
+
+       printf ("Sys ID: 0x%02x, "
+               "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
+               in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER),
+               in_8(pixis_base + PIXIS_PVER));
+
+       vboot = in_8(pixis_base + PIXIS_VBOOT);
+       switch ((vboot & PIXIS_VBOOT_LBMAP) >> 5) {
+               case PIXIS_VBOOT_LBMAP_NOR0:
+                       puts ("vBank: 0\n");
+                       break;
+               case PIXIS_VBOOT_LBMAP_NOR1:
+                       puts ("vBank: 1\n");
+                       break;
+               case PIXIS_VBOOT_LBMAP_NOR2:
+                       puts ("vBank: 2\n");
+                       break;
+               case PIXIS_VBOOT_LBMAP_NOR3:
+                       puts ("vBank: 3\n");
+                       break;
+               case PIXIS_VBOOT_LBMAP_PJET:
+                       puts ("Promjet\n");
+                       break;
+               case PIXIS_VBOOT_LBMAP_NAND:
+                       puts ("NAND\n");
+                       break;
+       }
+
        return 0;
 }
 

diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c
index 34bdbade7d0b8e89023f2a96f44f3269a36d16fa..b251e2e587885084f69228ef4ce215b28ede5015 100644 (file)
--- a/board/freescale/mpc8544ds/mpc8544ds.c
+++ b/board/freescale/mpc8544ds/mpc8544ds.c
@@ -43,14 +43,22 @@ int checkboard (void)
        volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
        volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR);
        volatile ccsr_local_ecm_t *ecm = (void *)(CONFIG_SYS_MPC85xx_ECM_ADDR);
+       u8 vboot;
+       u8 *pixis_base = (u8 *)PIXIS_BASE;
 
        if ((uint)&gur->porpllsr != 0xe00e0000) {
                printf("immap size error %lx\n",(ulong)&gur->porpllsr);
        }
-       printf ("Board: MPC8544DS, System ID: 0x%02x, "
-               "System Version: 0x%02x, FPGA Version: 0x%02x\n",
-               in8(PIXIS_BASE + PIXIS_ID), in8(PIXIS_BASE + PIXIS_VER),
-               in8(PIXIS_BASE + PIXIS_PVER));
+       printf ("Board: MPC8544DS, Sys ID: 0x%02x, "
+               "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
+               in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER),
+               in_8(pixis_base + PIXIS_PVER));
+
+       vboot = in_8(pixis_base + PIXIS_VBOOT);
+       if (vboot & PIXIS_VBOOT_FMAP)
+               printf ("vBank: %d\n", ((vboot & PIXIS_VBOOT_FBANK) >> 6));
+       else
+               puts ("Promjet\n");
 
        lbc->ltesr = 0xffffffff;        /* Clear LBC error interrupts */
        lbc->lteir = 0xffffffff;        /* Enable LBC error interrupts */

diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c
index 4b956171fe7f12025471ccfd8d3def088f3f3d66..51231d7a414085951a47c86838d83d0a7c21ea02 100644 (file)
--- a/board/freescale/mpc8572ds/mpc8572ds.c
+++ b/board/freescale/mpc8572ds/mpc8572ds.c
@@ -42,14 +42,34 @@ long int fixed_sdram(void);
 
 int checkboard (void)
 {
+       u8 vboot;
+       u8 *pixis_base = (u8 *)PIXIS_BASE;
+
        puts ("Board: MPC8572DS ");
 #ifdef CONFIG_PHYS_64BIT
        puts ("(36-bit addrmap) ");
 #endif
        printf ("Sys ID: 0x%02x, "
-               "Sys Ver: 0x%02x, FPGA Ver: 0x%02x\n",
-               in8(PIXIS_BASE + PIXIS_ID), in8(PIXIS_BASE + PIXIS_VER),
-               in8(PIXIS_BASE + PIXIS_PVER));
+               "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
+               in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER),
+               in_8(pixis_base + PIXIS_PVER));
+
+       vboot = in_8(pixis_base + PIXIS_VBOOT);
+       switch ((vboot & PIXIS_VBOOT_LBMAP) >> 6) {
+               case PIXIS_VBOOT_LBMAP_NOR0:
+                       puts ("vBank: 0\n");
+                       break;
+               case PIXIS_VBOOT_LBMAP_PJET:
+                       puts ("Promjet\n");
+                       break;
+               case PIXIS_VBOOT_LBMAP_NAND:
+                       puts ("NAND\n");
+                       break;
+               case PIXIS_VBOOT_LBMAP_NOR1:
+                       puts ("vBank: 1\n");
+                       break;
+       }
+
        return 0;
 }
 

diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c
index 293e5a42dc0ee7bde99adfec24075d6f6d11108b..fdd8325544cf3f054034e958b2f718353772cf8d 100644 (file)
--- a/board/freescale/p2020ds/p2020ds.c
+++ b/board/freescale/p2020ds/p2020ds.c
@@ -47,14 +47,31 @@ phys_size_t fixed_sdram(void);
 
 int checkboard(void)
 {
+       u8 sw7;
+       u8 *pixis_base = (u8 *)PIXIS_BASE;
+
        puts("Board: P2020DS ");
 #ifdef CONFIG_PHYS_64BIT
        puts("(36-bit addrmap) ");
 #endif
+
        printf("Sys ID: 0x%02x, "
-               "Sys Ver: 0x%02x, FPGA Ver: 0x%02x\n",
-               in8(PIXIS_BASE + PIXIS_ID), in8(PIXIS_BASE + PIXIS_VER),
-               in8(PIXIS_BASE + PIXIS_PVER));
+               "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
+               in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER),
+               in_8(pixis_base + PIXIS_PVER));
+
+       sw7 = in_8(pixis_base + PIXIS_SW(7));
+       switch ((sw7 & PIXIS_SW7_LBMAP) >> 6) {
+               case 0:
+               case 1:
+                       printf ("vBank: %d\n", ((sw7 & PIXIS_SW7_VBANK) >> 4));
+                       break;
+               case 2:
+               case 3:
+                       puts ("Promjet\n");
+                       break;
+       }
+
        return 0;
 }
 

diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index bd81532c8d5e40e5e275ccec8c4443ef8e4c675d..2cbc6c70a248d6d09f6312ecaba89d68f0595a71 100644 (file)
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -218,6 +218,13 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #define PIXIS_VCFGEN1          0x13    /* VELA Config Enable 1 */
 #define PIXIS_VCORE0           0x14    /* VELA VCORE0 Register */
 #define PIXIS_VBOOT            0x16    /* VELA VBOOT Register */
+#define PIXIS_VBOOT_LBMAP      0xe0    /* VBOOT - CFG_LBMAP */
+#define PIXIS_VBOOT_LBMAP_NOR0 0x00    /* cfg_lbmap - boot from NOR 0 */
+#define PIXIS_VBOOT_LBMAP_NOR1 0x01    /* cfg_lbmap - boot from NOR 1 */
+#define PIXIS_VBOOT_LBMAP_NOR2 0x02    /* cfg_lbmap - boot from NOR 2 */
+#define PIXIS_VBOOT_LBMAP_NOR3 0x03    /* cfg_lbmap - boot from NOR 3 */
+#define PIXIS_VBOOT_LBMAP_PJET 0x04    /* cfg_lbmap - boot from projet */
+#define PIXIS_VBOOT_LBMAP_NAND 0x05    /* cfg_lbmap - boot from NAND */
 #define PIXIS_VSPEED0          0x17    /* VELA VSpeed 0 */
 #define PIXIS_VSPEED1          0x18    /* VELA VSpeed 1 */
 #define PIXIS_VSPEED2          0x19    /* VELA VSpeed 2 */

diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index 8d5cfa117e5e307b50ef2a7cfdaefaa7cc9278fa..2efeb72e632982f4ce2d5b2483090fdc1d3ca52c 100644 (file)
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -192,6 +192,8 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define PIXIS_VCFGEN0          0x12    /* VELA Config Enable 0 */
 #define PIXIS_VCFGEN1          0x13    /* VELA Config Enable 1 */
 #define PIXIS_VBOOT            0x16    /* VELA VBOOT Register */
+#define PIXIS_VBOOT_FMAP       0x80    /* VBOOT - CFG_FLASHMAP */
+#define PIXIS_VBOOT_FBANK      0x40    /* VBOOT - CFG_FLASHBANK */
 #define PIXIS_VSPEED0          0x17    /* VELA VSpeed 0 */
 #define PIXIS_VSPEED1          0x18    /* VELA VSpeed 1 */
 #define PIXIS_VCLKH            0x19    /* VELA VCLKH register */

diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index 83f9ca9014aa6df2c8986ec5072df1aba428af3a..64f5c4b750ecb1de77156ba7910348073d9570ac 100644 (file)
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -237,6 +237,11 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #define PIXIS_VCFGEN1          0x13    /* VELA Config Enable 1 */
 #define PIXIS_VCORE0           0x14    /* VELA VCORE0 Register */
 #define PIXIS_VBOOT            0x16    /* VELA VBOOT Register */
+#define PIXIS_VBOOT_LBMAP      0xc0    /* VBOOT - CFG_LBMAP */
+#define PIXIS_VBOOT_LBMAP_NOR0 0x00    /* cfg_lbmap - boot from NOR 0 */
+#define PIXIS_VBOOT_LBMAP_PJET 0x01    /* cfg_lbmap - boot from projet */
+#define PIXIS_VBOOT_LBMAP_NAND 0x02    /* cfg_lbmap - boot from NAND */
+#define PIXIS_VBOOT_LBMAP_NOR1 0x03    /* cfg_lbmap - boot from NOR 1 */
 #define PIXIS_VSPEED0          0x17    /* VELA VSpeed 0 */
 #define PIXIS_VSPEED1          0x18    /* VELA VSpeed 1 */
 #define PIXIS_VSPEED2          0x19    /* VELA VSpeed 2 */

diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h
index d4b48d04108140aab00cf6d119e88f4e1f074813..5c2c5cb321bd7507ee7b248500f948bb2b183060 100644 (file)
--- a/include/configs/P2020DS.h
+++ b/include/configs/P2020DS.h
@@ -282,6 +282,11 @@ extern unsigned long calculate_board_ddr_clk(unsigned long dummy);
 #define PIXIS_VWATCH           0x24    /* Watchdog Register */
 #define PIXIS_LED              0x25    /* LED Register */
 
+#define PIXIS_SW(x)            0x20 + (x - 1) * 2
+#define PIXIS_EN(x)            0x21 + (x - 1) * 2
+#define PIXIS_SW7_LBMAP                0xc0    /* SW7 - cfg_lbmap */
+#define PIXIS_SW7_VBANK                0x30    /* SW7 - cfg_vbank */
+
 /* old pixis referenced names */
 #define PIXIS_VCLKH            0x19    /* VELA VCLKH register */
 #define PIXIS_VCLKL            0x1A    /* VELA VCLKL register */