]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arm64: zynqmp: Assign TSU clock frequency for KV and KD boards
authorHarini Katakam <harini.katakam@amd.com>
Mon, 10 Jul 2023 12:37:33 +0000 (14:37 +0200)
committerMichal Simek <michal.simek@amd.com>
Fri, 21 Jul 2023 07:00:39 +0000 (09:00 +0200)
Set TSU clock frequency as 250MHz (minimum when running at 1G) on
KV and KD carrier cards to allow PTP functionality.

Signed-off-by: Harini Katakam <harini.katakam@amd.com>
Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/4b758d503ef545e4d25d3930b0eb0793f1c415d2.1688992653.git.michal.simek@amd.com
arch/arm/dts/zynqmp-sck-kv-g-revA.dts
arch/arm/dts/zynqmp-sck-kv-g-revB.dts

index 8229244d241a5200bb0697e758bfba3e78f65bd6..a81b3f6f51ad85c6b831c240f55c09de82276604 100644 (file)
        pinctrl-0 = <&pinctrl_gem3_default>;
        phy-handle = <&phy0>;
        phy-mode = "rgmii-id";
+       assigned-clock-rates = <250000000>;
 
        mdio: mdio {
                #address-cells = <1>;
index 96a51219f4256c650ea8ac20c50b59d270e1d634..0ac20869b37db1d0a0ccfc710f23f9bd394c6d65 100644 (file)
        pinctrl-0 = <&pinctrl_gem3_default>;
        phy-handle = <&phy0>;
        phy-mode = "rgmii-id";
+       assigned-clock-rates = <250000000>;
 
        mdio: mdio {
                #address-cells = <1>;