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i.MX28: Enable additional DRAM address bits
authorMarek Vasut <marex@denx.de>
Sun, 26 Feb 2012 12:15:04 +0000 (12:15 +0000)
committerStefano Babic <sbabic@denx.de>
Tue, 27 Mar 2012 07:41:15 +0000 (09:41 +0200)
Enables all fourteen address lines for DRAM

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Tested-by: Marek Vasut <marek.vasut@gmail.com>
arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c patch | blob | history

diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
index 0b1c10917760798428598584f860167d9daac744..43a90ffc0d62e0d4dd5e63f188fd862d6ecd6b32 100644 (file)
--- a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
@@ -39,7 +39,7 @@ uint32_t dram_vals[] = {
        0x00000000, 0x00000100, 0x00000000, 0x00000000,
        0x00000000, 0x00000000, 0x00000000, 0x00000000,
        0x00000000, 0x00000000, 0x00010101, 0x01010101,
-       0x000f0f01, 0x0f02020a, 0x00000000, 0x00010101,
+       0x000f0f01, 0x0f02010a, 0x00000000, 0x00010101,
        0x00000100, 0x00000100, 0x00000000, 0x00000002,
        0x01010000, 0x05060302, 0x06005003, 0x0a0000c8,
        0x02009c40, 0x0000030c, 0x0036a609, 0x031a0612,
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