* Patch by Martin Krause, 27 May 2004:

  Fix a MPC5xxx I2C timing issue in i2c_probe().

* Patch by Leif Lindholm, 27 May 2004:
  Fix board_init_f() for dbau1x00 board.

diff --git a/CHANGELOG b/CHANGELOG
index 21dddf13b10c8fb5ab3d5de14b54f479c3722ce4..c0fcb96c1855ad7ae8a82edc910bd5a1eac603b4 100644 (file)
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,12 @@
 Changes since U-Boot 1.1.1:
 ======================================================================
 
+* Patch by Martin Krause, 27 May 2004:
+  Fix a MPC5xxx I2C timing issue in i2c_probe().
+
+* Patch by Leif Lindholm, 27 May 2004:
+  Fix board_init_f() for dbau1x00 board.
+
 * Patch by Imre Deak, 26 May 2004:
   On OMAP1610 platforms check if booting from RAM(CS0) or flash(CS3).
   Set flash base accordingly, and decide whether to do or skip board

diff --git a/board/dbau1x00/dbau1x00.c b/board/dbau1x00/dbau1x00.c
index 315e412605c8bcc10560149b40ac46b0d54a83bd..df1c15c292d2b9549e30ad1a38b66a126a51758c 100644 (file)
--- a/board/dbau1x00/dbau1x00.c
+++ b/board/dbau1x00/dbau1x00.c
@@ -104,17 +104,17 @@ int checkboard (void)
                      CFG_PCMCIA_ATTR_BASE, /* Hi */
                      0x3D000017,           /* Lo0 */
                      0x3D200017);          /* Lo1 */
-#endif
+#endif /* 0 */
        write_one_tlb(22,                   /* index */
                      0x01ffe000,           /* Pagemask, 16 MB pages */
                      CFG_PCMCIA_MEM_ADDR,  /* Hi */
                      0x3E000017,           /* Lo0 */
                      0x3E200017);          /* Lo1 */
+#endif /* CONFIG_IDE_PCMCIA */
 
        /* Release reset of ethernet PHY chips */
        /* Always do this, because linux does not know about it */
        *phy = 3;
 
        return 0;
-#endif
 }

diff --git a/cpu/mpc5xxx/i2c.c b/cpu/mpc5xxx/i2c.c
index 75c7739d6b9106d78686fd54bb7de53fd186dc30..845f7c05eff51356eed4777e3fe68b6a6bc26f63 100644 (file)
--- a/cpu/mpc5xxx/i2c.c
+++ b/cpu/mpc5xxx/i2c.c
@@ -285,6 +285,7 @@ int i2c_probe(uchar chip)
 
                if (! do_address(chip, 0)) {
                        mpc_reg_out(&regs->mcr, 0, I2C_STA);
+                       udelay(500);
                        break;
                }