clk: renesas: Synchronize R8A77990 E3 clock tables with Linux 6.1.7

Synchronize R-Car R8A77990 E3 clock tables with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>

diff --git a/drivers/clk/renesas/r8a77990-cpg-mssr.c b/drivers/clk/renesas/r8a77990-cpg-mssr.c
index 67a1f586e2ae7e25a487ac4d1c0a9da454701377..4d9b78ebab8d780953a28e43404195b658f75130 100644 (file)
--- a/drivers/clk/renesas/r8a77990-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77990-cpg-mssr.c
@@ -2,7 +2,7 @@
 /*
  * r8a77990 Clock Pulse Generator / Module Standby and Software Reset
  *
- * Copyright (C) 2018 Renesas Electronics Corp.
+ * Copyright (C) 2018-2019 Renesas Electronics Corp.
  *
  * Based on r8a7795-cpg-mssr.c
  *
@@ -77,11 +77,6 @@ static const struct cpg_core_clk r8a77990_core_clks[] = {
 
        DEF_FIXED_RPCSRC_E3(".rpcsrc", CLK_RPCSRC, CLK_PLL0, CLK_PLL1),
 
-       DEF_BASE("rpc",         R8A77990_CLK_RPC, CLK_TYPE_GEN3_RPC,
-                CLK_RPCSRC),
-       DEF_BASE("rpcd2",       R8A77990_CLK_RPCD2, CLK_TYPE_GEN3_RPCD2,
-                R8A77990_CLK_RPC),
-
        DEF_DIV6_RO(".r",      CLK_RINT,           CLK_EXTAL, CPG_RCKCR, 32),
 
        DEF_RATE(".oco",       CLK_OCO,            8 * 1000 * 1000),
@@ -108,9 +103,15 @@ static const struct cpg_core_clk r8a77990_core_clks[] = {
        DEF_FIXED("s3d2",      R8A77990_CLK_S3D2,  CLK_S3,         2, 1),
        DEF_FIXED("s3d4",      R8A77990_CLK_S3D4,  CLK_S3,         4, 1),
 
-       DEF_GEN3_SD("sd0",     R8A77990_CLK_SD0,   CLK_SDSRC,     0x0074),
-       DEF_GEN3_SD("sd1",     R8A77990_CLK_SD1,   CLK_SDSRC,     0x0078),
-       DEF_GEN3_SD("sd3",     R8A77990_CLK_SD3,   CLK_SDSRC,     0x026c),
+       DEF_GEN3_SDH("sd0h",   R8A77990_CLK_SD0H,  CLK_SDSRC,         0x0074),
+       DEF_GEN3_SDH("sd1h",   R8A77990_CLK_SD1H,  CLK_SDSRC,         0x0078),
+       DEF_GEN3_SDH("sd3h",   R8A77990_CLK_SD3H,  CLK_SDSRC,         0x026c),
+       DEF_GEN3_SD("sd0",     R8A77990_CLK_SD0,   R8A77990_CLK_SD0H, 0x0074),
+       DEF_GEN3_SD("sd1",     R8A77990_CLK_SD1,   R8A77990_CLK_SD1H, 0x0078),
+       DEF_GEN3_SD("sd3",     R8A77990_CLK_SD3,   R8A77990_CLK_SD3H, 0x026c),
+
+       DEF_BASE("rpc",        R8A77990_CLK_RPC,   CLK_TYPE_GEN3_RPC,   CLK_RPCSRC),
+       DEF_BASE("rpcd2",      R8A77990_CLK_RPCD2, CLK_TYPE_GEN3_RPCD2, R8A77990_CLK_RPC),
 
        DEF_FIXED("cl",        R8A77990_CLK_CL,    CLK_PLL1,      48, 1),
        DEF_FIXED("cr",        R8A77990_CLK_CR,    CLK_PLL1D2,     2, 1),
@@ -205,6 +206,7 @@ static const struct mssr_mod_clk r8a77990_mod_clks[] = {
        DEF_MOD("du0",                   724,   R8A77990_CLK_S1D1),
        DEF_MOD("lvds",                  727,   R8A77990_CLK_S2D1),
 
+       DEF_MOD("mlp",                   802,   R8A77990_CLK_S2D1),
        DEF_MOD("vin5",                  806,   R8A77990_CLK_S1D2),
        DEF_MOD("vin4",                  807,   R8A77990_CLK_S1D2),
        DEF_MOD("etheravb",              812,   R8A77990_CLK_S3D2),
@@ -219,7 +221,7 @@ static const struct mssr_mod_clk r8a77990_mod_clks[] = {
        DEF_MOD("can-fd",                914,   R8A77990_CLK_S3D2),
        DEF_MOD("can-if1",               915,   R8A77990_CLK_S3D4),
        DEF_MOD("can-if0",               916,   R8A77990_CLK_S3D4),
-       DEF_MOD("rpc",                   917,   R8A77990_CLK_RPC),
+       DEF_MOD("rpc-if",                917,   R8A77990_CLK_RPCD2),
        DEF_MOD("i2c6",                  918,   R8A77990_CLK_S3D2),
        DEF_MOD("i2c5",                  919,   R8A77990_CLK_S3D2),
        DEF_MOD("i2c-dvfs",              926,   R8A77990_CLK_CP),
@@ -241,6 +243,7 @@ static const struct mssr_mod_clk r8a77990_mod_clks[] = {
        DEF_MOD("ssi2",                 1013,   MOD_CLK_ID(1005)),
        DEF_MOD("ssi1",                 1014,   MOD_CLK_ID(1005)),
        DEF_MOD("ssi0",                 1015,   MOD_CLK_ID(1005)),
+       DEF_MOD("dab",                  1016,   R8A77990_CLK_S3D1),
        DEF_MOD("scu-all",              1017,   R8A77990_CLK_S3D4),
        DEF_MOD("scu-dvc1",             1018,   MOD_CLK_ID(1017)),
        DEF_MOD("scu-dvc0",             1019,   MOD_CLK_ID(1017)),