powerpc/8xxx: share PIC defines among 85xx and 86xx

fixes breakeage introduced by commit
a37c36f4e70bada297f281b0e542539ad43e50f6 "powerpc/8xxx: query
feature reporting register for num cores on unknown cpus"

Reported-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index f15d43c38c79c723ac6c97c13cd0214d9f6a7514..3f80700711de39105a63b7b6e8a92307e890706f 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -74,7 +74,7 @@ int checkcpu (void)
                puts("Unicore software on multiprocessor system!!\n"
                     "To enable mutlticore build define CONFIG_MP\n");
 #endif
-               volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC85xx_PIC_ADDR);
+               volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC8xxx_PIC_ADDR);
                printf("CPU%d:  ", pic->whoami);
        } else {
                puts("CPU:   ");

diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 2c3be6dd09048b652a9d36be7bbe9c6bab72874c..27236a0bad5082c943cb16df870dc54d94348520 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -179,7 +179,7 @@ static void corenet_tb_init(void)
        volatile ccsr_rcpm_t *rcpm =
                (void *)(CONFIG_SYS_FSL_CORENET_RCPM_ADDR);
        volatile ccsr_pic_t *pic =
-               (void *)(CONFIG_SYS_MPC85xx_PIC_ADDR);
+               (void *)(CONFIG_SYS_MPC8xxx_PIC_ADDR);
        u32 whoami = in_be32(&pic->whoami);
 
        /* Enable the timebase register for this core */

diff --git a/arch/powerpc/cpu/mpc85xx/interrupts.c b/arch/powerpc/cpu/mpc85xx/interrupts.c
index ac8c01ac15826e3da2268e26053b7cc78b3ea33f..a62b031774835061aa30054705e027fd6dde5fe0 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/interrupts.c
+++ b/arch/powerpc/cpu/mpc85xx/interrupts.c
@@ -35,7 +35,7 @@
 
 int interrupt_init_cpu(unsigned int *decrementer_count)
 {
-       ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC85xx_PIC_ADDR;
+       ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC8xxx_PIC_ADDR;
 
        out_be32(&pic->gcr, MPC85xx_PICGCR_RST);
        while (in_be32(&pic->gcr) & MPC85xx_PICGCR_RST)

diff --git a/arch/powerpc/cpu/mpc85xx/mp.c b/arch/powerpc/cpu/mpc85xx/mp.c
index e05257cf04abd8bba157db911c950df2568e7a20..603baef1bd493645ee62a0617fa83c8296acd61e 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/mp.c
+++ b/arch/powerpc/cpu/mpc85xx/mp.c
@@ -38,7 +38,7 @@ u32 get_my_id()
 
 int cpu_reset(int nr)
 {
-       volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC85xx_PIC_ADDR);
+       volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC8xxx_PIC_ADDR);
        out_be32(&pic->pir, 1 << nr);
        /* the dummy read works around an errata on early 85xx MP PICs */
        (void)in_be32(&pic->pir);
@@ -207,7 +207,7 @@ static void plat_mp_up(unsigned long bootpg)
        gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
        ccm = (void *)(CONFIG_SYS_FSL_CORENET_CCM_ADDR);
        rcpm = (void *)(CONFIG_SYS_FSL_CORENET_RCPM_ADDR);
-       pic = (void *)(CONFIG_SYS_MPC85xx_PIC_ADDR);
+       pic = (void *)(CONFIG_SYS_MPC8xxx_PIC_ADDR);
 
        nr_cpus = ((in_be32(&pic->frr) >> 8) & 0xff) + 1;
 
@@ -272,7 +272,7 @@ static void plat_mp_up(unsigned long bootpg)
        volatile u32 bpcr;
        volatile ccsr_local_ecm_t *ecm = (void *)(CONFIG_SYS_MPC85xx_ECM_ADDR);
        volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
-       volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC85xx_PIC_ADDR);
+       volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC8xxx_PIC_ADDR);
        u32 devdisr;
        int timeout = 10;
 

diff --git a/arch/powerpc/cpu/mpc85xx/traps.c b/arch/powerpc/cpu/mpc85xx/traps.c
index 7e96664333b06d8e9d3519bceb3b72db6d35b0c6..78007177a1d6ef56e708ec14efbf3064f0ec33f6 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/traps.c
+++ b/arch/powerpc/cpu/mpc85xx/traps.c
@@ -288,7 +288,7 @@ UnknownException(struct pt_regs *regs)
 void
 ExtIntException(struct pt_regs *regs)
 {
-       volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC85xx_PIC_ADDR);
+       volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC8xxx_PIC_ADDR);
 
        uint vect;
 

diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c
index 97a94f4cd0152739771eeb80e66c15b6ed717d65..5b30fbdc96db42b9627373224d6699ee113dbaaa 100644 (file)
--- a/arch/powerpc/cpu/mpc8xxx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xxx/cpu.c
@@ -110,13 +110,15 @@ struct cpu_type *identify_cpu(u32 ver)
 }
 
 int cpu_numcores() {
-       ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC85xx_PIC_ADDR;
+       ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC8xxx_PIC_ADDR;
        struct cpu_type *cpu = gd->cpu;
 
        /* better to query feature reporting register than just assume 1 */
+#define MPC8xxx_PICFRR_NCPU_MASK 0x00001f00
+#define MPC8xxx_PICFRR_NCPU_SHIFT 8
        if (cpu == &cpu_type_unknown)
-               return ((in_be32(&pic->frr) & MPC85xx_PICFRR_NCPU_MASK) >>
-                       MPC85xx_PICFRR_NCPU_SHIFT) + 1;
+               return ((in_be32(&pic->frr) & MPC8xxx_PICFRR_NCPU_MASK) >>
+                       MPC8xxx_PICFRR_NCPU_SHIFT) + 1;
 
        return cpu->num_cores;
 }

diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index c1382c8c5e31e567aaf175dbb4f053cf23f41cfe..e5a02c38f2a18fb8e2131d2c812ad044e352026f 100644 (file)
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -760,8 +760,6 @@ typedef struct ccsr_pic {
        u32     eoi;            /* End Of IRQ */
        u8      res9[3916];
        u32     frr;            /* Feature Reporting */
-#define MPC85xx_PICFRR_NCPU_MASK       0x00001f00
-#define MPC85xx_PICFRR_NCPU_SHIFT      8
        u8      res10[28];
        u32     gcr;            /* Global Configuration */
 #define MPC85xx_PICGCR_RST     0x80000000
@@ -2301,7 +2299,7 @@ typedef struct ccsr_pme {
        (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_DMA_OFFSET)
 #define CONFIG_SYS_MPC85xx_ESDHC_ADDR \
        (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_ESDHC_OFFSET)
-#define CONFIG_SYS_MPC85xx_PIC_ADDR \
+#define CONFIG_SYS_MPC8xxx_PIC_ADDR \
        (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PIC_OFFSET)
 #define CONFIG_SYS_MPC85xx_CPM_ADDR \
        (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_CPM_OFFSET)

diff --git a/arch/powerpc/include/asm/immap_86xx.h b/arch/powerpc/include/asm/immap_86xx.h
index 4bebb685658363139cd7248f1939d2d9322f9926..4e60cbb7a8c83137a95da4606e5d7b1345230cec 100644 (file)
--- a/arch/powerpc/include/asm/immap_86xx.h
+++ b/arch/powerpc/include/asm/immap_86xx.h
@@ -1250,12 +1250,15 @@ typedef struct immap {
 
 extern immap_t  *immr;
 
-#define CONFIG_SYS_MPC86xx_DDR_OFFSET  (0x2000)
+#define CONFIG_SYS_MPC86xx_DDR_OFFSET  0x2000
 #define CONFIG_SYS_MPC86xx_DDR_ADDR    (CONFIG_SYS_IMMR + CONFIG_SYS_MPC86xx_DDR_OFFSET)
-#define CONFIG_SYS_MPC86xx_DDR2_OFFSET (0x6000)
+#define CONFIG_SYS_MPC86xx_DDR2_OFFSET 0x6000
 #define CONFIG_SYS_MPC86xx_DDR2_ADDR   (CONFIG_SYS_IMMR + CONFIG_SYS_MPC86xx_DDR2_OFFSET)
-#define CONFIG_SYS_MPC86xx_DMA_OFFSET  (0x21000)
+#define CONFIG_SYS_MPC86xx_DMA_OFFSET  0x21000
 #define CONFIG_SYS_MPC86xx_DMA_ADDR    (CONFIG_SYS_IMMR + CONFIG_SYS_MPC86xx_DMA_OFFSET)
+#define CONFIG_SYS_MPC86xx_PIC_OFFSET  0x40000
+#define CONFIG_SYS_MPC8xxx_PIC_ADDR    (CONFIG_SYS_IMMR + CONFIG_SYS_MPC86xx_PIC_OFFSET)
+
 
 #define CONFIG_SYS_MPC86xx_PCI1_OFFSET         0x8000
 #ifdef CONFIG_MPC8610