Make use of OF_UPSTREAM which uses Linux dts.
Signed-off-by: david regan <dregan@broadcom.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Anand Gore <anand.gore@broadcom.com>
+++ /dev/null
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2022 Broadcom Ltd.
- */
-
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-
-/ {
- compatible = "brcm,bcm47622", "brcm,bcmbca";
- #address-cells = <1>;
- #size-cells = <1>;
-
- interrupt-parent = <&gic>;
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- CA7_0: cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a7";
- reg = <0x0>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- CA7_1: cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a7";
- reg = <0x1>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
- CA7_2: cpu@2 {
- device_type = "cpu";
- compatible = "arm,cortex-a7";
- reg = <0x2>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
- CA7_3: cpu@3 {
- device_type = "cpu";
- compatible = "arm,cortex-a7";
- reg = <0x3>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
- L2_0: l2-cache0 {
- compatible = "cache";
- };
- };
-
- timer {
- compatible = "arm,armv7-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
- arm,cpu-registers-not-fw-configured;
- };
-
- pmu: pmu {
- compatible = "arm,cortex-a7-pmu";
- interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-affinity = <&CA7_0>, <&CA7_1>,
- <&CA7_2>, <&CA7_3>;
- };
-
- clocks: clocks {
- periph_clk: periph-clk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <200000000>;
- };
- uart_clk: uart-clk {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clocks = <&periph_clk>;
- clock-div = <4>;
- clock-mult = <1>;
- };
- };
-
- psci {
- compatible = "arm,psci-0.2";
- method = "smc";
- cpu_off = <1>;
- cpu_on = <2>;
- };
-
- axi@81000000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0x81000000 0x818000>;
-
- gic: interrupt-controller@1000 {
- compatible = "arm,cortex-a7-gic";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0x1000 0x1000>,
- <0x2000 0x2000>;
- };
- };
-
- bus@ff800000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0xff800000 0x800000>;
-
- uart0: serial@12000 {
- compatible = "arm,pl011", "arm,primecell";
- reg = <0x12000 0x1000>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&uart_clk>, <&uart_clk>;
- clock-names = "uartclk", "apb_pclk";
- status = "disabled";
- };
- };
-};
+++ /dev/null
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2022 Broadcom Ltd.
- */
-
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-
-/ {
- compatible = "brcm,bcm4912", "brcm,bcmbca";
- #address-cells = <2>;
- #size-cells = <2>;
-
- interrupt-parent = <&gic>;
-
- cpus {
- #address-cells = <2>;
- #size-cells = <0>;
-
- B53_0: cpu@0 {
- compatible = "brcm,brahma-b53";
- device_type = "cpu";
- reg = <0x0 0x0>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- B53_1: cpu@1 {
- compatible = "brcm,brahma-b53";
- device_type = "cpu";
- reg = <0x0 0x1>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- B53_2: cpu@2 {
- compatible = "brcm,brahma-b53";
- device_type = "cpu";
- reg = <0x0 0x2>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- B53_3: cpu@3 {
- compatible = "brcm,brahma-b53";
- device_type = "cpu";
- reg = <0x0 0x3>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- L2_0: l2-cache0 {
- compatible = "cache";
- };
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
- };
-
- pmu: pmu {
- compatible = "arm,cortex-a53-pmu";
- interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-affinity = <&B53_0>, <&B53_1>,
- <&B53_2>, <&B53_3>;
- };
-
- clocks: clocks {
- periph_clk: periph-clk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <200000000>;
- };
- uart_clk: uart-clk {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clocks = <&periph_clk>;
- clock-div = <4>;
- clock-mult = <1>;
- };
- };
-
- psci {
- compatible = "arm,psci-0.2";
- method = "smc";
- };
-
- axi@81000000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x0 0x81000000 0x8000>;
-
- gic: interrupt-controller@1000 {
- compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- interrupt-controller;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
- reg = <0x1000 0x1000>,
- <0x2000 0x2000>,
- <0x4000 0x2000>,
- <0x6000 0x2000>;
- };
- };
-
- bus@ff800000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x0 0xff800000 0x800000>;
-
- uart0: serial@12000 {
- compatible = "arm,pl011", "arm,primecell";
- reg = <0x12000 0x1000>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&uart_clk>, <&uart_clk>;
- clock-names = "uartclk", "apb_pclk";
- status = "disabled";
- };
- };
-};
+++ /dev/null
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2022 Broadcom Ltd.
- */
-
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-
-/ {
- compatible = "brcm,bcm63146", "brcm,bcmbca";
- #address-cells = <2>;
- #size-cells = <2>;
-
- interrupt-parent = <&gic>;
-
- cpus {
- #address-cells = <2>;
- #size-cells = <0>;
-
- B53_0: cpu@0 {
- compatible = "brcm,brahma-b53";
- device_type = "cpu";
- reg = <0x0 0x0>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- B53_1: cpu@1 {
- compatible = "brcm,brahma-b53";
- device_type = "cpu";
- reg = <0x0 0x1>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- L2_0: l2-cache0 {
- compatible = "cache";
- };
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
- };
-
- pmu: pmu {
- compatible = "arm,cortex-a53-pmu";
- interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-affinity = <&B53_0>, <&B53_1>;
- };
-
- clocks: clocks {
- periph_clk: periph-clk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <200000000>;
- };
- uart_clk: uart-clk {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clocks = <&periph_clk>;
- clock-div = <4>;
- clock-mult = <1>;
- };
- };
-
- psci {
- compatible = "arm,psci-0.2";
- method = "smc";
- };
-
- axi@81000000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x0 0x81000000 0x8000>;
-
- gic: interrupt-controller@1000 {
- compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- interrupt-controller;
- reg = <0x1000 0x1000>,
- <0x2000 0x2000>,
- <0x4000 0x2000>,
- <0x6000 0x2000>;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
- IRQ_TYPE_LEVEL_HIGH)>;
- };
- };
-
- bus@ff800000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x0 0xff800000 0x800000>;
-
- uart0: serial@12000 {
- compatible = "arm,pl011", "arm,primecell";
- reg = <0x12000 0x1000>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&uart_clk>, <&uart_clk>;
- clock-names = "uartclk", "apb_pclk";
- status = "disabled";
- };
- };
-};
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2019 Philippe Reynes <philippe.reynes@softathome.com>
- * Copyright 2022 Broadcom Ltd.
- */
-
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-
-/ {
- compatible = "brcm,bcm63158", "brcm,bcmbca";
- #address-cells = <2>;
- #size-cells = <2>;
-
- interrupt-parent = <&gic>;
-
- cpus {
- #address-cells = <2>;
- #size-cells = <0>;
-
- B53_0: cpu@0 {
- compatible = "brcm,brahma-b53";
- device_type = "cpu";
- reg = <0x0 0x0>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- B53_1: cpu@1 {
- compatible = "brcm,brahma-b53";
- device_type = "cpu";
- reg = <0x0 0x1>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- B53_2: cpu@2 {
- compatible = "brcm,brahma-b53";
- device_type = "cpu";
- reg = <0x0 0x2>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- B53_3: cpu@3 {
- compatible = "brcm,brahma-b53";
- device_type = "cpu";
- reg = <0x0 0x3>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- L2_0: l2-cache0 {
- compatible = "cache";
- };
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
- };
-
- pmu: pmu {
- compatible = "arm,cortex-a53-pmu";
- interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-affinity = <&B53_0>, <&B53_1>,
- <&B53_2>, <&B53_3>;
- };
-
- clocks {
- bootph-all;
- periph_clk: periph-clk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <200000000>;
- };
-
- hsspi_pll: hsspi-pll {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clocks = <&periph_clk>;
- clock-mult = <2>;
- clock-div = <1>;
- };
-
- uart_clk: uart-clk {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clocks = <&periph_clk>;
- clock-div = <4>;
- clock-mult = <1>;
- };
-
- wdt_clk: wdt-clk {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clocks = <&periph_clk>;
- clock-div = <4>;
- clock-mult = <1>;
- };
- };
-
- psci {
- compatible = "arm,psci-0.2";
- method = "smc";
- };
-
- axi@81000000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x0 0x81000000 0x8000>;
-
- gic: interrupt-controller@1000 {
- compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- interrupt-controller;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
- reg = <0x1000 0x1000>,
- <0x2000 0x2000>,
- <0x4000 0x2000>,
- <0x6000 0x2000>;
- };
- };
-
- bus@ff800000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x0 0xff800000 0x800000>;
- bootph-all;
-
- uart0: serial@12000 {
- compatible = "arm,pl011", "arm,primecell";
- reg = <0x12000 0x1000>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&uart_clk>, <&uart_clk>;
- clock-names = "uartclk", "apb_pclk";
- status = "disabled";
- };
-
- leds: led-controller@800 {
- compatible = "brcm,bcm6858-leds";
- reg = <0x800 0xe4>;
-
- status = "disabled";
- };
-
- wdt1: watchdog@480 {
- compatible = "brcm,bcm6345-wdt";
- reg = <0x480 0x14>;
- clocks = <&wdt_clk>;
- };
-
- wdt2: watchdog@4c0 {
- compatible = "brcm,bcm6345-wdt";
- reg = <0x4c0 0x14>;
- clocks = <&wdt_clk>;
- };
-
- wdt-reboot {
- compatible = "wdt-reboot";
- wdt = <&wdt1>;
- };
-
- gpio0: gpio-controller@500 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x500 0x4>,
- <0x520 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio1: gpio-controller@504 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x504 0x4>,
- <0x524 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio2: gpio-controller@508 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x508 0x4>,
- <0x528 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio3: gpio-controller@50c {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x50c 0x4>,
- <0x52c 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio4: gpio-controller@510 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x510 0x4>,
- <0x530 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio5: gpio-controller@514 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x514 0x4>,
- <0x534 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio6: gpio-controller@518 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x518 0x4>,
- <0x538 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio7: gpio-controller@51c {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x51c 0x4>,
- <0x53c 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- hsspi: spi-controller@1000 {
- compatible = "brcm,bcm6328-hsspi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x1000 0x600>;
- clocks = <&hsspi_pll>, <&hsspi_pll>;
- clock-names = "hsspi", "pll";
- spi-max-frequency = <100000000>;
- num-cs = <8>;
-
- status = "disabled";
- };
-
- nand: nand-controller@1800 {
- compatible = "brcm,nand-bcm63158",
- "brcm,brcmnand-v5.0",
- "brcm,brcmnand";
- reg-names = "nand", "nand-int-base", "nand-cache";
- reg = <0x1800 0x180>,
- <0x2000 0x10>,
- <0x1c00 0x200>;
- parameter-page-big-endian = <0>;
-
- status = "disabled";
- };
- };
-};
+++ /dev/null
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2022 Broadcom Ltd.
- */
-
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-
-/ {
- compatible = "brcm,bcm63178", "brcm,bcmbca";
- #address-cells = <1>;
- #size-cells = <1>;
-
- interrupt-parent = <&gic>;
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- CA7_0: cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a7";
- reg = <0x0>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- CA7_1: cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a7";
- reg = <0x1>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- CA7_2: cpu@2 {
- device_type = "cpu";
- compatible = "arm,cortex-a7";
- reg = <0x2>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- L2_0: l2-cache0 {
- compatible = "cache";
- };
- };
-
- timer {
- compatible = "arm,armv7-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(3) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(3) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(3) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(3) | IRQ_TYPE_LEVEL_LOW)>;
- arm,cpu-registers-not-fw-configured;
- };
-
- pmu: pmu {
- compatible = "arm,cortex-a7-pmu";
- interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-affinity = <&CA7_0>, <&CA7_1>,
- <&CA7_2>;
- };
-
- clocks: clocks {
- periph_clk: periph-clk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <200000000>;
- };
- uart_clk: uart-clk {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clocks = <&periph_clk>;
- clock-div = <4>;
- clock-mult = <1>;
- };
- };
-
- psci {
- compatible = "arm,psci-0.2";
- method = "smc";
- };
-
- axi@81000000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0x81000000 0x8000>;
-
- gic: interrupt-controller@1000 {
- compatible = "arm,cortex-a7-gic";
- #interrupt-cells = <3>;
- interrupt-controller;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(3) | IRQ_TYPE_LEVEL_HIGH)>;
- reg = <0x1000 0x1000>,
- <0x2000 0x2000>,
- <0x4000 0x2000>,
- <0x6000 0x2000>;
- };
- };
-
- bus@ff800000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0xff800000 0x800000>;
-
- uart0: serial@12000 {
- compatible = "arm,pl011", "arm,primecell";
- reg = <0x12000 0x1000>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&uart_clk>, <&uart_clk>;
- clock-names = "uartclk", "apb_pclk";
- status = "disabled";
- };
- };
-};
+++ /dev/null
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2022 Broadcom Ltd.
- */
-
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-
-/ {
- compatible = "brcm,bcm6756", "brcm,bcmbca";
- #address-cells = <1>;
- #size-cells = <1>;
-
- interrupt-parent = <&gic>;
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- CA7_0: cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a7";
- reg = <0x0>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- CA7_1: cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a7";
- reg = <0x1>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- CA7_2: cpu@2 {
- device_type = "cpu";
- compatible = "arm,cortex-a7";
- reg = <0x2>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- CA7_3: cpu@3 {
- device_type = "cpu";
- compatible = "arm,cortex-a7";
- reg = <0x3>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- L2_0: l2-cache0 {
- compatible = "cache";
- };
- };
-
- timer {
- compatible = "arm,armv7-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
- arm,cpu-registers-not-fw-configured;
- };
-
- pmu: pmu {
- compatible = "arm,cortex-a7-pmu";
- interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-affinity = <&CA7_0>, <&CA7_1>,
- <&CA7_2>, <&CA7_3>;
- };
-
- clocks: clocks {
- periph_clk: periph-clk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <200000000>;
- };
-
- uart_clk: uart-clk {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clocks = <&periph_clk>;
- clock-div = <4>;
- clock-mult = <1>;
- };
- };
-
- psci {
- compatible = "arm,psci-0.2";
- method = "smc";
- };
-
- axi@81000000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0x81000000 0x8000>;
-
- gic: interrupt-controller@1000 {
- compatible = "arm,cortex-a7-gic";
- #interrupt-cells = <3>;
- interrupt-controller;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
- reg = <0x1000 0x1000>,
- <0x2000 0x2000>,
- <0x4000 0x2000>,
- <0x6000 0x2000>;
- };
- };
-
- bus@ff800000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0xff800000 0x800000>;
-
- uart0: serial@12000 {
- compatible = "arm,pl011", "arm,primecell";
- reg = <0x12000 0x1000>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&uart_clk>, <&uart_clk>;
- clock-names = "uartclk", "apb_pclk";
- status = "disabled";
- };
- };
-};
+++ /dev/null
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2022 Broadcom Ltd.
- */
-
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-
-/ {
- compatible = "brcm,bcm6813", "brcm,bcmbca";
- #address-cells = <2>;
- #size-cells = <2>;
-
- interrupt-parent = <&gic>;
-
- cpus {
- #address-cells = <2>;
- #size-cells = <0>;
-
- B53_0: cpu@0 {
- compatible = "brcm,brahma-b53";
- device_type = "cpu";
- reg = <0x0 0x0>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- B53_1: cpu@1 {
- compatible = "brcm,brahma-b53";
- device_type = "cpu";
- reg = <0x0 0x1>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- B53_2: cpu@2 {
- compatible = "brcm,brahma-b53";
- device_type = "cpu";
- reg = <0x0 0x2>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- B53_3: cpu@3 {
- compatible = "brcm,brahma-b53";
- device_type = "cpu";
- reg = <0x0 0x3>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- L2_0: l2-cache0 {
- compatible = "cache";
- };
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
- };
-
- pmu: pmu {
- compatible = "arm,cortex-a53-pmu";
- interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-affinity = <&B53_0>, <&B53_1>,
- <&B53_2>, <&B53_3>;
- };
-
- clocks: clocks {
- periph_clk: periph-clk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <200000000>;
- };
- uart_clk: uart-clk {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clocks = <&periph_clk>;
- clock-div = <4>;
- clock-mult = <1>;
- };
- };
-
- psci {
- compatible = "arm,psci-0.2";
- method = "smc";
- };
-
- axi@81000000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x0 0x81000000 0x8000>;
-
- gic: interrupt-controller@1000 {
- compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- interrupt-controller;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
- reg = <0x1000 0x1000>,
- <0x2000 0x2000>,
- <0x4000 0x2000>,
- <0x6000 0x2000>;
- };
- };
-
- bus@ff800000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x0 0xff800000 0x800000>;
-
- uart0: serial@12000 {
- compatible = "arm,pl011", "arm,primecell";
- reg = <0x12000 0x1000>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&uart_clk>, <&uart_clk>;
- clock-names = "uartclk", "apb_pclk";
- status = "disabled";
- };
- };
-};
+++ /dev/null
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (C) 2022 Philippe Reynes <philippe.reynes@softathome.com>
- * Copyright 2022 Broadcom Ltd.
- */
-
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-
-/ {
- compatible = "brcm,bcm6855", "brcm,bcmbca";
- #address-cells = <1>;
- #size-cells = <1>;
-
- interrupt-parent = <&gic>;
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- CA7_0: cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a7";
- reg = <0x0>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- CA7_1: cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a7";
- reg = <0x1>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- CA7_2: cpu@2 {
- device_type = "cpu";
- compatible = "arm,cortex-a7";
- reg = <0x2>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- L2_0: l2-cache0 {
- compatible = "cache";
- };
- };
-
- timer {
- compatible = "arm,armv7-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(3) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(3) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(3) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(3) | IRQ_TYPE_LEVEL_LOW)>;
- arm,cpu-registers-not-fw-configured;
- };
-
- pmu: pmu {
- compatible = "arm,cortex-a7-pmu";
- interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-affinity = <&CA7_0>, <&CA7_1>, <&CA7_2>;
- };
-
- clocks: clocks {
- bootph-all;
-
- periph_clk: periph-clk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <200000000>;
- };
-
- uart_clk: uart-clk {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clocks = <&periph_clk>;
- clock-div = <4>;
- clock-mult = <1>;
- };
-
- hsspi_pll: hsspi-pll {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clocks = <&periph_clk>;
- clock-mult = <2>;
- clock-div = <1>;
- };
-
- wdt_clk: wdt-clk {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clocks = <&periph_clk>;
- clock-div = <4>;
- clock-mult = <1>;
- };
- };
-
- psci {
- compatible = "arm,psci-0.2";
- method = "smc";
- };
-
- axi@81000000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0x81000000 0x8000>;
-
- gic: interrupt-controller@1000 {
- compatible = "arm,cortex-a7-gic";
- #interrupt-cells = <3>;
- interrupt-controller;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(3) | IRQ_TYPE_LEVEL_HIGH)>;
- reg = <0x1000 0x1000>,
- <0x2000 0x2000>,
- <0x4000 0x2000>,
- <0x6000 0x2000>;
- };
- };
-
- bus@ff800000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0xff800000 0x800000>;
- bootph-all;
-
- uart0: serial@12000 {
- compatible = "arm,pl011", "arm,primecell";
- reg = <0x12000 0x1000>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&uart_clk>, <&uart_clk>;
- clock-names = "uartclk", "apb_pclk";
- status = "disabled";
- };
-
- wdt1: watchdog@480 {
- compatible = "brcm,bcm6345-wdt";
- reg = <0x480 0x14>;
- clocks = <&wdt_clk>;
- };
-
- wdt2: watchdog@4c0 {
- compatible = "brcm,bcm6345-wdt";
- reg = <0x4c0 0x14>;
- clocks = <&wdt_clk>;
- };
-
- wdt-reboot {
- compatible = "wdt-reboot";
- wdt = <&wdt1>;
- };
-
- gpio0: gpio-controller@500 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x500 0x4>,
- <0x520 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio1: gpio-controller@504 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x504 0x4>,
- <0x524 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio2: gpio-controller@508 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x508 0x4>,
- <0x528 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio3: gpio-controller@50c {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x50c 0x4>,
- <0x52c 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio4: gpio-controller@510 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x510 0x4>,
- <0x530 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio5: gpio-controller@514 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x514 0x4>,
- <0x534 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio6: gpio-controller@518 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x518 0x4>,
- <0x538 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio7: gpio-controller@51c {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x51c 0x4>,
- <0x53c 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- nand: nand-controller@1800 {
- compatible = "brcm,nand-bcm6753",
- "brcm,brcmnand-v5.0",
- "brcm,brcmnand";
- reg-names = "nand", "nand-int-base", "nand-cache";
- reg = <0x1800 0x180>,
- <0x2000 0x10>,
- <0x1c00 0x200>;
- parameter-page-big-endian = <0>;
-
- status = "disabled";
- };
-
- leds: led-controller@3000 {
- compatible = "brcm,bcm6753-leds";
- reg = <0x3000 0x3480>;
-
- status = "disabled";
- };
- };
-};
+++ /dev/null
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (C) 2020 Philippe Reynes <philippe.reynes@softathome.com>
- * Copyright 2022 Broadcom Ltd.
- */
-
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-
-/ {
- compatible = "brcm,bcm6856", "brcm,bcmbca";
- #address-cells = <2>;
- #size-cells = <2>;
-
- interrupt-parent = <&gic>;
-
- cpus {
- #address-cells = <2>;
- #size-cells = <0>;
-
- B53_0: cpu@0 {
- compatible = "brcm,brahma-b53";
- device_type = "cpu";
- reg = <0x0 0x0>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- B53_1: cpu@1 {
- compatible = "brcm,brahma-b53";
- device_type = "cpu";
- reg = <0x0 0x1>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- L2_0: l2-cache0 {
- compatible = "cache";
- };
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
- };
-
- pmu: pmu {
- compatible = "arm,cortex-a53-pmu";
- interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-affinity = <&B53_0>, <&B53_1>;
- };
-
- clocks: clocks {
- bootph-all;
-
- periph_clk:periph-clk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <200000000>;
- };
-
- hsspi_pll: hsspi-pll {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clocks = <&periph_clk>;
- clock-mult = <2>;
- clock-div = <1>;
- };
-
- wdt_clk: wdt-clk {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clocks = <&periph_clk>;
- clock-div = <4>;
- clock-mult = <1>;
- };
- };
-
- psci {
- compatible = "arm,psci-0.2";
- method = "smc";
- };
-
- axi@81000000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x0 0x81000000 0x8000>;
-
- gic: interrupt-controller@1000 {
- compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- interrupt-controller;
- reg = <0x1000 0x1000>, /* GICD */
- <0x2000 0x2000>, /* GICC */
- <0x4000 0x2000>, /* GICH */
- <0x6000 0x2000>; /* GICV */
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
- IRQ_TYPE_LEVEL_HIGH)>;
- };
- };
-
- bus@ff800000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x0 0xff800000 0x800000>;
- bootph-all;
-
- uart0: serial@640 {
- compatible = "brcm,bcm6345-uart";
- reg = <0x640 0x18>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&periph_clk>;
- clock-names = "refclk";
- status = "disabled";
- };
-
- wdt1: watchdog@480 {
- compatible = "brcm,bcm6345-wdt";
- reg = <0x480 0x14>;
- clocks = <&wdt_clk>;
- };
-
- wdt2: watchdog@4c0 {
- compatible = "brcm,bcm6345-wdt";
- reg = <0x4c0 0x14>;
- clocks = <&wdt_clk>;
- };
-
- wdt-reboot {
- compatible = "wdt-reboot";
- wdt = <&wdt1>;
- };
-
- leds: led-controller@800 {
- compatible = "brcm,bcm6858-leds";
- reg = <0x800 0xe4>;
-
- status = "disabled";
- };
-
- gpio0: gpio-controller@500 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x500 0x4>,
- <0x520 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio1: gpio-controller@504 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x504 0x4>,
- <0x524 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio2: gpio-controller@508 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x508 0x4>,
- <0x528 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio3: gpio-controller@50c {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x50c 0x4>,
- <0x52c 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio4: gpio-controller@510 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x510 0x4>,
- <0x530 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio5: gpio-controller@514 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x514 0x4>,
- <0x534 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio6: gpio-controller@518 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x518 0x4>,
- <0x538 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio7: gpio-controller@51c {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x51c 0x4>,
- <0x53c 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- hsspi: spi-controller@1000 {
- compatible = "brcm,bcm6328-hsspi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x1000 0x600>;
- clocks = <&hsspi_pll>, <&hsspi_pll>;
- clock-names = "hsspi", "pll";
- spi-max-frequency = <100000000>;
- num-cs = <8>;
-
- status = "disabled";
- };
-
- nand: nand-controller@1800 {
- compatible = "brcm,nand-bcm68360",
- "brcm,brcmnand-v5.0",
- "brcm,brcmnand";
- reg-names = "nand", "nand-int-base", "nand-cache";
- reg = <0x1800 0x180>,
- <0x2000 0x10>,
- <0x1c00 0x200>;
- parameter-page-big-endian = <0>;
-
- status = "disabled";
- };
- };
-};
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2018 Philippe Reynes <philippe.reynes@softathome.com>
- * Copyright 2022 Broadcom Ltd.
- */
-
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-
-/ {
- compatible = "brcm,bcm6858", "brcm,bcmbca";
- #address-cells = <2>;
- #size-cells = <2>;
-
- interrupt-parent = <&gic>;
-
- cpus {
- #address-cells = <2>;
- #size-cells = <0>;
-
- B53_0: cpu@0 {
- compatible = "brcm,brahma-b53";
- device_type = "cpu";
- reg = <0x0 0x0>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- B53_1: cpu@1 {
- compatible = "brcm,brahma-b53";
- device_type = "cpu";
- reg = <0x0 0x1>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- B53_2: cpu@2 {
- compatible = "brcm,brahma-b53";
- device_type = "cpu";
- reg = <0x0 0x2>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- B53_3: cpu@3 {
- compatible = "brcm,brahma-b53";
- device_type = "cpu";
- reg = <0x0 0x3>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- L2_0: l2-cache0 {
- compatible = "cache";
- };
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
- };
-
- pmu: pmu {
- compatible = "arm,armv8-pmuv3";
- interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-affinity = <&B53_0>, <&B53_1>,
- <&B53_2>, <&B53_3>;
- };
-
- clocks {
- bootph-all;
-
- periph_clk: periph_clk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <200000000>;
- };
-
- hsspi_pll: hsspi-pll {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clocks = <&periph_clk>;
- clock-mult = <2>;
- clock-div = <1>;
- };
-
- wdt_clk: wdt-clk {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clocks = <&periph_clk>;
- clock-div = <4>;
- clock-mult = <1>;
- };
- };
-
- psci {
- compatible = "arm,psci-0.2";
- method = "smc";
- };
-
- axi@81000000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x0 0x81000000 0x8000>;
-
- gic: interrupt-controller@1000 {
- compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- interrupt-controller;
- reg = <0x1000 0x1000>, /* GICD */
- <0x2000 0x2000>, /* GICC */
- <0x4000 0x2000>, /* GICH */
- <0x6000 0x2000>; /* GICV */
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
- IRQ_TYPE_LEVEL_HIGH)>;
- };
- };
-
- bus@ff800000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x0 0xff800000 0x800000>;
- bootph-all;
-
- uart0: serial@640 {
- compatible = "brcm,bcm6345-uart";
- reg = <0x640 0x18>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&periph_clk>;
- clock-names = "refclk";
- status = "disabled";
- };
-
- leds: led-controller@800 {
- compatible = "brcm,bcm6858-leds";
- reg = <0x800 0xe4>;
-
- status = "disabled";
- };
-
- wdt1: watchdog@2780 {
- compatible = "brcm,bcm6345-wdt";
- reg = <0x2780 0x14>;
- clocks = <&wdt_clk>;
- };
-
- wdt2: watchdog@27c0 {
- compatible = "brcm,bcm6345-wdt";
- reg = <0x27c0 0x14>;
- clocks = <&wdt_clk>;
- };
-
- wdt-reboot {
- compatible = "wdt-reboot";
- wdt = <&wdt1>;
- };
-
- gpio0: gpio-controller@500 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x500 0x4>,
- <0x520 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio1: gpio-controller@504 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x504 0x4>,
- <0x524 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio2: gpio-controller@508 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x508 0x4>,
- <0x528 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio3: gpio-controller@50c {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x50c 0x4>,
- <0x52c 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio4: gpio-controller@510 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x510 0x4>,
- <0x530 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio5: gpio-controller@514 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x514 0x4>,
- <0x534 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio6: gpio-controller@518 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x518 0x4>,
- <0x538 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio7: gpio-controller@51c {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x51c 0x4>,
- <0x53c 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- hsspi: spi-controller@1000 {
- compatible = "brcm,bcm6328-hsspi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x1000 0x600>;
- clocks = <&hsspi_pll>, <&hsspi_pll>;
- clock-names = "hsspi", "pll";
- spi-max-frequency = <100000000>;
- num-cs = <8>;
-
- status = "disabled";
- };
-
- nand: nand-controller@1800 {
- compatible = "brcm,nand-bcm6858",
- "brcm,brcmnand-v5.0",
- "brcm,brcmnand";
- reg-names = "nand", "nand-int-base", "nand-cache";
- reg = <0x1800 0x180>,
- <0x2000 0x10>,
- <0x1c00 0x200>;
- parameter-page-big-endian = <0>;
-
- status = "disabled";
- };
- };
-};
+++ /dev/null
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2022 Broadcom Ltd.
- */
-
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-
-/ {
- compatible = "brcm,bcm6878", "brcm,bcmbca";
- #address-cells = <1>;
- #size-cells = <1>;
-
- interrupt-parent = <&gic>;
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- CA7_0: cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a7";
- reg = <0x0>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- CA7_1: cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a7";
- reg = <0x1>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- };
-
- L2_0: l2-cache0 {
- compatible = "cache";
- };
- };
-
- timer {
- compatible = "arm,armv7-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
- arm,cpu-registers-not-fw-configured;
- };
-
- pmu: pmu {
- compatible = "arm,cortex-a7-pmu";
- interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-affinity = <&CA7_0>, <&CA7_1>;
- };
-
- clocks: clocks {
- periph_clk: periph-clk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <200000000>;
- };
- uart_clk: uart-clk {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clocks = <&periph_clk>;
- clock-div = <4>;
- clock-mult = <1>;
- };
- };
-
- psci {
- compatible = "arm,psci-0.2";
- method = "smc";
- };
-
- axi@81000000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0x81000000 0x8000>;
-
- gic: interrupt-controller@1000 {
- compatible = "arm,cortex-a7-gic";
- #interrupt-cells = <3>;
- interrupt-controller;
- reg = <0x1000 0x1000>,
- <0x2000 0x2000>,
- <0x4000 0x2000>,
- <0x6000 0x2000>;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
- IRQ_TYPE_LEVEL_HIGH)>;
- };
- };
-
- bus@ff800000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0xff800000 0x800000>;
-
- uart0: serial@12000 {
- compatible = "arm,pl011", "arm,primecell";
- reg = <0x12000 0x1000>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&uart_clk>, <&uart_clk>;
- clock-names = "uartclk", "apb_pclk";
- status = "disabled";
- };
- };
-};
+++ /dev/null
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2019 Broadcom Ltd.
- */
-
-/dts-v1/;
-
-#include "bcm47622.dtsi"
-
-/ {
- model = "Broadcom BCM947622 Reference Board";
- compatible = "brcm,bcm947622", "brcm,bcm47622", "brcm,bcmbca";
-
- aliases {
- serial0 = &uart0;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x08000000>;
- };
-};
-
-&uart0 {
- status = "okay";
-};
+++ /dev/null
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2022 Broadcom Ltd.
- */
-
-/dts-v1/;
-
-#include "bcm4912.dtsi"
-
-/ {
- model = "Broadcom BCM94912 Reference Board";
- compatible = "brcm,bcm94912", "brcm,bcm4912", "brcm,bcmbca";
-
- aliases {
- serial0 = &uart0;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x08000000>;
- };
-};
-
-&uart0 {
- status = "okay";
-};
+++ /dev/null
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2022 Broadcom Ltd.
- */
-
-/dts-v1/;
-
-#include "bcm63146.dtsi"
-
-/ {
- model = "Broadcom BCM963146 Reference Board";
- compatible = "brcm,bcm963146", "brcm,bcm63146", "brcm,bcmbca";
-
- aliases {
- serial0 = &uart0;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x08000000>;
- };
-};
-
-&uart0 {
- status = "okay";
-};
+++ /dev/null
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2022 Broadcom Ltd.
- */
-
-/dts-v1/;
-
-#include "bcm63158.dtsi"
-
-/ {
- model = "Broadcom BCM963158 Reference Board";
- compatible = "brcm,bcm963158", "brcm,bcm63158", "brcm,bcmbca";
-
- aliases {
- serial0 = &uart0;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x08000000>;
- };
-};
-
-&uart0 {
- status = "okay";
-};
+++ /dev/null
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2019 Broadcom Ltd.
- */
-
-/dts-v1/;
-
-#include "bcm63178.dtsi"
-
-/ {
- model = "Broadcom BCM963178 Reference Board";
- compatible = "brcm,bcm963178", "brcm,bcm63178", "brcm,bcmbca";
-
- aliases {
- serial0 = &uart0;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x08000000>;
- };
-};
-
-&uart0 {
- status = "okay";
-};
+++ /dev/null
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2019 Broadcom Ltd.
- */
-
-/dts-v1/;
-
-#include "bcm6756.dtsi"
-
-/ {
- model = "Broadcom BCM96756 Reference Board";
- compatible = "brcm,bcm96756", "brcm,bcm6756", "brcm,bcmbca";
-
- aliases {
- serial0 = &uart0;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x08000000>;
- };
-};
-
-&uart0 {
- status = "okay";
-};
+++ /dev/null
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2022 Broadcom Ltd.
- */
-
-/dts-v1/;
-
-#include "bcm6813.dtsi"
-
-/ {
- model = "Broadcom BCM96813 Reference Board";
- compatible = "brcm,bcm96813", "brcm,bcm6813", "brcm,bcmbca";
-
- aliases {
- serial0 = &uart0;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x08000000>;
- };
-};
-
-&uart0 {
- status = "okay";
-};
+++ /dev/null
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2022 Broadcom Ltd.
- */
-
-/dts-v1/;
-
-#include "bcm6855.dtsi"
-
-/ {
- model = "Broadcom BCM96855 Reference Board";
- compatible = "brcm,bcm96855", "brcm,bcm6855", "brcm,bcmbca";
-
- aliases {
- serial0 = &uart0;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x08000000>;
- };
-};
-
-&uart0 {
- status = "okay";
-};
+++ /dev/null
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2022 Broadcom Ltd.
- */
-
-/dts-v1/;
-
-#include "bcm6856.dtsi"
-
-/ {
- model = "Broadcom BCM96856 Reference Board";
- compatible = "brcm,bcm96856", "brcm,bcm6856", "brcm,bcmbca";
-
- aliases {
- serial0 = &uart0;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x08000000>;
- };
-};
-
-&uart0 {
- status = "okay";
-};
+++ /dev/null
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2022 Broadcom Ltd.
- */
-
-/dts-v1/;
-
-#include "bcm6858.dtsi"
-
-/ {
- model = "Broadcom BCM96858 Reference Board";
- compatible = "brcm,bcm96858", "brcm,bcm6858", "brcm,bcmbca";
-
- aliases {
- serial0 = &uart0;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x08000000>;
- };
-};
-
-&uart0 {
- status = "okay";
-};
+++ /dev/null
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2019 Broadcom Ltd.
- */
-
-/dts-v1/;
-
-#include "bcm6878.dtsi"
-
-/ {
- model = "Broadcom BCM96878 Reference Board";
- compatible = "brcm,bcm96878", "brcm,bcm6878", "brcm,bcmbca";
-
- aliases {
- serial0 = &uart0;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x08000000>;
- };
-};
-
-&uart0 {
- status = "okay";
-};
config TARGET_BCM947622
bool "Broadcom 47622 Reference Board"
depends on ARCH_BCMBCA
+ imply OF_UPSTREAM
config SYS_SOC
default "bcm47622"
config TARGET_BCM94912
bool "Broadcom 4912 Reference Board"
depends on ARCH_BCMBCA
+ imply OF_UPSTREAM
config SYS_SOC
default "bcm4912"
config TARGET_BCM963146
bool "Broadcom 63146 Reference Board"
depends on ARCH_BCMBCA
+ imply OF_UPSTREAM
config SYS_SOC
default "bcm63146"
config TARGET_BCM963158
bool "Broadcom 63158 Reference Board"
depends on ARCH_BCMBCA
+ imply OF_UPSTREAM
config SYS_SOC
default "bcm63158"
config TARGET_BCM963178
bool "Broadcom 63178 Reference Board"
depends on ARCH_BCMBCA
+ imply OF_UPSTREAM
config SYS_SOC
default "bcm63178"
config TARGET_BCM96756
bool "Broadcom 6756 Reference Board"
depends on ARCH_BCMBCA
+ imply OF_UPSTREAM
config SYS_SOC
default "bcm6756"
config TARGET_BCM96813
bool "Broadcom 6813 Reference Board"
depends on ARCH_BCMBCA
+ imply OF_UPSTREAM
config SYS_SOC
default "bcm6813"
config TARGET_BCM96855
bool "Broadcom 6855 Reference Board"
depends on ARCH_BCMBCA
+ imply OF_UPSTREAM
config SYS_SOC
default "bcm6855"
config TARGET_BCM96856
bool "Broadcom 6856 Reference Board"
depends on ARCH_BCMBCA
+ imply OF_UPSTREAM
config SYS_SOC
default "bcm6856"
config TARGET_BCM96858
bool "Broadcom 6858 Reference Board"
depends on ARCH_BCMBCA
+ imply OF_UPSTREAM
config SYS_SOC
default "bcm6858"
config TARGET_BCM96878
bool "Broadcom 6878 Reference Board"
depends on ARCH_BCMBCA
+ imply OF_UPSTREAM
config SYS_SOC
default "bcm6878"
CONFIG_NR_DRAM_BANKS=1
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000
-CONFIG_DEFAULT_DEVICE_TREE="bcm947622"
+CONFIG_DEFAULT_DEVICE_TREE="broadcom/bcm947622"
CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SYS_LOAD_ADDR=0x01000000
CONFIG_IDENT_STRING=" Broadcom BCM47622"
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_CACHE=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_UPSTREAM=y
CONFIG_OF_EMBED=y
+CONFIG_DM=y
CONFIG_CLK=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_NAND_BRCMNAND=y
+CONFIG_NAND_BRCMNAND_BCMBCA=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000
-CONFIG_DEFAULT_DEVICE_TREE="bcm94912"
+CONFIG_DEFAULT_DEVICE_TREE="broadcom/bcmbca/bcm94912"
CONFIG_SYS_LOAD_ADDR=0x01000000
CONFIG_IDENT_STRING=" Broadcom BCM4912"
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_CACHE=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_UPSTREAM=y
CONFIG_OF_EMBED=y
+CONFIG_DM=y
CONFIG_CLK=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_NAND_BRCMNAND=y
+CONFIG_NAND_BRCMNAND_BCMBCA=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000
-CONFIG_DEFAULT_DEVICE_TREE="bcm963146"
+CONFIG_DEFAULT_DEVICE_TREE="broadcom/bcmbca/bcm963146"
CONFIG_SYS_LOAD_ADDR=0x01000000
CONFIG_IDENT_STRING=" Broadcom BCM63146"
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_CACHE=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_UPSTREAM=y
CONFIG_OF_EMBED=y
+CONFIG_DM=y
CONFIG_CLK=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_NAND_BRCMNAND=y
+CONFIG_NAND_BRCMNAND_BCMBCA=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000
-CONFIG_DEFAULT_DEVICE_TREE="bcm963158"
+CONFIG_DEFAULT_DEVICE_TREE="broadcom/bcmbca/bcm963158"
CONFIG_SYS_LOAD_ADDR=0x01000000
CONFIG_IDENT_STRING=" Broadcom BCM63158"
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_CACHE=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_UPSTREAM=y
CONFIG_OF_EMBED=y
+CONFIG_DM=y
CONFIG_CLK=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_NAND_BRCMNAND=y
+CONFIG_NAND_BRCMNAND_BCMBCA=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000
-CONFIG_DEFAULT_DEVICE_TREE="bcm963178"
+CONFIG_DEFAULT_DEVICE_TREE="broadcom/bcm963178"
CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_SYS_LOAD_ADDR=0x01000000
CONFIG_IDENT_STRING=" Broadcom BCM63178"
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_CACHE=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_UPSTREAM=y
CONFIG_OF_EMBED=y
+CONFIG_DM=y
CONFIG_CLK=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_NAND_BRCMNAND=y
+CONFIG_NAND_BRCMNAND_BCMBCA=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000
-CONFIG_DEFAULT_DEVICE_TREE="bcm96756"
+CONFIG_DEFAULT_DEVICE_TREE="broadcom/bcm96756"
CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_SYS_LOAD_ADDR=0x01000000
CONFIG_IDENT_STRING=" Broadcom BCM6756"
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_CACHE=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_UPSTREAM=y
CONFIG_OF_EMBED=y
+CONFIG_DM=y
CONFIG_CLK=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_NAND_BRCMNAND=y
+CONFIG_NAND_BRCMNAND_BCMBCA=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000
-CONFIG_DEFAULT_DEVICE_TREE="bcm96813"
+CONFIG_DEFAULT_DEVICE_TREE="broadcom/bcmbca/bcm96813"
CONFIG_SYS_LOAD_ADDR=0x01000000
CONFIG_IDENT_STRING=" Broadcom BCM6813"
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_CACHE=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_UPSTREAM=y
CONFIG_OF_EMBED=y
+CONFIG_DM=y
CONFIG_CLK=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_NAND_BRCMNAND=y
+CONFIG_NAND_BRCMNAND_BCMBCA=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000
-CONFIG_DEFAULT_DEVICE_TREE="bcm96855"
+CONFIG_DEFAULT_DEVICE_TREE="broadcom/bcm96855"
CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_SYS_LOAD_ADDR=0x01000000
CONFIG_IDENT_STRING=" Broadcom BCM6855"
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_CACHE=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_UPSTREAM=y
CONFIG_OF_EMBED=y
+CONFIG_DM=y
CONFIG_CLK=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_NAND_BRCMNAND=y
+CONFIG_NAND_BRCMNAND_BCMBCA=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000
-CONFIG_DEFAULT_DEVICE_TREE="bcm96856"
+CONFIG_DEFAULT_DEVICE_TREE="broadcom/bcmbca/bcm96856"
CONFIG_SYS_LOAD_ADDR=0x01000000
CONFIG_IDENT_STRING=" Broadcom BCM6856"
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_CACHE=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_UPSTREAM=y
CONFIG_OF_EMBED=y
+CONFIG_DM=y
CONFIG_CLK=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_NAND_BRCMNAND=y
+CONFIG_NAND_BRCMNAND_BCMBCA=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000
-CONFIG_DEFAULT_DEVICE_TREE="bcm96858"
+CONFIG_DEFAULT_DEVICE_TREE="broadcom/bcmbca/bcm96858"
CONFIG_SYS_LOAD_ADDR=0x01000000
CONFIG_IDENT_STRING=" Broadcom BCM6858"
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_CACHE=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_UPSTREAM=y
CONFIG_OF_EMBED=y
+CONFIG_DM=y
CONFIG_CLK=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_NAND_BRCMNAND=y
+CONFIG_NAND_BRCMNAND_BCMBCA=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000
-CONFIG_DEFAULT_DEVICE_TREE="bcm96878"
+CONFIG_DEFAULT_DEVICE_TREE="broadcom/bcm96878"
CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_SYS_LOAD_ADDR=0x01000000
CONFIG_IDENT_STRING=" Broadcom BCM6878"
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_CACHE=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_UPSTREAM=y
CONFIG_OF_EMBED=y
+CONFIG_DM=y
CONFIG_CLK=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_NAND_BRCMNAND=y
+CONFIG_NAND_BRCMNAND_BCMBCA=y
projects / u-boot.git / commitdiff