ARM: imx: Configure GIC clock parent on Data Modul i.MX8M Plus eDM SBC

The CONFIG_SPL_BOARD_INIT lets SPL common code call spl_board_init()
during the SPL start up. On this particular system, spl_board_init()
is used to reconfigure GIC clock parent to PLL2 500M, which is the
configuration expected by the Linux kernel. Enable SPL_BOARD_INIT
and fill in the GIC clock configuration code.

Set GIC clock to 500 MHz for OD VDD_SOC. Kernel driver does not
allow to change it. Should set the clock after PMIC setting done.
Default is 400 MHz (system_pll1_800m with div = 2) set by ROM for
ND VDD_SOC.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>

diff --git a/board/data_modul/imx8mp_edm_sbc/spl.c b/board/data_modul/imx8mp_edm_sbc/spl.c
index a3600c8568af1ada70ace086bec5aa941798bff8..cc2d253e391ed6636807c49fcc5307d92992e9cd 100644 (file)
--- a/board/data_modul/imx8mp_edm_sbc/spl.c
+++ b/board/data_modul/imx8mp_edm_sbc/spl.c
@@ -80,6 +80,19 @@ int data_modul_imx_edm_sbc_board_power_init(void)
        return 0;
 }
 
+void spl_board_init(void)
+{
+       /*
+        * Set GIC clock to 500 MHz for OD VDD_SOC. Kernel driver does not
+        * allow to change it. Should set the clock after PMIC setting done.
+        * Default is 400 MHz (system_pll1_800m with div = 2) set by ROM for
+        * ND VDD_SOC.
+        */
+       clock_enable(CCGR_GIC, 0);
+       clock_set_target_val(GIC_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(5));
+       clock_enable(CCGR_GIC, 1);
+}
+
 int spl_board_boot_device(enum boot_device boot_dev_spl)
 {
        if (boot_dev_spl == SPI_NOR_BOOT)       /* SPI NOR */

diff --git a/configs/imx8mp_data_modul_edm_sbc_defconfig b/configs/imx8mp_data_modul_edm_sbc_defconfig
index ba4730a4951f6c42feec5009390eb1a33b34cf54..fb4fb6707d50a2e87458211ed7ed279f98b25e06 100644 (file)
--- a/configs/imx8mp_data_modul_edm_sbc_defconfig
+++ b/configs/imx8mp_data_modul_edm_sbc_defconfig
@@ -59,6 +59,7 @@ CONFIG_SPL_MAX_SIZE=0x25000
 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
 CONFIG_SPL_BSS_START_ADDR=0x96fc00
 CONFIG_SPL_BSS_MAX_SIZE=0x400
+CONFIG_SPL_BOARD_INIT=y
 CONFIG_SPL_BOOTROM_SUPPORT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set