arm: mvebu: Add support for generating NAND kwbimage

Add a new Kconfig option CONFIG_MVEBU_SPL_BOOT_DEVICE_NAND which instruct
make to generate kwbimage with NAND header. This image is used for booting
from NAND flash (either SPI or parallel).

Support is very simple, SPL after finishes DDR training returns back to the
BootROM (via CONFIG_SPL_BOOTROM_SUPPORT option) and BootROM then loads and
executes U-Boot proper.

To generate correct kwbimage NAND header, it is required to set following
Kconfig options:

CONFIG_SYS_NAND_PAGE_SIZE
CONFIG_SYS_NAND_BLOCK_SIZE
CONFIG_MVEBU_SPL_NAND_BADBLK_LOCATION

They are used only by make / mkimage when generating final kwbimage.

CONFIG_MVEBU_SPL_NAND_BADBLK_LOCATION is a new mvebu specific Kconfig
option which is set into kwbimage NAND_BADBLK_LOCATION header field.

Signed-off-by: Pali Rohár <pali@kernel.org>

diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index a5740629180dac8cd4d16f37e586cd2070b0dc70..cf249580d197727c9cd061089b46413bcd30a788 100644 (file)
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -339,6 +339,11 @@ config MVEBU_SPL_BOOT_DEVICE_SPI
        imply SPL_SPI
        select SPL_BOOTROM_SUPPORT
 
+config MVEBU_SPL_BOOT_DEVICE_NAND
+       bool "NAND flash (SPI or parallel)"
+       select MTD_RAW_NAND
+       select SPL_BOOTROM_SUPPORT
+
 config MVEBU_SPL_BOOT_DEVICE_MMC
        bool "SDIO/MMC card"
        imply ENV_IS_IN_MMC
@@ -364,6 +369,14 @@ config MVEBU_SPL_BOOT_DEVICE_UART
 
 endchoice
 
+config MVEBU_SPL_NAND_BADBLK_LOCATION
+       hex "NAND Bad block indicator location"
+       depends on MVEBU_SPL_BOOT_DEVICE_NAND
+       range 0x0 0x1
+       help
+         Value 0x0 = SLC flash = BBI at page 0 or page 1
+         Value 0x1 = MLC flash = BBI at last page in the block
+
 config MVEBU_EFUSE
        bool "Enable eFuse support"
        depends on HAVE_MVEBU_EFUSE

diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
index a9f506cf2fb1404a8ca15a92048615ba12330de6..c5c7ab73f6a228b505b1c55cb3cf312069f4439f 100644 (file)
--- a/arch/arm/mach-mvebu/Makefile
+++ b/arch/arm/mach-mvebu/Makefile
@@ -50,6 +50,9 @@ KWB_REPLACE += BOOT_FROM
 ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI),)
        KWB_CFG_BOOT_FROM=spi
 endif
+ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_NAND),)
+       KWB_CFG_BOOT_FROM=nand
+endif
 ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC),)
        KWB_CFG_BOOT_FROM=sdio
 endif
@@ -60,6 +63,13 @@ ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_UART),)
        KWB_CFG_BOOT_FROM=uart
 endif
 
+ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_NAND),)
+KWB_REPLACE += NAND_PAGE_SIZE NAND_BLKSZ NAND_BADBLK_LOCATION
+KWB_CFG_NAND_PAGE_SIZE = $(CONFIG_SYS_NAND_PAGE_SIZE)
+KWB_CFG_NAND_BLKSZ = $(CONFIG_SYS_NAND_BLOCK_SIZE)
+KWB_CFG_NAND_BADBLK_LOCATION = $(CONFIG_MVEBU_SPL_NAND_BADBLK_LOCATION)
+endif
+
 ifneq ($(CONFIG_SECURED_MODE_IMAGE),)
 KWB_REPLACE += CSK_INDEX
 KWB_CFG_CSK_INDEX = $(CONFIG_SECURED_MODE_CSK_INDEX)

diff --git a/arch/arm/mach-mvebu/kwbimage.cfg.in b/arch/arm/mach-mvebu/kwbimage.cfg.in
index ccb09975817ee980e990b18ab1eb8788d1db011b..90cf00c5b984f737313d7d207526f5e84ba0ea73 100644 (file)
--- a/arch/arm/mach-mvebu/kwbimage.cfg.in
+++ b/arch/arm/mach-mvebu/kwbimage.cfg.in
@@ -11,6 +11,11 @@ VERSION              1
 # Boot Media configurations
 #@BOOT_FROM
 
+# NAND configuration
+#@NAND_PAGE_SIZE
+#@NAND_BLKSZ
+#@NAND_BADBLK_LOCATION
+
 # Enable BootROM output via DEBUG flag on SoCs which require it
 #@DEBUG
 

diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 5b35da45f5846d70b7d4831fe7c226c22a9bca51..5c7b0d9dcc1f4d27421027f24ea973a2a90f93b3 100644 (file)
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -628,7 +628,8 @@ comment "Generic NAND options"
 
 config SYS_NAND_BLOCK_SIZE
        hex "NAND chip eraseblock size"
-       depends on ARCH_SUNXI || SPL_NAND_SUPPORT || TPL_NAND_SUPPORT
+       depends on ARCH_SUNXI || SPL_NAND_SUPPORT || TPL_NAND_SUPPORT || \
+               MVEBU_SPL_BOOT_DEVICE_NAND
        depends on !NAND_MXS && !NAND_DENALI_DT && !NAND_LPC32XX_MLC && \
                !NAND_FSL_IFC && !NAND_MT7621
        help
@@ -655,6 +656,7 @@ config SYS_NAND_PAGE_SIZE
        hex "NAND chip page size"
        depends on ARCH_SUNXI || NAND_OMAP_GPMC || NAND_LPC32XX_SLC || \
                SPL_NAND_SIMPLE || (NAND_MXC && SPL_NAND_SUPPORT) || \
+               MVEBU_SPL_BOOT_DEVICE_NAND || \
                (NAND_ATMEL && SPL_NAND_SUPPORT) || SPL_GENERATE_ATMEL_PMECC_HEADER
        depends on !NAND_MXS && !NAND_DENALI_DT && !NAND_LPC32XX_MLC && !NAND_MT7621
        help