]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
clk: rockchip: rk3588: Fix clk_aux16m in clock driver
authorJonas Karlman <jonas@kwiboo.se>
Tue, 14 Mar 2023 00:38:27 +0000 (00:38 +0000)
committerKever Yang <kever.yang@rock-chips.com>
Sun, 19 Mar 2023 05:17:28 +0000 (13:17 +0800)
The rate and error value is not returned for aux16m clocks, fix this.

Fixes: 7a474df74023 ("clk: rockchip: Add rk3588 clk support")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
drivers/clk/rockchip/clk_rk3588.c

index 5271d9434831301718b4cc7bb1c000fd56c9add3..a7df553e87500abc7cc24a0023bef85825e13c3a 100644 (file)
@@ -1558,7 +1558,7 @@ static ulong rk3588_clk_get_rate(struct clk *clk)
 #ifndef CONFIG_SPL_BUILD
        case CLK_AUX16M_0:
        case CLK_AUX16M_1:
-               rk3588_aux16m_get_clk(priv, clk->id);
+               rate = rk3588_aux16m_get_clk(priv, clk->id);
                break;
        case ACLK_VOP_ROOT:
        case ACLK_VOP:
@@ -1707,7 +1707,7 @@ static ulong rk3588_clk_set_rate(struct clk *clk, ulong rate)
 #ifndef CONFIG_SPL_BUILD
        case CLK_AUX16M_0:
        case CLK_AUX16M_1:
-               rk3588_aux16m_set_clk(priv, clk->id, rate);
+               ret = rk3588_aux16m_set_clk(priv, clk->id, rate);
                break;
        case ACLK_VOP_ROOT:
        case ACLK_VOP: