sh: tmu: Fix SH4 TCNT0 offset

Fix the offset of TCNT0 register, which is 0xc on SH4.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

diff --git a/arch/sh/include/asm/config.h b/arch/sh/include/asm/config.h
index df38c82abc674900c0aa8811c4c0bf9875c2d324..406156dff51d612ba30d43a68b2c0e12ed33085e 100644 (file)
--- a/arch/sh/include/asm/config.h
+++ b/arch/sh/include/asm/config.h
@@ -10,7 +10,7 @@
 
 /* Timer */
 #define CONFIG_SYS_TIMER_COUNTS_DOWN
-#define CONFIG_SYS_TIMER_COUNTER       (TMU_BASE + 0x8)        /* TCNT0 */
+#define CONFIG_SYS_TIMER_COUNTER       (TMU_BASE + 0xc)        /* TCNT0 */
 #define CONFIG_SYS_TIMER_RATE          (CONFIG_SYS_CLK_FREQ / 4)
 
 #endif