arm: mvebu: clearfog: enable both DDR clocks

Enabled both DDR clock signals to support Clearfog variants (currently,
Clearfog GTR) that need both clocks.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>

diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c
index 03724fee10c1dbcabfb933e0eedfa9bdbcb92d2d..8b63811946885e15bc624e8b8c298d2d950eb76a 100644 (file)
--- a/board/solidrun/clearfog/clearfog.c
+++ b/board/solidrun/clearfog/clearfog.c
@@ -68,7 +68,10 @@ static struct mv_ddr_topology_map board_topology_map = {
        BUS_MASK_32BIT,                 /* Busses mask */
        MV_DDR_CFG_DEFAULT,             /* ddr configuration data source */
        { {0} },                        /* raw spd data */
-       {0}                             /* timing parameters */
+       {0},                            /* timing parameters */
+       { {0} },                        /* electrical configuration */
+       {0,},                           /* electrical parameters */
+       0x3,                            /* clock enable mask */
 };
 
 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void)