pci: Fix decode regions for memory banks

Since memory banks may not be located behind each other we need to add
them separately.

Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 5a24eb6428f76b26b938ea63910744f74d64d20f..ad43e8a27cc12404a0b198ece82e0dd8760ea75b 100644 (file)
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -815,7 +815,6 @@ static int decode_regions(struct pci_controller *hose, ofnode parent_node,
                          ofnode node)
 {
        int pci_addr_cells, addr_cells, size_cells;
-       phys_addr_t base = 0, size;
        int cells_per_record;
        const u32 *prop;
        int len;
@@ -874,6 +873,21 @@ static int decode_regions(struct pci_controller *hose, ofnode parent_node,
        }
 
        /* Add a region for our local memory */
+#ifdef CONFIG_NR_DRAM_BANKS
+       bd_t *bd = gd->bd;
+
+       for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
+               if (bd->bi_dram[i].size) {
+                       pci_set_region(hose->regions + hose->region_count++,
+                                      bd->bi_dram[i].start,
+                                      bd->bi_dram[i].start,
+                                      bd->bi_dram[i].size,
+                                      PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
+               }
+       }
+#else
+       phys_addr_t base = 0, size;
+
        size = gd->ram_size;
 #ifdef CONFIG_SYS_SDRAM_BASE
        base = CONFIG_SYS_SDRAM_BASE;
@@ -882,6 +896,7 @@ static int decode_regions(struct pci_controller *hose, ofnode parent_node,
                size = gd->pci_ram_top - base;
        pci_set_region(hose->regions + hose->region_count++, base, base,
                       size, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
+#endif
 
        return 0;
 }