]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arm: ls102xa: Add snoop disable for slave port 0, 1 and 2
authorJason Jin <Jason.Jin@freescale.com>
Fri, 17 Oct 2014 07:26:32 +0000 (15:26 +0800)
committerYork Sun <yorksun@freescale.com>
Mon, 24 Nov 2014 17:27:23 +0000 (09:27 -0800)
Disable the snoop for slave interface 0, 1 and 2
to avoid the interleaving on the CCI400 BUS.

Signed-off-by: Jason Jin <Jason.Jin@freescale.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
board/freescale/ls1021aqds/ls1021aqds.c
board/freescale/ls1021atwr/ls1021atwr.c

index b5db7205fc46bd84a0b9e7494aa10c2ef9c4c011..9f4fbba38f51f2b291e15b98ff27d2d1f334865a 100644 (file)
@@ -448,6 +448,7 @@ struct ccsr_ddr {
 
 #define CCI400_CTRLORD_TERM_BARRIER    0x00000008
 #define CCI400_CTRLORD_EN_BARRIER      0
+#define CCI400_SHAORD_NON_SHAREABLE    0x00000002
 
 /* CCI-400 registers */
 struct ccsr_cci400 {
index bcfa9b9556ff49132796c5c80147f513d3192a12..5154a85b2d7dbc5ab2ac53eb030d8cb47d35e785 100644 (file)
@@ -233,6 +233,13 @@ int board_init(void)
        /* Set CCI-400 control override register to
         * enable barrier transaction */
        out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER);
+       /*
+        * Set CCI-400 Slave interface S0, S1, S2 Shareable Override Register
+        * All transactions are treated as non-shareable
+        */
+       out_le32(&cci->slave[0].sha_ord, CCI400_SHAORD_NON_SHAREABLE);
+       out_le32(&cci->slave[1].sha_ord, CCI400_SHAORD_NON_SHAREABLE);
+       out_le32(&cci->slave[2].sha_ord, CCI400_SHAORD_NON_SHAREABLE);
 
        select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
 
index a90bb09152aee9db17a28184c0831ffc73489873..3e8981b39f9c233d946957e7a2fcb928c9679f49 100644 (file)
@@ -277,6 +277,16 @@ int board_early_init_f(void)
 
 int board_init(void)
 {
+       struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
+
+       /*
+        * Set CCI-400 Slave interface S0, S1, S2 Shareable Override Register
+        * All transactions are treated as non-shareable
+        */
+       out_le32(&cci->slave[0].sha_ord, CCI400_SHAORD_NON_SHAREABLE);
+       out_le32(&cci->slave[1].sha_ord, CCI400_SHAORD_NON_SHAREABLE);
+       out_le32(&cci->slave[2].sha_ord, CCI400_SHAORD_NON_SHAREABLE);
+
 #ifndef CONFIG_SYS_FSL_NO_SERDES
        fsl_serdes_init();
        config_serdes_mux();