powerpc/mpc8xxx DDR: Fall back to raw timing for first controller only

Only the first DIMM of first controller should fall back to raw timing
parameters if SPD is missing or corrupted.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/main.c b/arch/powerpc/cpu/mpc8xxx/ddr/main.c
index 4fd4f8fc33067ed8152498738739257866fd02b0..b47268c20eacc22e31fe1314e3c18999b24ab9e4 100644 (file)
--- a/arch/powerpc/cpu/mpc8xxx/ddr/main.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/main.c
@@ -383,7 +383,7 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step,
 
                                retval = compute_dimm_parameters(spd, pdimm, i);
 #ifdef CONFIG_SYS_DDR_RAW_TIMING
-                               if (retval != 0) {
+                               if (!i && !j && retval) {
                                        printf("SPD error on controller %d! "
                                        "Trying fallback to raw timing "
                                        "calculation\n", i);