arm: dts: r8a774c0: Resync R8A774C0 SoC DTSI with Linux 5.11

Resync the R8A774C0 SoC DTSI with Linux kernel 5.11 commit f40ddce88593
("Linux 5.11").

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

diff --git a/arch/arm/dts/r8a774c0.dtsi b/arch/arm/dts/r8a774c0.dtsi
index e14db4d363de74f6af4665ec176d7565795d3b8a..2bdd571bd8a37a74e4dbb824bf21241d15207997 100644 (file)
--- a/arch/arm/dts/r8a774c0.dtsi
+++ b/arch/arm/dts/r8a774c0.dtsi
@@ -256,7 +256,7 @@
                        resets = <&cpg 906>;
                };
 
-               pfc: pin-controller@e6060000 {
+               pfc: pinctrl@e6060000 {
                        compatible = "renesas,pfc-r8a774c0";
                        reg = <0 0xe6060000 0 0x508>;
                };
@@ -960,6 +960,7 @@
                        power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
                        resets = <&cpg 812>;
                        phy-mode = "rgmii";
+                       rx-internal-delay-ps = <0>;
                        iommus = <&ipmmu_ds0 16>;
                        #address-cells = <1>;
                        #size-cells = <0>;
@@ -1214,9 +1215,8 @@
                        reg = <0 0xe6ea0000 0 0x0064>;
                        interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 210>;
-                       dmas = <&dmac1 0x43>, <&dmac1 0x42>,
-                              <&dmac2 0x43>, <&dmac2 0x42>;
-                       dma-names = "tx", "rx", "tx", "rx";
+                       dmas = <&dmac0 0x43>, <&dmac0 0x42>;
+                       dma-names = "tx", "rx";
                        power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
                        resets = <&cpg 210>;
                        #address-cells = <1>;
@@ -1698,6 +1698,25 @@
                        status = "disabled";
                };
 
+               pciec0_ep: pcie-ep@fe000000 {
+                       compatible = "renesas,r8a774c0-pcie-ep",
+                                    "renesas,rcar-gen3-pcie-ep";
+                       reg = <0x0 0xfe000000 0 0x80000>,
+                             <0x0 0xfe100000 0 0x100000>,
+                             <0x0 0xfe200000 0 0x200000>,
+                             <0x0 0x30000000 0 0x8000000>,
+                             <0x0 0x38000000 0 0x8000000>;
+                       reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
+                       interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 319>;
+                       clock-names = "pcie";
+                       resets = <&cpg 319>;
+                       power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
+                       status = "disabled";
+               };
+
                vspb0: vsp@fe960000 {
                        compatible = "renesas,vsp2";
                        reg = <0 0xfe960000 0 0x8000>;