mips: cache: Make invalidate_dcache_range() weak to enable overwrite

This patch adds __weak to invalidate_dcache_range() in lib/cache.c. This
makes it possible to overwrite this function by a platforms specific
version, which will be done for Octeon.

Signed-off-by: Stefan Roese <sr@denx.de>

diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c
index ad37f0580217e78e1474d55d8027a489836e4988..cf29994a7ae82c0f9d42cbc09ef9546c2626508e 100644 (file)
--- a/arch/mips/lib/cache.c
+++ b/arch/mips/lib/cache.c
@@ -159,7 +159,7 @@ void __weak flush_dcache_range(ulong start_addr, ulong stop)
        sync();
 }
 
-void invalidate_dcache_range(ulong start_addr, ulong stop)
+void __weak invalidate_dcache_range(ulong start_addr, ulong stop)
 {
        unsigned long lsize = dcache_line_size();
        unsigned long slsize = scache_line_size();