The EFI subsystem accesses the real time clock and is enabled by default.
So we should drop any CONFIG_CMD_DATE dependency from the real time clock
drivers.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
#include <asm/arch/at91_rtt.h>
#include <asm/arch/at91_gpbr.h>
-#if defined(CONFIG_CMD_DATE)
-
int rtc_get (struct rtc_time *tmp)
{
at91_rtt_t *rtt = (at91_rtt_t *) ATMEL_BASE_RTT;
while (readl(&rtt->vr) != 0)
;
}
-
-#endif
#include <asm/io.h>
#include <asm/davinci_rtc.h>
-#if defined(CONFIG_CMD_DATE)
int rtc_get(struct rtc_time *tmp)
{
struct davinci_rtc *rtc = (struct davinci_rtc *)DAVINCI_RTC_BASE;
/* run RTC counter */
writel(0x01, &rtc->ctrl);
}
-#endif
#include <command.h>
#include <rtc.h>
-#if defined(CONFIG_CMD_DATE)
-
/* GPP Pins */
#define DATA 0x200
#define SCLK 0x400
return 0;
}
-
-#endif
#include <rtc.h>
#include <spi.h>
-#if defined(CONFIG_CMD_DATE)
-
#define RTC_SECONDS 0x00
#define RTC_MINUTES 0x01
#define RTC_HOURS 0x02
}
#endif /* end of code exclusion (see #ifdef CONFIG_SXNI855T above) */
-
-#endif
#ifndef CONFIG_DM_RTC
-#if defined(CONFIG_CMD_DATE)
-
/*---------------------------------------------------------------------*/
#undef DEBUG_RTC
i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
}
-#endif /* CONFIG_CMD_DATE*/
-
#endif /* !CONFIG_DM_RTC */
#ifdef CONFIG_DM_RTC
#include <rtc.h>
#include <i2c.h>
-#if defined(CONFIG_CMD_DATE)
-
/*
* RTC register addresses
*/
{
i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
}
-
-#endif
#include <rtc.h>
#include <i2c.h>
-#if defined(CONFIG_CMD_DATE)
-
/*---------------------------------------------------------------------*/
#undef DEBUG_RTC
#define DEBUG_RTC
{
i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
}
-#endif
#include <rtc.h>
-#if defined(CONFIG_CMD_DATE)
-
static uchar rtc_read(unsigned int addr );
static void rtc_write(unsigned int addr, uchar val);
#endif
*(volatile unsigned char*)(addr) = val;
}
-
-#endif
#include <command.h>
#include <rtc.h>
-#if defined(CONFIG_CMD_DATE)
-
static uchar rtc_read( unsigned int addr );
static void rtc_write( unsigned int addr, uchar val);
#endif
out8( addr, val );
}
-
-#endif
#include <rtc.h>
#include <i2c.h>
-#if defined(CONFIG_CMD_DATE)
-
/*
* RTC register addresses
*/
{
i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
}
-
-#endif
#include <linux/compat.h>
#include <rtc.h>
-#if defined(CONFIG_CMD_DATE)
-
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
{
di_init();
}
-
-#endif
#endif
*/
-#if defined(CONFIG_SYS_I2C_RTC_ADDR) && defined(CONFIG_CMD_DATE)
-
/* ------------------------------------------------------------------------- */
/*
these are simple defines for the chip local to here so they aren't too
val = val & 0x3F;/*turn off freq test keep calibration*/
i2c_write(CONFIG_SYS_I2C_RTC_ADDR, RTC_CONTROL_ADDR, 1, &val, 1);
}
-#endif
#include <rtc.h>
#include <i2c.h>
-#if defined(CONFIG_SYS_I2C_RTC_ADDR) && defined(CONFIG_CMD_DATE)
-
/*
* Convert between century and "century bits" (CB1 and CB0). These routines
* assume years are in the range 1900 - 2299.
}
rtc_dump("end reset");
}
-#endif /* CONFIG_RTC_M41T60 && CONFIG_SYS_I2C_RTC_ADDR && CONFIG_CMD_DATE */
#include <rtc.h>
#include <i2c.h>
-#if defined(CONFIG_CMD_DATE)
-
#define M41T62_REG_SSEC 0
#define M41T62_REG_SEC 1
#define M41T62_REG_MIN 2
val &= ~M41T80_ALHOUR_HT;
i2c_write(CONFIG_SYS_I2C_RTC_ADDR, M41T62_REG_ALARM_HOUR, 1, &val, 1);
}
-
-#endif
#include <rtc.h>
#include <config.h>
-#if defined(CONFIG_CMD_DATE)
-
static uchar rtc_read (uchar reg);
static void rtc_write (uchar reg, uchar val);
*(unsigned char *)
((CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE - 8) + reg) = val;
}
-
-#endif
#include <rtc.h>
#include <i2c.h>
-#if defined(CONFIG_CMD_DATE)
-
#ifndef CONFIG_SYS_I2C_RTC_ADDR
#define CONFIG_SYS_I2C_RTC_ADDR 0x50
#endif
void rtc_reset (void)
{
}
-
-#endif
#define out8(p, v) outb(v, p)
#endif
-#if defined(CONFIG_CMD_DATE)
-
/* Set this to 1 to clear the CMOS RAM */
#define CLEAR_CMOS 0
/* Clear any pending interrupts */
mc146818_read8(RTC_CONFIG_C);
}
-#endif /* CONFIG_CMD_DATE */
#ifdef CONFIG_DM_RTC
#include <common.h>
-#if defined(CONFIG_CMD_DATE)
-
#include <command.h>
#include <rtc.h>
#include <asm/immap.h>
rtc->cr |= RTC_CR_SWR;
}
-
-#endif /* CONFIG_MCFRTC && CONFIG_CMD_DATE */
rtc_write(d++, *s++);
}
-#if defined(CONFIG_CMD_DATE)
-
/* ------------------------------------------------------------------------- */
int rtc_get (struct rtc_time *tmp)
wd_value = RTC_WDS | ((multi & 0x1F) << 2) | (res & 0x3);
rtc_write(RTC_WATCHDOG, wd_value);
}
-
-#endif
#include <rtc.h>
#include <i2c.h>
-#if defined(CONFIG_CMD_DATE)
-
static uchar rtc_read (uchar reg);
static void rtc_write (uchar reg, uchar val);
{
i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
}
-
-#endif
#include <rtc.h>
#include <i2c.h>
-#if defined(CONFIG_CMD_DATE)
/*
* Reads are always done starting with register 15, which requires some
* jumping-through-hoops to access the data correctly.
if (!setup_done)
rs5c372_enable();
}
-
-#endif
#include <rtc.h>
#include <i2c.h>
-#if defined(CONFIG_CMD_DATE)
-
/*---------------------------------------------------------------------*/
#undef DEBUG_RTC
printf("Error writing to RTC\n");
}
-
-#endif /* CONFIG_RTC_RX8025 && CONFIG_CMD_DATE */
#include <common.h>
#include <command.h>
-#if (defined(CONFIG_CMD_DATE))
-
#include <asm/arch/s3c24x0_cpu.h>
#include <rtc.h>
writeb((readb(&rtc->rtccon) & ~0x06) | 0x08, &rtc->rtccon);
writeb(readb(&rtc->rtccon) & ~(0x08 | 0x01), &rtc->rtccon);
}
-
-#endif
#include <rtc.h>
#include <i2c.h>
-#if defined(CONFIG_CMD_DATE)
-
#define CCR_SEC 0
#define CCR_MIN 1
#define CCR_HOUR 2
* Nothing to do
*/
}
-
-#endif