- Add support for Altera Nios-II processors.
- Add support for Psyent PCI-5441 board.
- Add support for Psyent PK1C20 board.
Changes since U-Boot 1.1.1:
======================================================================
+* Patches by Scott McNutt, 24 Aug 2004:
+ - Add support for Altera Nios-II processors.
+ - Add support for Psyent PCI-5441 board.
+ - Add support for Psyent PK1C20 board.
+
* Patches by Jon Loeliger, 24 Aug 2004:
- Add support for the MPC8541 and MPC8555 CDS boards
- Cleanup eth?addr handling: make dependent on CONFIG_ETH?ADDR
N: Scott McNutt
E: smcnutt@psyent.com
-D: Support for Altera Nios-32 CPU, for Nios Cyclone Development Kit (DK-1C20)
+D: Support for Altera Nios-32 CPU
+D: Support for Altera Nios-II CPU
+D: Support for Nios Cyclone Development Kit (DK-1C20)
+W: http://www.psyent.com
N: Rolf Offermanns
E: rof@sysgo.de
DK1C20 Nios-32
+#########################################################################
+# Nios-II Systems: #
+# #
+# Maintainer Name, Email Address #
+# Board CPU #
+#########################################################################
+
+Scott McNutt <smcnutt@psyent.com>
+
+ PCI5441 Nios-II
+ PK1C20 Nios-II
+
#########################################################################
# MicroBlaze Systems: #
# #
DK1S10 DK1S10_standard_32 DK1S10_mtx_ldk_20 \
"
+#########################################################################
+## Nios-II Systems
+#########################################################################
+
+LIST_nios2="PCI5441 PK1C20"
+
#########################################################################
## MicroBlaze Systems
#########################################################################
arm|SA|ARM7|ARM9|pxa|ixp| \
microblaze| \
mips| \
- nios| \
+ nios|nios2| \
x86|I486)
for target in `eval echo '$LIST_'${arg}`
do
ifeq ($(ARCH),nios)
CROSS_COMPILE = nios-elf-
endif
+ifeq ($(ARCH),nios2)
+CROSS_COMPILE = nios2-elf-
+endif
ifeq ($(ARCH),m68k)
CROSS_COMPILE = m68k-elf-
endif
}
@./mkconfig -a ADNPESC1 nios nios adnpesc1 ssv
+#########################################################################
+## Nios-II
+#########################################################################
+
+PK1C20_config : unconfig
+ @./mkconfig PK1C20 nios2 nios2 pk1c20 psyent
+
+PCI5441_config : unconfig
+ @./mkconfig PCI5441 nios2 nios2 pci5441 psyent
#========================================================================
# MicroBlaze
- mpc8260 Files specific to Motorola MPC8260 CPUs
- mpc85xx Files specific to Motorola MPC85xx CPUs
- nios Files specific to Altera NIOS CPUs
+ - nios2 Files specific to Altera Nios-II CPUs
- ppc4xx Files specific to IBM PowerPC 4xx CPUs
- pxa Files specific to Intel XScale PXA CPUs
- s3c44b0 Files specific to Samsung S3C44B0 CPUs
----------------------
CONFIG_MICROBLAZE
+ Nios-2 based CPUs:
+ ----------------------
+ CONFIG_NIOS2
+
- Board Type: Define exactly one of
CONFIG_SUZAKU
+ Nios-2 based boards:
+ ------------------------
+
+ CONFIG_PCI5441 CONFIG_PK1C20
+
- CPU Module Type: (if CONFIG_COGENT is defined)
Define exactly one of
* MA 02111-1307 USA
*/
-
#include <common.h>
#include <pci.h>
#include <asm/processor.h>
void local_bus_init(void);
void sdram_init(void);
-
-
-int
-board_early_init_f(void)
+int board_early_init_f (void)
{
- return 0;
+ return 0;
}
-
-int
-checkboard(void)
+int checkboard (void)
{
- volatile immap_t *immap = (immap_t *)CFG_CCSRBAR;
- volatile ccsr_gur_t *gur = &immap->im_gur;
-
- /* PCI slot in USER bits CSR[6:7] by convention. */
- uint pci_slot = get_pci_slot();
-
- uint pci_dual = get_pci_dual(); /* PCI DUAL in CM_PCI[3] */
- uint pci1_32 = gur->pordevsr & 0x10000; /* PORDEVSR[15] */
- uint pci1_clk_sel = gur->porpllsr & 0x8000; /* PORPLLSR[16] */
- uint pci2_clk_sel = gur->porpllsr & 0x4000; /* PORPLLSR[17] */
-
- uint pci1_speed = get_clock_freq(); /* PCI PSPEED in [4:5] */
-
- uint cpu_board_rev = get_cpu_board_revision();
-
- printf("Board: CDS Version 0x%02x, PCI Slot %d\n",
- get_board_version(),
- pci_slot);
-
- printf("CPU Board Revision %d.%d (0x%04x)\n",
- MPC85XX_CPU_BOARD_MAJOR(cpu_board_rev),
- MPC85XX_CPU_BOARD_MINOR(cpu_board_rev),
- cpu_board_rev);
-
- printf(" PCI1: %d bit, %s MHz, %s\n",
- (pci1_32) ? 32 : 64,
- (pci1_speed == 33000000) ? "33" :
- (pci1_speed == 66000000) ? "66" : "unknown",
- pci1_clk_sel ? "sync" : "async"
- );
-
- if (pci_dual) {
- printf(" PCI2: 32 bit, 66 MHz, %s\n",
- pci2_clk_sel ? "sync" : "async"
- );
- } else {
- printf(" PCI2: disabled\n");
- }
-
- /*
- * Initialize local bus.
- */
- local_bus_init();
-
- return 0;
-}
+ volatile immap_t *immap = (immap_t *) CFG_CCSRBAR;
+ volatile ccsr_gur_t *gur = &immap->im_gur;
+
+ /* PCI slot in USER bits CSR[6:7] by convention. */
+ uint pci_slot = get_pci_slot ();
+ uint pci_dual = get_pci_dual (); /* PCI DUAL in CM_PCI[3] */
+ uint pci1_32 = gur->pordevsr & 0x10000; /* PORDEVSR[15] */
+ uint pci1_clk_sel = gur->porpllsr & 0x8000; /* PORPLLSR[16] */
+ uint pci2_clk_sel = gur->porpllsr & 0x4000; /* PORPLLSR[17] */
+
+ uint pci1_speed = get_clock_freq (); /* PCI PSPEED in [4:5] */
+
+ uint cpu_board_rev = get_cpu_board_revision ();
+
+ printf ("Board: CDS Version 0x%02x, PCI Slot %d\n",
+ get_board_version (), pci_slot);
+
+ printf ("CPU Board Revision %d.%d (0x%04x)\n",
+ MPC85XX_CPU_BOARD_MAJOR (cpu_board_rev),
+ MPC85XX_CPU_BOARD_MINOR (cpu_board_rev), cpu_board_rev);
+
+ printf (" PCI1: %d bit, %s MHz, %s\n",
+ (pci1_32) ? 32 : 64,
+ (pci1_speed == 33000000) ? "33" :
+ (pci1_speed == 66000000) ? "66" : "unknown",
+ pci1_clk_sel ? "sync" : "async");
+
+ if (pci_dual) {
+ printf (" PCI2: 32 bit, 66 MHz, %s\n",
+ pci2_clk_sel ? "sync" : "async");
+ } else {
+ printf (" PCI2: disabled\n");
+ }
+
+ /*
+ * Initialize local bus.
+ */
+ local_bus_init ();
+
+ return 0;
+}
long int
initdram(int board_type)
udelay(200);
}
#endif
-
dram_size = spd_sdram();
-
#if defined(CONFIG_DDR_ECC)
/*
* Initialize and enable DDR ECC.
*/
ddr_enable_ecc(dram_size);
#endif
-
-
/*
* SDRAM Initialization
*/
return dram_size;
}
-
/*
* Initialize Local Bus
*/
-
void
local_bus_init(void)
{
}
}
-
/*
* Initialize SDRAM memory on the Local Bus.
*/
-
void
sdram_init(void)
{
#endif /* enable SDRAM init */
}
-
#if defined(CFG_DRAM_TEST)
int
testdram(void)
}
#endif
-
-
#if defined(CONFIG_PCI)
/*
};
#endif
-
static struct pci_controller hose = {
#ifndef CONFIG_PCI_PNP
config_table: pci_mpc85xxcds_config_table,
#endif /* CONFIG_PCI */
-
void
pci_init_board(void)
{
* MA 02111-1307 USA
*/
-
#include <common.h>
#include <pci.h>
#include <asm/processor.h>
void local_bus_init(void);
void sdram_init(void);
-
-
-int
-board_early_init_f(void)
+int board_early_init_f (void)
{
- return 0;
+ return 0;
}
-
-int
-checkboard(void)
+int checkboard (void)
{
- volatile immap_t *immap = (immap_t *)CFG_CCSRBAR;
- volatile ccsr_gur_t *gur = &immap->im_gur;
-
- /* PCI slot in USER bits CSR[6:7] by convention. */
- uint pci_slot = get_pci_slot();
-
- uint pci_dual = get_pci_dual(); /* PCI DUAL in CM_PCI[3] */
- uint pci1_32 = gur->pordevsr & 0x10000; /* PORDEVSR[15] */
- uint pci1_clk_sel = gur->porpllsr & 0x8000; /* PORPLLSR[16] */
- uint pci2_clk_sel = gur->porpllsr & 0x4000; /* PORPLLSR[17] */
-
- uint pci1_speed = get_clock_freq(); /* PCI PSPEED in [4:5] */
-
- uint cpu_board_rev = get_cpu_board_revision();
-
- printf("Board: CDS Version 0x%02x, PCI Slot %d\n",
- get_board_version(),
- pci_slot);
-
- printf("CPU Board Revision %d.%d (0x%04x)\n",
- MPC85XX_CPU_BOARD_MAJOR(cpu_board_rev),
- MPC85XX_CPU_BOARD_MINOR(cpu_board_rev),
- cpu_board_rev);
-
- printf(" PCI1: %d bit, %s MHz, %s\n",
- (pci1_32) ? 32 : 64,
- (pci1_speed == 33000000) ? "33" :
- (pci1_speed == 66000000) ? "66" : "unknown",
- pci1_clk_sel ? "sync" : "async"
- );
-
- if (pci_dual) {
- printf(" PCI2: 32 bit, 66 MHz, %s\n",
- pci2_clk_sel ? "sync" : "async"
- );
- } else {
- printf(" PCI2: disabled\n");
- }
-
- /*
- * Initialize local bus.
- */
- local_bus_init();
-
- return 0;
-}
+ volatile immap_t *immap = (immap_t *) CFG_CCSRBAR;
+ volatile ccsr_gur_t *gur = &immap->im_gur;
+
+ /* PCI slot in USER bits CSR[6:7] by convention. */
+ uint pci_slot = get_pci_slot ();
+
+ uint pci_dual = get_pci_dual (); /* PCI DUAL in CM_PCI[3] */
+ uint pci1_32 = gur->pordevsr & 0x10000; /* PORDEVSR[15] */
+ uint pci1_clk_sel = gur->porpllsr & 0x8000; /* PORPLLSR[16] */
+ uint pci2_clk_sel = gur->porpllsr & 0x4000; /* PORPLLSR[17] */
+
+ uint pci1_speed = get_clock_freq (); /* PCI PSPEED in [4:5] */
+
+ uint cpu_board_rev = get_cpu_board_revision ();
+
+ printf ("Board: CDS Version 0x%02x, PCI Slot %d\n",
+ get_board_version (), pci_slot);
+
+ printf ("CPU Board Revision %d.%d (0x%04x)\n",
+ MPC85XX_CPU_BOARD_MAJOR (cpu_board_rev),
+ MPC85XX_CPU_BOARD_MINOR (cpu_board_rev), cpu_board_rev);
+
+ printf (" PCI1: %d bit, %s MHz, %s\n",
+ (pci1_32) ? 32 : 64,
+ (pci1_speed == 33000000) ? "33" :
+ (pci1_speed == 66000000) ? "66" : "unknown",
+ pci1_clk_sel ? "sync" : "async");
+
+ if (pci_dual) {
+ printf (" PCI2: 32 bit, 66 MHz, %s\n",
+ pci2_clk_sel ? "sync" : "async");
+ } else {
+ printf (" PCI2: disabled\n");
+ }
+ /*
+ * Initialize local bus.
+ */
+ local_bus_init ();
+
+ return 0;
+}
long int
initdram(int board_type)
udelay(200);
}
#endif
-
dram_size = spd_sdram();
-
#if defined(CONFIG_DDR_ECC)
/*
* Initialize and enable DDR ECC.
*/
ddr_enable_ecc(dram_size);
#endif
-
-
/*
* SDRAM Initialization
*/
return dram_size;
}
-
/*
* Initialize Local Bus
*/
-
void
local_bus_init(void)
{
}
}
-
/*
* Initialize SDRAM memory on the Local Bus.
*/
-
void
sdram_init(void)
{
lbc->lbcr = CFG_LBC_LBCR;
asm("msync");
-
lbc->lsrt = CFG_LBC_LSRT;
lbc->mrtpr = CFG_LBC_MRTPR;
asm("msync");
#endif /* enable SDRAM init */
}
-
#if defined(CFG_DRAM_TEST)
int
testdram(void)
}
#endif
-
-
#if defined(CONFIG_PCI)
/*
};
#endif
-
static struct pci_controller hose = {
#ifndef CONFIG_PCI_PNP
config_table: pci_mpc85xxcds_config_table,
#endif /* CONFIG_PCI */
-
void
pci_init_board(void)
{
--- /dev/null
+/*
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#include <common.h>
+#if defined(CONFIG_NIOS)
+#include <nios.h>
+#else
+#include <nios2.h>
+#endif
+
+#define SECTSZ (64 * 1024)
+flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
+
+/*----------------------------------------------------------------------*/
+unsigned long flash_init (void)
+{
+ int i;
+ unsigned long addr;
+ flash_info_t *fli = &flash_info[0];
+
+ fli->size = CFG_FLASH_SIZE;
+ fli->sector_count = CFG_MAX_FLASH_SECT;
+ fli->flash_id = FLASH_MAN_AMD + FLASH_AMDLV065D;
+
+ addr = CFG_FLASH_BASE;
+ for (i = 0; i < fli->sector_count; ++i) {
+ fli->start[i] = addr;
+ addr += SECTSZ;
+ fli->protect[i] = 1;
+ }
+
+ return (CFG_FLASH_SIZE);
+}
+/*--------------------------------------------------------------------*/
+void flash_print_info (flash_info_t * info)
+{
+ int i, k;
+ unsigned long size;
+ int erased;
+ volatile unsigned char *flash;
+
+ printf (" Size: %ld KB in %d Sectors\n",
+ info->size >> 10, info->sector_count);
+ printf (" Sector Start Addresses:");
+ for (i = 0; i < info->sector_count; ++i) {
+
+ /* Check if whole sector is erased */
+ if (i != (info->sector_count - 1))
+ size = info->start[i + 1] - info->start[i];
+ else
+ size = info->start[0] + info->size - info->start[i];
+ erased = 1;
+ flash = (volatile unsigned char *) CACHE_BYPASS(info->start[i]);
+ for (k = 0; k < size; k++) {
+ if (*flash++ != 0xff) {
+ erased = 0;
+ break;
+ }
+ }
+
+ /* Print the info */
+ if ((i % 5) == 0)
+ printf ("\n ");
+ printf (" %08lX%s%s",
+ CACHE_NO_BYPASS(info->start[i]),
+ erased ? " E" : " ",
+ info->protect[i] ? "RO " : " ");
+ }
+ printf ("\n");
+}
+
+/*-------------------------------------------------------------------*/
+
+
+int flash_erase (flash_info_t * info, int s_first, int s_last)
+{
+ volatile CFG_FLASH_WORD_SIZE *addr = (CFG_FLASH_WORD_SIZE *)
+ CACHE_BYPASS(info->start[0]);
+ volatile CFG_FLASH_WORD_SIZE *addr2;
+ int prot, sect;
+ ulong start;
+
+ /* Some sanity checking */
+ if ((s_first < 0) || (s_first > s_last)) {
+ printf ("- no sectors to erase\n");
+ return 1;
+ }
+
+ prot = 0;
+ for (sect = s_first; sect <= s_last; ++sect) {
+ if (info->protect[sect]) {
+ prot++;
+ }
+ }
+ if (prot) {
+ printf ("- Warning: %d protected sectors will not be erased!\n",
+ prot);
+ } else {
+ printf ("\n");
+ }
+
+ /* It's ok to erase multiple sectors provided we don't delay more
+ * than 50 usec between cmds ... at which point the erase time-out
+ * occurs. So don't go and put printf() calls in the loop ... it
+ * won't be very helpful ;-)
+ */
+ for (sect = s_first; sect <= s_last; sect++) {
+ if (info->protect[sect] == 0) { /* not protected */
+ addr2 = (CFG_FLASH_WORD_SIZE *)
+ CACHE_BYPASS((info->start[sect]));
+ *addr = 0xaa;
+ *addr = 0x55;
+ *addr = 0x80;
+ *addr = 0xaa;
+ *addr = 0x55;
+ *addr2 = 0x30;
+ /* Now just wait for 0xff & provide some user
+ * feedback while we wait.
+ */
+ start = get_timer (0);
+ while (*addr2 != 0xff) {
+ udelay (1000 * 1000);
+ putc ('.');
+ if (get_timer (start) > CFG_FLASH_ERASE_TOUT) {
+ printf ("timeout\n");
+ return 1;
+ }
+ }
+ }
+ }
+ printf ("\n");
+ return 0;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+
+int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
+{
+
+ vu_char *cmd = (vu_char *) CACHE_BYPASS(info->start[0]);
+ vu_char *dst = (vu_char *) CACHE_BYPASS(addr);
+ unsigned char b;
+ ulong start;
+
+ while (cnt) {
+ /* Check for sufficient erase */
+ b = *src;
+ if ((*dst & b) != b) {
+ printf ("%02x : %02x\n", *dst, b);
+ return (2);
+ }
+
+ *cmd = 0xaa;
+ *cmd = 0x55;
+ *cmd = 0xa0;
+ *dst = b;
+
+ /* Verify write */
+ start = get_timer (0);
+ while (*dst != b) {
+ if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
+ return 1;
+ }
+ }
+ dst++;
+ src++;
+ cnt--;
+ }
+
+ return (0);
+}
--- /dev/null
+#
+# (C) Copyright 2001-2004
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(BOARD).a
+
+COMOBJS := ../common/AMDLV065D.o
+
+OBJS := $(BOARD).o $(COMOBJS)
+
+SOBJS =
+
+$(LIB): $(OBJS) $(SOBJS)
+ $(AR) crv $@ $^
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+ $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+-include .depend
+
+#########################################################################
--- /dev/null
+#
+# (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+# Scott McNutt <smcnutt@psyent.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE = 0x018e0000
+
+PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul
+PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include
+
+ifeq ($(debug),1)
+PLATFORM_CPPFLAGS += -DDEBUG
+endif
--- /dev/null
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+int board_early_init_f (void)
+{
+ return 0;
+}
+
+int checkboard (void)
+{
+ puts ("BOARD : Psyent PCI-5441\n");
+ return 0;
+}
+
+long int initdram (int board_type)
+{
+ return (0);
+}
--- /dev/null
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+OUTPUT_FORMAT("elf32-littlenios2")
+OUTPUT_ARCH(nios2)
+ENTRY(_start)
+
+SECTIONS
+{
+ .text :
+ {
+ cpu/nios2/start.o (.text)
+ *(.text)
+ *(.text.*)
+ *(.gnu.linkonce.t*)
+ *(.rodata)
+ *(.rodata.*)
+ *(.gnu.linkonce.r*)
+ }
+ . = ALIGN (4);
+ _etext = .;
+ PROVIDE (etext = .);
+
+ /* CMD TABLE - sandwich this in between text and data so
+ * the initialization code relocates the command table as
+ * well -- admittedly, this is just pure laziness ;-)
+ */
+ __u_boot_cmd_start = .;
+ .u_boot_cmd :
+ {
+ *(.u_boot_cmd)
+ }
+ . = ALIGN(4);
+ __u_boot_cmd_end = .;
+
+ /* INIT DATA sections - "Small" data (see the gcc -G option)
+ * is always gp-relative. Here we make all init data sections
+ * adjacent to simplify the startup code -- and provide
+ * the global pointer for gp-relative access.
+ */
+ _data = .;
+ .data :
+ {
+ *(.data)
+ *(.data.*)
+ *(.gnu.linkonce.d*)
+ }
+
+ . = ALIGN(16);
+ _gp = .; /* Global pointer addr */
+ PROVIDE (gp = .);
+
+ .sdata :
+ {
+ *(.sdata)
+ *(.sdata.*)
+ *(.gnu.linkonce.s.*)
+ }
+ . = ALIGN(4);
+
+ _edata = .;
+ PROVIDE (edata = .);
+
+ /* UNINIT DATA - Small uninitialized data is first so it's
+ * adjacent to sdata and can be referenced via gp. The normal
+ * bss follows. We keep it adjacent to simplify init code.
+ */
+ __bss_start = .;
+ .sbss :
+ {
+ *(.sbss)
+ *(.sbss.*)
+ *(.gnu.linkonce.sb.*)
+ *(.scommon)
+ }
+ . = ALIGN(4);
+ .bss :
+ {
+ *(.bss)
+ *(.bss.*)
+ *(.dynbss)
+ *(COMMON)
+ *(.scommon)
+ }
+ . = ALIGN(4);
+ _end = .;
+ PROVIDE (end = .);
+
+ /* DEBUG -- symbol table, string table, etc. etc.
+ */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ .debug_info 0 : { *(.debug_info) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+}
--- /dev/null
+#
+# (C) Copyright 2001-2004
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(BOARD).a
+
+COMOBJS := ../common/AMDLV065D.o
+
+OBJS := $(BOARD).o led.o $(COMOBJS)
+
+SOBJS =
+
+$(LIB): $(OBJS) $(SOBJS)
+ $(AR) crv $@ $^
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+ $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+-include .depend
+
+#########################################################################
--- /dev/null
+#
+# (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+# Scott McNutt <smcnutt@psyent.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE = 0x018e0000
+
+PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul
+PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include
+
+ifeq ($(debug),1)
+PLATFORM_CPPFLAGS += -DDEBUG
+endif
--- /dev/null
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <nios2.h>
+#include <nios2-io.h>
+#include <status_led.h>
+
+/* The LED port is configured as output only, so we
+ * must track the state manually.
+ */
+static led_id_t val = 0;
+
+void __led_init (led_id_t mask, int state)
+{
+ nios_pio_t *pio = (nios_pio_t *)CACHE_BYPASS(CFG_LEDPIO_ADDR);
+
+ if (state == STATUS_LED_ON)
+ val &= ~mask;
+ else
+ val |= mask;
+ pio->data = val;
+}
+
+void __led_set (led_id_t mask, int state)
+{
+ nios_pio_t *pio = (nios_pio_t *)CACHE_BYPASS(CFG_LEDPIO_ADDR);
+
+ if (state == STATUS_LED_ON)
+ val &= ~mask;
+ else
+ val |= mask;
+ pio->data = val;
+}
+
+void __led_toggle (led_id_t mask)
+{
+ nios_pio_t *pio = (nios_pio_t *)CACHE_BYPASS(CFG_LEDPIO_ADDR);
+
+ val ^= mask;
+ pio->data = val;
+}
--- /dev/null
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+int board_early_init_f (void)
+{
+ return 0;
+}
+
+int checkboard (void)
+{
+ puts ("BOARD : Psyent PK-1C20\n");
+ return 0;
+}
+
+long int initdram (int board_type)
+{
+ return (0);
+}
--- /dev/null
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+OUTPUT_FORMAT("elf32-littlenios2")
+OUTPUT_ARCH(nios2)
+ENTRY(_start)
+
+SECTIONS
+{
+ .text :
+ {
+ cpu/nios2/start.o (.text)
+ *(.text)
+ *(.text.*)
+ *(.gnu.linkonce.t*)
+ *(.rodata)
+ *(.rodata.*)
+ *(.gnu.linkonce.r*)
+ }
+ . = ALIGN (4);
+ _etext = .;
+ PROVIDE (etext = .);
+
+ /* CMD TABLE - sandwich this in between text and data so
+ * the initialization code relocates the command table as
+ * well -- admittedly, this is just pure laziness ;-)
+ */
+ __u_boot_cmd_start = .;
+ .u_boot_cmd :
+ {
+ *(.u_boot_cmd)
+ }
+ . = ALIGN(4);
+ __u_boot_cmd_end = .;
+
+ /* INIT DATA sections - "Small" data (see the gcc -G option)
+ * is always gp-relative. Here we make all init data sections
+ * adjacent to simplify the startup code -- and provide
+ * the global pointer for gp-relative access.
+ */
+ _data = .;
+ .data :
+ {
+ *(.data)
+ *(.data.*)
+ *(.gnu.linkonce.d*)
+ }
+
+ . = ALIGN(16);
+ _gp = .; /* Global pointer addr */
+ PROVIDE (gp = .);
+
+ .sdata :
+ {
+ *(.sdata)
+ *(.sdata.*)
+ *(.gnu.linkonce.s.*)
+ }
+ . = ALIGN(4);
+
+ _edata = .;
+ PROVIDE (edata = .);
+
+ /* UNINIT DATA - Small uninitialized data is first so it's
+ * adjacent to sdata and can be referenced via gp. The normal
+ * bss follows. We keep it adjacent to simplify init code.
+ */
+ __bss_start = .;
+ .sbss :
+ {
+ *(.sbss)
+ *(.sbss.*)
+ *(.gnu.linkonce.sb.*)
+ *(.scommon)
+ }
+ . = ALIGN(4);
+ .bss :
+ {
+ *(.bss)
+ *(.bss.*)
+ *(.dynbss)
+ *(COMMON)
+ *(.scommon)
+ }
+ . = ALIGN(4);
+ _end = .;
+ PROVIDE (end = .);
+
+ /* DEBUG -- symbol table, string table, etc. etc.
+ */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ .debug_info 0 : { *(.debug_info) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+}
return 0;
}
+#elif defined(CONFIG_NIOS2) /* Nios-II */
+
+int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ DECLARE_GLOBAL_DATA_PTR;
+
+ int i;
+ bd_t *bd = gd->bd;
+
+ print_num ("mem start", (ulong)bd->bi_memstart);
+ print_num ("mem size", (ulong)bd->bi_memsize);
+ print_num ("flash start", (ulong)bd->bi_flashstart);
+ print_num ("flash size", (ulong)bd->bi_flashsize);
+ print_num ("flash offset", (ulong)bd->bi_flashoffset);
+
+#if defined(CFG_SRAM_BASE)
+ print_num ("sram start", (ulong)bd->bi_sramstart);
+ print_num ("sram size", (ulong)bd->bi_sramsize);
+#endif
+
+#if defined(CFG_CMD_NET)
+ puts ("ethaddr =");
+ for (i=0; i<6; ++i) {
+ printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]);
+ }
+ puts ("\nip_addr = ");
+ print_IPaddr (bd->bi_ip_addr);
+#endif
+
+ printf ("\nbaudrate = %ld bps\n", bd->bi_baudrate);
+
+ return 0;
+}
#else /* ! PPC, which leaves MIPS */
if (hdr->ih_arch != IH_CPU_M68K)
#elif defined(__microblaze__)
if (hdr->ih_arch != IH_CPU_MICROBLAZE)
+#elif defined(__nios2__)
+ if (hdr->ih_arch != IH_CPU_NIOS2)
#else
# error Unknown CPU type
#endif
PCI_HEADER_TYPE,
&header_type);
}
-
#endif
hose->last_busno = pci_hose_scan(hose);
--- /dev/null
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(CPU).a
+
+START = start.o
+AOBJS = exceptions.o
+OBJS = cpu.o interrupts.o serial.o traps.o
+
+all: .depend $(START) $(LIB)
+
+$(LIB): $(OBJS) $(AOBJS)
+ $(AR) crv $@ $(OBJS) $(AOBJS)
+
+#########################################################################
+
+.depend: Makefile $(START:.o=.S) $(OBJS:.o=.c) $(AOBJS:.o=.S)
+ $(CC) -M $(CFLAGS) $(START:.o=.S) $(OBJS:.o=.c) $(AOBJS:.o=.S) > $@
+
+sinclude .depend
+
+#########################################################################
--- /dev/null
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+PLATFORM_RELFLAGS +=
--- /dev/null
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <nios2.h>
+#include <nios2-io.h>
+
+#if defined (CFG_NIOS_SYSID_BASE)
+#include <linux/time.h>
+static void check_sysid (void)
+{
+ struct nios_sysid_t *sysid =
+ (struct nios_sysid_t *)CACHE_BYPASS(CFG_NIOS_SYSID_BASE);
+ struct tm t;
+ char asc[32];
+
+ localtime_r ((time_t *)&sysid->timestamp, &t);
+ asctime_r (&t, asc);
+ printf ("SYSID : %08x, %s", sysid->id, asc);
+
+}
+#endif /* CFG_NIOS_SYSID_BASE */
+
+int checkcpu (void)
+{
+ printf ("CPU : Nios-II\n");
+#if !defined(CFG_NIOS_SYSID_BASE)
+ printf ("SYSID : <unknown>\n");
+#else
+ check_sysid ();
+#endif
+ return (0);
+}
+
+
+int do_reset (void)
+{
+ void (*rst)(void) = (void(*)(void))CFG_RESET_ADDR;
+ disable_interrupts ();
+ rst();
+ return(0);
+}
--- /dev/null
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <asm/opcodes.h>
+
+
+ .text
+ .align 4
+
+ .global _exception
+
+_exception:
+ /* SAVE ALL REGS -- this allows trap and unimplemented
+ * instruction handlers to be coded conveniently in C
+ */
+ addi sp, sp, -(33*4)
+ stw r0, 0(sp)
+ stw r1, 4(sp)
+ stw r2, 8(sp)
+ stw r3, 12(sp)
+ stw r4, 16(sp)
+ stw r5, 20(sp)
+ stw r6, 24(sp)
+ stw r7, 28(sp)
+ stw r8, 32(sp)
+ stw r9, 36(sp)
+ stw r10, 40(sp)
+ stw r11, 44(sp)
+ stw r12, 48(sp)
+ stw r13, 52(sp)
+ stw r14, 56(sp)
+ stw r15, 60(sp)
+ stw r16, 64(sp)
+ stw r17, 68(sp)
+ stw r19, 72(sp)
+ stw r19, 76(sp)
+ stw r20, 80(sp)
+ stw r21, 84(sp)
+ stw r22, 88(sp)
+ stw r23, 92(sp)
+ stw r24, 96(sp)
+ stw r25, 100(sp)
+ stw r26, 104(sp)
+ stw r27, 108(sp)
+ stw r28, 112(sp)
+ stw r29, 116(sp)
+ stw r30, 120(sp)
+ stw r31, 124(sp)
+ rdctl et, estatus
+ stw et, 128(sp)
+
+ /* If interrupts are disabled -- software interrupt */
+ rdctl et, estatus
+ andi et, et, 1
+ beq et, r0, 0f
+
+ /* If no interrupts are pending -- software interrupt */
+ rdctl et, ipending
+ beq et, r0, 0f
+
+ /* HARDWARE INTERRUPT: Call interrupt handler */
+ movhi r3, %hi(external_interrupt)
+ ori r3, r3, %lo(external_interrupt)
+ mov r4, sp /* ptr to regs */
+ callr r3
+
+ /* Return address fixup: execution resumes by re-issue of
+ * interrupted instruction at ea-4 (ea == r29). Here we do
+ * simple fixup to allow common exception return.
+ */
+ ldw r3, 116(sp)
+ addi r3, r3, -4
+ stw r3, 116(sp)
+ br _exception_return
+
+0:
+ /* TRAP EXCEPTION */
+ movhi r3, %hi(OPC_TRAP)
+ ori r3, r3, %lo(OPC_TRAP)
+ addi r1, ea, -4
+ ldw r1, 0(r1)
+ bne r1, r3, 1f
+ movhi r3, %hi(trap_handler)
+ ori r3, r3, %lo(trap_handler)
+ mov r4, sp /* ptr to regs */
+ callr r3
+ br _exception_return
+
+1:
+ /* UNIMPLEMENTED INSTRUCTION EXCEPTION */
+ movhi r3, %hi(soft_emulation)
+ ori r3, r3, %lo(soft_emulation)
+ mov r4, sp /* ptr to regs */
+ callr r3
+
+ /* Restore regsisters and return from exception*/
+_exception_return:
+ ldw r1, 4(sp)
+ ldw r2, 8(sp)
+ ldw r3, 12(sp)
+ ldw r4, 16(sp)
+ ldw r5, 20(sp)
+ ldw r6, 24(sp)
+ ldw r7, 28(sp)
+ ldw r8, 32(sp)
+ ldw r9, 36(sp)
+ ldw r10, 40(sp)
+ ldw r11, 44(sp)
+ ldw r12, 48(sp)
+ ldw r13, 52(sp)
+ ldw r14, 56(sp)
+ ldw r15, 60(sp)
+ ldw r16, 64(sp)
+ ldw r17, 68(sp)
+ ldw r19, 72(sp)
+ ldw r19, 76(sp)
+ ldw r20, 80(sp)
+ ldw r21, 84(sp)
+ ldw r22, 88(sp)
+ ldw r23, 92(sp)
+ ldw r24, 96(sp)
+ ldw r25, 100(sp)
+ ldw r26, 104(sp)
+ ldw r27, 108(sp)
+ ldw r28, 112(sp)
+ ldw r29, 116(sp)
+ ldw r30, 120(sp)
+ ldw r31, 124(sp)
+ addi sp, sp, (33*4)
+ eret
+/*-------------------------------------------------------------*/
--- /dev/null
+/*
+ * (C) Copyright 2000-2002
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#include <nios2.h>
+#include <nios2-io.h>
+#include <asm/ptrace.h>
+#include <common.h>
+#include <command.h>
+#include <watchdog.h>
+#ifdef CONFIG_STATUS_LED
+#include <status_led.h>
+#endif
+
+#if defined(CFG_NIOS_TMRBASE) && !defined(CFG_NIOS_TMRIRQ)
+#error CFG_NIOS_TMRIRQ not defined (see documentation)
+#endif
+
+/****************************************************************************/
+
+struct irq_action {
+ interrupt_handler_t *handler;
+ void *arg;
+ int count;
+};
+
+static struct irq_action vecs[32];
+
+/*************************************************************************/
+volatile ulong timestamp = 0;
+
+void reset_timer (void)
+{
+ timestamp = 0;
+}
+
+ulong get_timer (ulong base)
+{
+ WATCHDOG_RESET ();
+ return (timestamp - base);
+}
+
+void set_timer (ulong t)
+{
+ timestamp = t;
+}
+
+
+/* The board must handle this interrupt if a timer is not
+ * provided.
+ */
+#if defined(CFG_NIOS_TMRBASE)
+void tmr_isr (void *arg)
+{
+ nios_timer_t *tmr = (nios_timer_t *)arg;
+ /* Interrupt is cleared by writing anything to the
+ * status register.
+ */
+ tmr->status = 0;
+ timestamp += CFG_NIOS_TMRMS;
+#ifdef CONFIG_STATUS_LED
+ status_led_tick(timestamp);
+#endif
+}
+
+static void tmr_init (void)
+{
+ nios_timer_t *tmr =(nios_timer_t *)CACHE_BYPASS(CFG_NIOS_TMRBASE);
+
+ tmr->control &= ~(NIOS_TIMER_START | NIOS_TIMER_ITO);
+ tmr->control |= NIOS_TIMER_STOP;
+#if defined(CFG_NIOS_TMRCNT)
+ tmr->periodl = CFG_NIOS_TMRCNT & 0xffff;
+ tmr->periodh = (CFG_NIOS_TMRCNT >> 16) & 0xffff;
+#endif
+ tmr->control |= ( NIOS_TIMER_ITO |
+ NIOS_TIMER_CONT |
+ NIOS_TIMER_START );
+ irq_install_handler (CFG_NIOS_TMRIRQ, tmr_isr, (void *)tmr);
+}
+
+#endif /* CFG_NIOS_TMRBASE */
+
+/*************************************************************************/
+int disable_interrupts (void)
+{
+ int val = rdctl (CTL_STATUS);
+ wrctl (CTL_STATUS, val & ~STATUS_IE);
+ return (val & STATUS_IE);
+}
+
+void enable_interrupts( void )
+{
+ int val = rdctl (CTL_STATUS);
+ wrctl (CTL_STATUS, val | STATUS_IE);
+}
+
+void external_interrupt (struct pt_regs *regs)
+{
+ unsigned irqs;
+ struct irq_action *act;
+
+ /* Evaluate only irqs that are both enabled AND pending */
+ irqs = rdctl (CTL_IENABLE) & rdctl (CTL_IPENDING);
+ act = vecs;
+
+ /* Assume (as does the Nios2 HAL) that bit 0 is highest
+ * priority. NOTE: There is ALWAYS a handler assigned
+ * (the default if no other).
+ */
+ while (irqs) {
+ if (irqs & 1) {
+ act->handler (act->arg);
+ act->count++;
+ }
+ irqs >>=1;
+ act++;
+ }
+}
+
+static void def_hdlr (void *arg)
+{
+ unsigned irqs = rdctl (CTL_IENABLE);
+
+ /* Disable the individual interrupt -- with gratuitous
+ * warning.
+ */
+ irqs &= ~(1 << (int)arg);
+ wrctl (CTL_IENABLE, irqs);
+ printf ("WARNING: Disabling unhandled interrupt: %d\n",
+ (int)arg);
+}
+
+/*************************************************************************/
+void irq_install_handler (int irq, interrupt_handler_t *hdlr, void *arg)
+{
+
+ int flag;
+ struct irq_action *act;
+ unsigned ena = rdctl (CTL_IENABLE);
+
+ if ((irq < 0) || (irq > 31))
+ return;
+ act = &vecs[irq];
+
+ flag = disable_interrupts ();
+ if (hdlr) {
+ act->handler = hdlr;
+ act->arg = arg;
+ ena |= (1 << irq); /* enable */
+ } else {
+ act->handler = def_hdlr;
+ act->arg = (void *)irq;
+ ena &= ~(1 << irq); /* disable */
+ }
+ wrctl (CTL_IENABLE, ena);
+ if (flag) enable_interrupts ();
+}
+
+
+int interrupt_init (void)
+{
+ int i;
+
+ /* Assign the default handler to all */
+ for (i = 0; i < 32; i++) {
+ vecs[i].handler = def_hdlr;
+ vecs[i].arg = (void *)i;
+ vecs[i].count = 0;
+ }
+
+#if defined(CFG_NIOS_TMRBASE)
+ tmr_init ();
+#endif
+
+ enable_interrupts ();
+ return (0);
+}
+
+
+/*************************************************************************/
+#if (CONFIG_COMMANDS & CFG_CMD_IRQ)
+int do_irqinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ int i;
+ struct irq_action *act = vecs;
+
+ printf ("\nInterrupt-Information:\n\n");
+ printf ("Nr Routine Arg Count\n");
+ printf ("-----------------------------\n");
+
+ for (i=0; i<32; i++) {
+ if (act->handler != def_hdlr) {
+ printf ("%02d %08lx %08lx %d\n",
+ i,
+ (ulong)act->handler,
+ (ulong)act->arg,
+ act->count);
+ }
+ act++;
+ }
+ printf ("\n");
+
+ return (0);
+}
+#endif /* CONFIG_COMMANDS & CFG_CMD_IRQ */
--- /dev/null
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#include <common.h>
+#include <watchdog.h>
+#include <nios2.h>
+#include <nios2-io.h>
+
+/*------------------------------------------------------------------
+ * JTAG acts as the serial port
+ *-----------------------------------------------------------------*/
+#if defined(CONFIG_CONSOLE_JTAG)
+
+static nios_jtag_t *jtag =
+ (nios_jtag_t *)CACHE_BYPASS(CFG_NIOS_CONSOLE);
+
+void serial_setbrg( void ){ return; }
+int serial_init( void ) { return(0);}
+
+void serial_putc (char c)
+{
+ unsigned val;
+
+ while (NIOS_JTAG_WSPACE (jtag->control) == 0)
+ WATCHDOG_RESET ();
+ jtag->data = (unsigned char)c;
+}
+
+void serial_puts (const char *s)
+{
+ while (*s != 0)
+ serial_putc (*s++);
+}
+
+int serial_tstc (void)
+{
+ return (jtag->control & NIOS_JTAG_RRDY);
+}
+
+int serial_getc (void)
+{
+ int c;
+ unsigned val;
+
+ while (1) {
+ WATCHDOG_RESET ();
+ val = jtag->data;
+ if (val & NIOS_JTAG_RVALID)
+ break;
+ }
+ c = val & 0x0ff;
+ return (c);
+}
+
+/*------------------------------------------------------------------
+ * UART the serial port
+ *-----------------------------------------------------------------*/
+#else
+
+static nios_uart_t *uart = (nios_uart_t *)
+ CACHE_BYPASS(CFG_NIOS_CONSOLE);
+
+#if defined(CFG_NIOS_FIXEDBAUD)
+
+/* Everything's already setup for fixed-baud PTF
+ * assignment
+ */
+void serial_setbrg (void){ return; }
+int serial_init (void) { return (0);}
+
+#else
+
+void serial_setbrg (void)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+ unsigned div;
+
+ div = (CONFIG_SYS_CLK_FREQ/gd->baudrate)-1;
+ uart->divisor = div;
+ return;
+}
+
+int serial_init (void)
+{
+ serial_setbrg ();
+ return (0);
+}
+
+#endif /* CFG_NIOS_FIXEDBAUD */
+
+
+/*-----------------------------------------------------------------------
+ * UART CONSOLE
+ *---------------------------------------------------------------------*/
+void serial_putc (char c)
+{
+ if (c == '\n')
+ serial_putc ('\r');
+ while ((uart->status & NIOS_UART_TRDY) == 0)
+ WATCHDOG_RESET ();
+ uart->txdata = (unsigned char)c;
+}
+
+void serial_puts (const char *s)
+{
+ while (*s != 0) {
+ serial_putc (*s++);
+ }
+}
+
+int serial_tstc (void)
+{
+ return (uart->status & NIOS_UART_RRDY);
+}
+
+int serial_getc (void)
+{
+ while (serial_tstc () == 0)
+ WATCHDOG_RESET ();
+ return( uart->rxdata & 0x00ff );
+}
+
+#endif /* CONFIG_JTAG_CONSOLE */
--- /dev/null
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#include <config.h>
+#include <version.h>
+
+/*************************************************************************
+ * RESTART
+ ************************************************************************/
+
+ .text
+ .global _start
+
+_start:
+ /* ICACHE INIT -- only the icache line at the reset address
+ * is invalidated at reset. So the init must stay within
+ * the cache line size (8 words). If GERMS is used, we'll
+ * just be invalidating the cache a second time. If cache
+ * is not implemented initi behaves as nop.
+ */
+ movhi r4, %hi(CFG_ICACHELINE_SIZE)
+ ori r4, r4, %lo(CFG_ICACHELINE_SIZE)
+ movhi r5, %hi(CFG_ICACHE_SIZE)
+ ori r5, r5, %lo(CFG_ICACHE_SIZE)
+ mov r6, r0
+0: initi r6
+ add r6, r6, r4
+ bltu r6, r5, 0b
+
+ /* INTERRUPTS -- for now, all interrupts masked and globally
+ * disabled.
+ */
+ wrctl status, r0 /* Disable interrupts */
+ wrctl ienable, r0 /* All disabled */
+
+ /* DCACHE INIT -- if dcache not implemented, initd behaves as
+ * nop.
+ */
+ movhi r4, %hi(CFG_DCACHELINE_SIZE)
+ ori r4, r4, %lo(CFG_DCACHELINE_SIZE)
+ movhi r5, %hi(CFG_DCACHE_SIZE)
+ ori r5, r5, %lo(CFG_DCACHE_SIZE)
+ mov r6, r0
+1: initd 0(r6)
+ add r6, r6, r4
+ bltu r6, r5, 1b
+
+ /* RELOCATE CODE, DATA & COMMAND TABLE -- the following code
+ * assumes code, data and the command table are all
+ * contiguous. This lets us relocate everything as a single
+ * block. Make sure the linker script matches this ;-)
+ */
+ nextpc r4
+_cur: movhi r5, %hi(_cur - _start)
+ ori r5, r5, %lo(_cur - _start)
+ sub r4, r4, r5 /* r4 <- cur _start */
+ mov r8, r4
+ movhi r5, %hi(_start)
+ ori r5, r5, %lo(_start) /* r5 <- linked _start */
+ beq r4, r5, 3f
+
+ movhi r6, %hi(_edata)
+ ori r6, r6, %lo(_edata)
+2: ldwio r7, 0(r4)
+ addi r4, r4, 4
+ stwio r7, 0(r5)
+ addi r5, r5, 4
+ bne r5, r6, 2b
+3:
+
+ /* ZERO BSS/SBSS -- bss and sbss are assumed to be adjacent
+ * and between __bss_start and _end.
+ */
+ movhi r5, %hi(__bss_start)
+ ori r5, r5, %lo(__bss_start)
+ movhi r6, %hi(_end)
+ ori r6, r6, %lo(_end)
+ beq r5, r6, 5f
+
+4: stwio r0, 0(r5)
+ addi r5, r5, 4
+ bne r5, r6, 4b
+5:
+
+ /* GLOBAL POINTER -- the global pointer is used to reference
+ * "small data" (see -G switch). The linker script must
+ * provide the gp address.
+ */
+ movhi gp, %hi(_gp)
+ ori gp, gp, %lo(_gp)
+
+ /* JUMP TO RELOC ADDR */
+ movhi r4, %hi(_reloc)
+ ori r4, r4, %lo(_reloc)
+ jmp r4
+_reloc:
+
+ /* COPY EXCEPTION TRAMPOLINE -- copy the tramp to the
+ * exception address.
+ */
+#if !defined(CONFIG_ROM_STUBS)
+ movhi r4, %hi(_except_start)
+ ori r4, r4, %lo(_except_start)
+ movhi r5, %hi(_except_end)
+ ori r5, r5, %lo(_except_end)
+ movhi r6, %hi(CFG_EXCEPTION_ADDR)
+ ori r6, r6, %lo(CFG_EXCEPTION_ADDR)
+
+6: ldwio r7, 0(r4)
+ stwio r7, 0(r6)
+ addi r4, r4, 4
+ addi r6, r6, 4
+ bne r4, r5, 6b
+#endif
+
+ /* STACK INIT -- zero top two words for call back chain.
+ */
+ movhi sp, %hi(CFG_INIT_SP)
+ ori sp, sp, %lo(CFG_INIT_SP)
+ addi sp, sp, -8
+ stw r0, 0(sp)
+ stw r0, 4(sp)
+ mov fp, sp
+
+ /*
+ * Call board_init -- never returns
+ */
+ movhi r4, %hi(board_init@h)
+ ori r4, r4, %lo(board_init@h)
+ callr r4
+
+ /* NEVER RETURNS -- but branch to the _start just
+ * in case ;-)
+ */
+ br _start
+
+ /* EXCEPTION TRAMPOLINE -- the following gets copied
+ * to the exception address.
+ */
+_except_start:
+ movhi et, %hi(_exception)
+ ori et, et, %lo(_exception)
+ jmp et
+_except_end:
+
+
+/*
+ * dly_clks -- Nios2 (like Nios1) doesn't have a timebase in
+ * the core. For simple delay loops, we do our best by counting
+ * instruction cycles.
+ *
+ * Instruction performance varies based on the core. For cores
+ * with icache and static/dynamic branch prediction (II/f, II/s):
+ *
+ * Normal ALU (e.g. add, cmp, etc): 1 cycle
+ * Branch (correctly predicted, taken): 2 cycles
+ * Negative offset is predicted (II/s).
+ *
+ * For cores without icache and no branch prediction (II/e):
+ *
+ * Normal ALU (e.g. add, cmp, etc): 6 cycles
+ * Branch (no prediction): 6 cycles
+ *
+ * For simplicity, if an instruction cache is implemented we
+ * assume II/f or II/s. Otherwise, we use the II/e.
+ *
+ */
+ .globl dly_clks
+
+dly_clks:
+
+#if (CFG_ICACHE_SIZE > 0)
+ subi r4, r4, 3 /* 3 clocks/loop */
+#else
+ subi r4, r4, 12 /* 12 clocks/loop */
+#endif
+ bge r4, r0, dly_clks
+ ret
+
+
+#if !defined(CONFIG_IDENT_STRING)
+#define CONFIG_IDENT_STRING ""
+#endif
+ .data
+ .globl version_string
+
+version_string:
+ .ascii U_BOOT_VERSION
+ .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii CONFIG_IDENT_STRING, "\0"
--- /dev/null
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <asm/ptrace.h>
+#include <common.h>
+
+void trap_handler (struct pt_regs *regs)
+{
+ /* Just issue warning */
+ printf ("\n\n*** WARNING: unimplemented trap @ %08x\n\n",
+ regs->reg[29] - 4);
+}
+
+void soft_emulation (struct pt_regs *regs)
+{
+ /* TODO: Software emulation of mul/div etc. Until this is
+ * implemented, generate warning and hang.
+ */
+ printf ("\n\n*** ERROR: unimplemented instruction @ %08x\n",
+ regs->reg[29] - 4);
+ hang ();
+}
and a CPU daughter card that bolts onto the daughter card.
Much of the content of the README.mpc85xxads for the 85xx ADS boards
-applies to the 85xx CDS boards as well. In particular the toolchain,
+applies to the 85xx CDS boards as well. In particular the toolchain,
the switch nomenclature, and the basis for the memory map. There are
some differences, though.
The mapping is:
- 0x0000_0000 0x7fff_ffff DDR 2G
- 0x8000_0000 0x9fff_ffff PCI1 MEM 512M
- 0xa000_0000 0xbfff_ffff PCI2 MEM 512M
- 0xe000_0000 0xe00f_ffff CCSR 1M
- 0xe200_0000 0xe2ff_ffff PCI1 IO 16M
- 0xe300_0000 0xe3ff_ffff PCI2 IO 16M
- 0xf000_0000 0xf7ff_ffff SDRAM 128M
- 0xf800_0000 0xf80f_ffff NVRAM/CADMUS (*) 1M
- 0xff00_0000 0xff7f_ffff FLASH (2nd bank) 8M
- 0xff80_0000 0xffff_ffff FLASH (boot bank) 8M
+ 0x0000_0000 0x7fff_ffff DDR 2G
+ 0x8000_0000 0x9fff_ffff PCI1 MEM 512M
+ 0xa000_0000 0xbfff_ffff PCI2 MEM 512M
+ 0xe000_0000 0xe00f_ffff CCSR 1M
+ 0xe200_0000 0xe2ff_ffff PCI1 IO 16M
+ 0xe300_0000 0xe3ff_ffff PCI2 IO 16M
+ 0xf000_0000 0xf7ff_ffff SDRAM 128M
+ 0xf800_0000 0xf80f_ffff NVRAM/CADMUS (*) 1M
+ 0xff00_0000 0xff7f_ffff FLASH (2nd bank) 8M
+ 0xff80_0000 0xffff_ffff FLASH (boot bank) 8M
(*) The system control registers (CADMUS) start at offset 0xfdb0_4000
within the NVRAM/CADMUS region of memory.
loadb
[Drop to kermit:
- ^\c
- send <u-boot-bin-image>
- c
+ ^\c
+ send <u-boot-bin-image>
+ c
]
erase ff780000 ff7fffff
12345678
--------
- SW2=00XXXXXX FLASH: Boot bank 1, bank 2 available.
- 01XXXXXX FLASH: Boot bank 2, bank 1 available (swapped).
- 10XXXXXX FLASH: Boot promjet, bank 1 available
- 11XXXXXX FLASH: Boot promjet, bank 2 available
+ SW2=00XXXXXX FLASH: Boot bank 1, bank 2 available.
+ 01XXXXXX FLASH: Boot bank 2, bank 1 available (swapped).
+ 10XXXXXX FLASH: Boot promjet, bank 1 available
+ 11XXXXXX FLASH: Boot promjet, bank 2 available
The boot bank is always mapped to FF80_0000 and listed first by
the "flinfo" command. The secondary bank is always FF00_0000.
12345678
--------
- SW2=xxxxxx00 PCI SLOT INFORM: The CDS carrier is in slot0 of the Arcadia
- xxxxxx01 PCI SLOT INFORM: The CDS carrier is in slot1 of the Arcadia
- xxxxxx10 PCI SLOT INFORM: The CDS carrier is in slot2 of the Arcadia
- xxxxxx11 PCI SLOT INFORM: The CDS carrier is in slot3 of the Arcadia
+ SW2=xxxxxx00 PCI SLOT INFORM: The CDS carrier is in slot0 of the Arcadia
+ xxxxxx01 PCI SLOT INFORM: The CDS carrier is in slot1 of the Arcadia
+ xxxxxx10 PCI SLOT INFORM: The CDS carrier is in slot2 of the Arcadia
+ xxxxxx11 PCI SLOT INFORM: The CDS carrier is in slot3 of the Arcadia
These are cleverly, er, clearly silkscreened as Slot 1 through 4,
respectively, on the Arcadia near the support posts.
12345678
--------
SW1=01101100
- SW2=0x1111yy x=Flash bank, yy=PCI slot
+ SW2=0x1111yy x=Flash bank, yy=PCI slot
SW3=11101111
SW4=10001000
time -s 4/8/2004 4:30p
dl -k -b -o 100000
[Drop to kermit:
- ^\c
- transmit /binary <u-boot-bin-image>
- c
+ ^\c
+ transmit /binary <u-boot-bin-image>
+ c
]
fu -l 100000 fe780000 80000
-
LOAD_ADDR = 0x00800000 -L $(gcclibdir)/m32 -T nios.lds
endif
+ifeq ($(ARCH),nios2)
+LOAD_ADDR = 0x00800000 -L $(gcclibdir) -T nios2.lds
+endif
+
ifeq ($(ARCH),m68k)
LOAD_ADDR = 0x20000 -L $(clibdir)
endif
--- /dev/null
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+OUTPUT_FORMAT("elf32-littlenios2")
+OUTPUT_ARCH(nios2)
+ENTRY(_start)
+
+SECTIONS
+{
+ .text :
+ {
+ *(.text)
+ *(.text.*)
+ *(.gnu.linkonce.t*)
+ *(.rodata)
+ *(.rodata.*)
+ *(.gnu.linkonce.r*)
+ }
+ . = ALIGN (4);
+ _etext = .;
+ PROVIDE (etext = .);
+
+ /* INIT DATA sections - "Small" data (see the gcc -G option)
+ * is always gp-relative. Here we make all init data sections
+ * adjacent to simplify the startup code -- and provide
+ * the global pointer for gp-relative access.
+ */
+ _data = .;
+ .data :
+ {
+ *(.data)
+ *(.data.*)
+ *(.gnu.linkonce.d*)
+ }
+
+ . = ALIGN(16);
+ _gp = .; /* Global pointer addr */
+ PROVIDE (gp = .);
+
+ .sdata :
+ {
+ *(.sdata)
+ *(.sdata.*)
+ *(.gnu.linkonce.s.*)
+ }
+ . = ALIGN(4);
+
+ _edata = .;
+ PROVIDE (edata = .);
+
+ /* UNINIT DATA - Small uninitialized data is first so it's
+ * adjacent to sdata and can be referenced via gp. The normal
+ * bss follows. We keep it adjacent to simplify init code.
+ */
+ __bss_start = .;
+ .sbss :
+ {
+ *(.sbss)
+ *(.sbss.*)
+ *(.gnu.linkonce.sb.*)
+ *(.scommon)
+ }
+ . = ALIGN(4);
+ .bss :
+ {
+ *(.bss)
+ *(.bss.*)
+ *(.dynbss)
+ *(COMMON)
+ *(.scommon)
+ }
+ . = ALIGN(4);
+ _end = .;
+ PROVIDE (end = .);
+
+ /* CMD TABLE - uboot command sections
+ */
+ __uboot_cmd_start = .;
+ .u_boot_cmd :
+ {
+ *(.u_boot_cmd)
+ }
+ . = ALIGN(4);
+ __u_boot_cmd_end = .;
+
+ /* DEBUG -- symbol table, string table, etc. etc.
+ */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ .debug_info 0 : { *(.debug_info) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+}
" jmp %%g0\n" \
" nop \n" \
: : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x) : "r0");
+#elif defined(CONFIG_NIOS2)
+/*
+ * r15 holds the pointer to the global_data, r8 is call-clobbered
+ */
+#define EXPORT_FUNC(x) \
+ asm volatile ( \
+" .globl " #x "\n" \
+#x ":\n" \
+" movhi r8, %%hi(%0)\n" \
+" ori r8, r0, %%lo(%0)\n" \
+" add r8, r0, r15\n" \
+" ldw r8, 0(r8)\n" \
+" ldw r8, %1(r8)\n" \
+" jmp r8\n" \
+ : : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x * sizeof(void *)) : "r15");
#elif defined(CONFIG_M68K)
/*
* d7 holds the pointer to the global_data, a0 is a call-clobbered
--- /dev/null
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __ASM_NIOS2_BITOPS_H_
+#define __ASM_NIOS2_BITOPS_H_
+
+
+extern void set_bit(int nr, volatile void * a);
+extern void clear_bit(int nr, volatile void * a);
+extern int test_and_clear_bit(int nr, volatile void * a);
+extern void change_bit(unsigned long nr, volatile void *addr);
+extern int test_and_set_bit(int nr, volatile void * a);
+extern int test_and_change_bit(int nr, volatile void * addr);
+extern int test_bit(int nr, volatile void * a);
+extern int ffs(int i);
+
+#endif /* __ASM_NIOS2_BITOPS_H */
--- /dev/null
+/*
+* (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+* Scott McNutt <smcnutt@psyent.com>
+*
+* See file CREDITS for list of people who contributed to this
+* project.
+*
+* This program is free software; you can redistribute it and/or
+* modify it under the terms of the GNU General Public License as
+* published by the Free Software Foundation; either version 2 of
+* the License, or (at your option) any later version.
+*
+* This program is distributed in the hope that it will be useful,
+* but WITHOUT ANY WARRANTY; without even the implied warranty of
+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+* GNU General Public License for more details.
+*
+* You should have received a copy of the GNU General Public License
+* along with this program; if not, write to the Free Software
+* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+* MA 02111-1307 USA
+*/
+
+#ifndef __ASM_NIOS2_BYTEORDER_H_
+#define __ASM_NIOS2_BYTEORDER_H_
+
+#include <asm/types.h>
+#include <linux/byteorder/little_endian.h>
+
+#endif /* __ASM_NIOS2_BYTEORDER_H_ */
--- /dev/null
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __ASM_NIOS2_CACHE_H_
+#define __ASM_NIOS2_CACHE_H_
+
+extern void flush_dcache (unsigned long start, unsigned long size);
+extern void flush_icache (unsigned long start, unsigned long size);
+
+#endif /* __ASM_NIOS2_CACHE_H_ */
--- /dev/null
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef __ASM_NIOS2_GLOBALDATA_H_
+#define __ASM_NIOS2_GLOBALDATA_H_
+
+typedef struct global_data {
+ bd_t *bd;
+ unsigned long flags;
+ unsigned long baudrate;
+ unsigned long cpu_clk; /* CPU clock in Hz! */
+ unsigned long have_console; /* serial_init() was called */
+ unsigned long ram_size; /* RAM size */
+ unsigned long reloc_off; /* Relocation Offset */
+ unsigned long env_addr; /* Address of Environment struct */
+ unsigned long env_valid; /* Checksum of Environment valid */
+#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
+ unsigned long post_log_word; /* Record POST activities */
+ unsigned long post_init_f_time; /* When post_init_f started */
+#endif
+ void **jt; /* Standalone app jump table */
+} gd_t;
+
+/* flags */
+#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
+#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
+#define GD_FLG_SILENT 0x00004 /* Silent mode */
+
+#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("r15")
+
+#endif /* __ASM_NIOS2_GLOBALDATA_H_ */
--- /dev/null
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __ASM_NIOS2_IO_H_
+#define __ASM_NIOS2_IO_H_
+
+#define sync() asm volatile ("sync" : : : "memory");
+
+extern unsigned char inb (unsigned char *port);
+extern unsigned short inw (unsigned short *port);
+extern unsigned inl (unsigned port);
+extern void outb (unsigned char val, unsigned char *port);
+extern void outw (unsigned short val, unsigned short *port);
+extern void outl (unsigned val, unsigned port);
+
+#endif /* __ASM_NIOS2_IO_H_ */
--- /dev/null
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __ASM_NIOS2_OPCODES_H_
+#define __ASM_NIOS2_OPCODES_H_
+
+#define OPCODE_OP(inst) ((inst) & 0x3f)
+#define OPCODE_OPX(inst) (((inst)>>11) & 0x3f)
+#define OPCODE_RA(inst) (((inst)>>27) & 01f)
+#define OPCODE_RB(inst) (((inst)>>22) & 01f)
+#define OPCODE_RC(inst) (((inst)>>17) & 01f)
+
+/* I-TYPE (immediate) and J-TYPE (jump) opcodes
+ */
+#define OPCODE_CALL 0x00
+#define OPCODE_LDBU 0x03
+#define OPCODE_ADDI 0x04
+#define OPCODE_STB 0x05
+#define OPCODE_BR 0x06
+#define OPCODE_LDB 0x07
+#define OPCODE_CMPGEI 0x08
+#define OPCODE_LDHU 0x0B
+#define OPCODE_ANDI 0x0C
+#define OPCODE_STH 0x0D
+#define OPCODE_BGE 0x0E
+#define OPCODE_LDH 0x0F
+#define OPCODE_CMPLTI 0x10
+#define OPCODE_XORI 0x1C
+#define OPCODE_ORI 0x14
+#define OPCODE_STW 0x15
+#define OPCODE_BLT 0x16
+#define OPCODE_LDW 0x17
+#define OPCODE_CMPNEI 0x18
+#define OPCODE_BNE 0x1E
+#define OPCODE_CMPEQI 0x20
+#define OPCODE_LDBUIO 0x23
+#define OPCODE_MULI 0x24
+#define OPCODE_STBIO 0x25
+#define OPCODE_BEQ 0x26
+#define OPCODE_LDBIO 0x27
+#define OPCODE_CMPGEUI 0x28
+#define OPCODE_ANDHI 0x2C
+#define OPCODE_STHIO 0x2D
+#define OPCODE_BGEU 0x2E
+#define OPCODE_LDHIO 0x2F
+#define OPCODE_CMPLTUI 0x30
+#define OPCODE_CUSTOM 0x32
+#define OPCODE_INITD 0x33
+#define OPCODE_ORHI 0x34
+#define OPCODE_STWIO 0x35
+#define OPCODE_BLTU 0x36
+#define OPCODE_LDWIO 0x37
+#define OPCODE_RTYPE 0x3A
+#define OPCODE_LDHUIO 0x2B
+#define OPCODE_FLUSHD 0x3B
+#define OPCODE_XORHI 0x3C
+
+/* R-Type (register) OPX field encodings
+ */
+#define OPCODE_ERET 0x01
+#define OPCODE_ROLI 0x02
+#define OPCODE_ROL 0x03
+#define OPCODE_FLUSHP 0x04
+#define OPCODE_RET 0x05
+#define OPCODE_NOR 0x06
+#define OPCODE_MULXUU 0x07
+#define OPCODE_CMPGE 0x08
+#define OPCODE_BRET 0x09
+#define OPCODE_ROR 0x0B
+#define OPCODE_FLUSHI 0x0C
+#define OPCODE_JMP 0x0D
+#define OPCODE_AND 0x0E
+
+#define OPCODE_CMPLT 0x10
+#define OPCODE_SLLI 0x12
+#define OPCODE_SLL 0x13
+#define OPCODE_OR 0x16
+#define OPCODE_MULXSU 0x17
+#define OPCODE_CMPNE 0x18
+#define OPCODE_SRLI 0x1A
+#define OPCODE_SRL 0x1B
+#define OPCODE_NEXTPC 0x1C
+#define OPCODE_CALLR 0x1D
+#define OPCODE_XOR 0x1E
+#define OPCODE_MULXSS 0x1F
+
+#define OPCODE_CMPEQ 0x20
+#define OPCODE_CMPLTU 0x30
+#define OPCODE_ADD 0x31
+#define OPCODE_DIVU 0x24
+#define OPCODE_DIV 0x25
+#define OPCODE_RDCTL 0x26
+#define OPCODE_MUL 0x27
+#define OPCODE_CMPGEU 0x28
+#define OPCODE_TRAP 0x2D
+#define OPCODE_WRCTL 0x2E
+
+#define OPCODE_BREAK 0x34
+#define OPCODE_SYNC 0x36
+#define OPCODE_INITI 0x29
+#define OPCODE_SUB 0x39
+#define OPCODE_SRAI 0x3A
+#define OPCODE_SRA 0x3B
+
+/*Full instruction encodings for R-Type, without the R's ;-)
+ *
+ * TODO: BREAK, BRET, ERET, RET, SYNC (as needed)
+ */
+#define OPC_TRAP 0x003b683a
+
+#endif /* __ASM_NIOS2_OPCODES_H_ */
--- /dev/null
+#ifndef __ASM_NIOS2_POSIX_TYPES_H_
+#define __ASM_NIOS2_POSIX_TYPES_H_
+
+/*
+ * This file is generally used by user-level software, so you need to
+ * be a little careful about namespace pollution etc. Also, we cannot
+ * assume GCC is being used.
+ */
+
+typedef unsigned short __kernel_dev_t;
+typedef unsigned long __kernel_ino_t;
+typedef unsigned short __kernel_mode_t;
+typedef unsigned short __kernel_nlink_t;
+typedef long __kernel_off_t;
+typedef int __kernel_pid_t;
+typedef unsigned short __kernel_ipc_pid_t;
+typedef unsigned short __kernel_uid_t;
+typedef unsigned short __kernel_gid_t;
+typedef unsigned long __kernel_size_t;
+typedef int __kernel_ssize_t;
+typedef int __kernel_ptrdiff_t;
+typedef long __kernel_time_t;
+typedef long __kernel_suseconds_t;
+typedef long __kernel_clock_t;
+typedef int __kernel_daddr_t;
+typedef char * __kernel_caddr_t;
+typedef unsigned short __kernel_uid16_t;
+typedef unsigned short __kernel_gid16_t;
+typedef unsigned int __kernel_uid32_t;
+typedef unsigned int __kernel_gid32_t;
+
+typedef unsigned short __kernel_old_uid_t;
+typedef unsigned short __kernel_old_gid_t;
+
+#ifdef __GNUC__
+typedef long long __kernel_loff_t;
+#endif
+
+typedef struct {
+#if defined(__KERNEL__) || defined(__USE_ALL)
+ int val[2];
+#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
+ int __val[2];
+#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
+} __kernel_fsid_t;
+
+#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
+
+#undef __FD_SET
+#define __FD_SET(d, set) ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d))
+
+#undef __FD_CLR
+#define __FD_CLR(d, set) ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d))
+
+#undef __FD_ISSET
+#define __FD_ISSET(d, set) ((set)->fds_bits[__FDELT(d)] & __FDMASK(d))
+
+#undef __FD_ZERO
+#define __FD_ZERO(fdsetp) (memset (fdsetp, 0, sizeof(*(fd_set *)fdsetp)))
+
+#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */
+
+#endif /* __ASM_NIOS2_POSIX_TYPES_H_ */
--- /dev/null
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __ASM_NIOS2_PROCESSOR_H_
+#define __ASM_NIOS2_PROCESSOR_H_
+#endif /* __ASM_NIOS2_PROCESSOR_H_ */
--- /dev/null
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __ASM_NIOS2_PSR_H_
+#define __ASM_NIOS2_PSR_H_
+
+
+#endif /* __ASM_NIOS2_PSR_H_ */
--- /dev/null
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __ASM_NIOS2_PTRACE_H_
+#define __ASM_NIOS2_PTRACE_H_
+
+struct pt_regs {
+ unsigned reg[32];
+ unsigned status;
+};
+
+
+#endif /* __ASM_NIOS2_PTRACE_H_ */
--- /dev/null
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef __ASM_STATUS_LED_H__
+#define __ASM_STATUS_LED_H__
+
+typedef unsigned led_id_t;
+extern void __led_init (led_id_t mask, int state);
+extern void __led_set (led_id_t mask, int state);
+inline void __led_toggle (led_id_t mask);
+
+#endif /* __ASM_STATUS_LED_H__ */
--- /dev/null
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef __ASM_NIOS2_STRING_H_
+#define __ASM_NIOS2_STRING_H_
+
+#undef __HAVE_ARCH_STRRCHR
+extern char * strrchr(const char * s, int c);
+
+#undef __HAVE_ARCH_STRCHR
+extern char * strchr(const char * s, int c);
+
+#undef __HAVE_ARCH_MEMCPY
+extern void * memcpy(void *, const void *, __kernel_size_t);
+
+#undef __HAVE_ARCH_MEMMOVE
+extern void * memmove(void *, const void *, __kernel_size_t);
+
+#undef __HAVE_ARCH_MEMCHR
+extern void * memchr(const void *, int, __kernel_size_t);
+
+#undef __HAVE_ARCH_MEMSET
+extern void * memset(void *, int, __kernel_size_t);
+
+#undef __HAVE_ARCH_MEMZERO
+extern void memzero(void *ptr, __kernel_size_t n);
+
+#endif /* __ASM_NIOS2_STRING_H_ */
--- /dev/null
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef __ASM_NIOS2_SYSTEM_H_
+#define __ASM_NIOS2_SYSTEM_H_
+
+#endif /* __ASM_NIOS2_SYSTEM_H */
--- /dev/null
+#ifndef __ASM_NIOS2_TYPES_H_
+#define __ASM_NIOS2_TYPES_H_
+
+/*
+ * This file is never included by application software unless
+ * explicitly requested (e.g., via linux/types.h) in which case the
+ * application is Linux specific so (user-) name space pollution is
+ * not a major issue. However, for interoperability, libraries still
+ * need to be careful to avoid a name clashes.
+ */
+
+typedef unsigned short umode_t;
+
+/*
+ * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
+ * header files exported to user space
+ */
+
+typedef __signed__ char __s8;
+typedef unsigned char __u8;
+
+typedef __signed__ short __s16;
+typedef unsigned short __u16;
+
+typedef __signed__ int __s32;
+typedef unsigned int __u32;
+
+#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
+typedef __signed__ long long __s64;
+typedef unsigned long long __u64;
+#endif
+
+/*
+ * These aren't exported outside the kernel to avoid name space clashes
+ */
+#ifdef __KERNEL__
+
+typedef signed char s8;
+typedef unsigned char u8;
+
+typedef signed short s16;
+typedef unsigned short u16;
+
+typedef signed int s32;
+typedef unsigned int u32;
+
+typedef signed long long s64;
+typedef unsigned long long u64;
+
+#define BITS_PER_LONG 32
+
+/* Dma addresses are 32-bits wide. */
+
+typedef u32 dma_addr_t;
+#endif /* __KERNEL__ */
+
+#endif /* __ASM_NIOS2_TYPES_H */
--- /dev/null
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __ASM_NIOS2_U_BOOT_H_
+#define __ASM_NIOS2_U_BOOT_H_
+
+typedef struct bd_info {
+ unsigned long bi_memstart; /* start of DRAM memory */
+ unsigned long bi_memsize; /* size of DRAM memory in bytes */
+ unsigned long bi_flashstart; /* start of FLASH memory */
+ unsigned long bi_flashsize; /* size of FLASH memory */
+ unsigned long bi_flashoffset; /* reserved area for startup monitor */
+ unsigned long bi_sramstart; /* start of SRAM memory */
+ unsigned long bi_sramsize; /* size of SRAM memory */
+ unsigned long bi_ip_addr; /* IP Address */
+ unsigned char bi_enetaddr[6]; /* Ethernet adress */
+ unsigned long bi_baudrate; /* Console Baudrate */
+} bd_t;
+
+
+#endif /* __ASM_NIOS2_U_BOOT_H_ */
* Please refer to doc/README.mpc85xxcds for more info.
*
*/
-
#ifndef __CONFIG_H
#define __CONFIG_H
#define CFG_MEMTEST_START 0x00200000 /* memtest works on */
#define CFG_MEMTEST_END 0x00400000
-
/*
* Base addresses -- Note these are effective addresses where the
* actual resources get mapped (not physical addresses)
#define CFG_CCSRBAR 0xe0000000 /* relocated CCSRBAR */
#define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */
-
/*
* DDR Setup
*/
#error ("CONFIG_SPD_EEPROM is required by MPC85555CDS")
#endif
-
-
/*
* SDRAM on the Local Bus
*/
#define CFG_BR3_PRELIM 0xf8000801
#define CFG_OR3_PRELIM 0xfff00ff7
-
#define CONFIG_L1_INIT_RAM
#define CFG_INIT_RAM_LOCK 1
#define CFG_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */
#endif /* CONFIG_TSEC_ENET */
-
-
/*
* Environment
*/
| CFG_CMD_I2C \
| CFG_CMD_MII)
#endif
-
-
#include <cmd_confdefs.h>
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
-
/*
* Environment Configuration
*/
#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
-
#endif /* __CONFIG_H */
* Please refer to doc/README.mpc85xxcds for more info.
*
*/
-
#ifndef __CONFIG_H
#define __CONFIG_H
#define CFG_MEMTEST_START 0x00200000 /* memtest works on */
#define CFG_MEMTEST_END 0x00400000
-
/*
* Base addresses -- Note these are effective addresses where the
* actual resources get mapped (not physical addresses)
#define CFG_CCSRBAR 0xe0000000 /* relocated CCSRBAR */
#define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */
-
/*
* DDR Setup
*/
#error ("CONFIG_SPD_EEPROM is required by MPC85555CDS")
#endif
-
-
/*
* SDRAM on the Local Bus
*/
#define CFG_BR3_PRELIM 0xf8000801
#define CFG_OR3_PRELIM 0xfff00ff7
-
#define CONFIG_L1_INIT_RAM
#define CFG_INIT_RAM_LOCK 1
#define CFG_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */
#endif /* CONFIG_TSEC_ENET */
-
-
/*
* Environment
*/
| CFG_CMD_I2C \
| CFG_CMD_MII)
#endif
-
-
#include <cmd_confdefs.h>
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
-
/*
* Environment Configuration
*/
#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
-
#endif /* __CONFIG_H */
--- /dev/null
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*------------------------------------------------------------------------
+ * BOARD/CPU
+ *----------------------------------------------------------------------*/
+#define CONFIG_PCI5441 1 /* PCI-5441 board */
+#define CONFIG_SYS_CLK_FREQ 50000000 /* 50 MHz core clk */
+
+#define CFG_RESET_ADDR 0x00000000 /* Hard-reset address */
+#define CFG_EXCEPTION_ADDR 0x01000020 /* Exception entry point*/
+#define CFG_NIOS_SYSID_BASE 0x00920828 /* System id address */
+#define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/
+
+/*------------------------------------------------------------------------
+ * CACHE -- the following will support II/s and II/f. The II/s does not
+ * have dcache, so the cache instructions will behave as NOPs.
+ *----------------------------------------------------------------------*/
+#define CFG_ICACHE_SIZE 4096 /* 4 KByte total */
+#define CFG_ICACHELINE_SIZE 32 /* 32 bytes/line */
+#define CFG_DCACHE_SIZE 2048 /* 2 KByte (II/f) */
+#define CFG_DCACHELINE_SIZE 4 /* 4 bytes/line (II/f) */
+
+/*------------------------------------------------------------------------
+ * MEMORY BASE ADDRESSES
+ *----------------------------------------------------------------------*/
+#define CFG_FLASH_BASE 0x00000000 /* FLASH base addr */
+#define CFG_FLASH_SIZE 0x00800000 /* 8 MByte */
+#define CFG_SDRAM_BASE 0x01000000 /* SDRAM base addr */
+#define CFG_SDRAM_SIZE 0x01000000 /* 16 MByte */
+
+/*------------------------------------------------------------------------
+ * MEMORY ORGANIZATION
+ * -Monitor at top.
+ * -The heap is placed below the monitor.
+ * -Global data is placed below the heap.
+ * -The stack is placed below global data (&grows down).
+ *----------------------------------------------------------------------*/
+#define CFG_MONITOR_LEN (128 * 1024) /* Reserve 128k */
+#define CFG_GBL_DATA_SIZE 128 /* Global data size rsvd*/
+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
+
+#define CFG_MONITOR_BASE TEXT_BASE
+#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN)
+#define CFG_GBL_DATA_OFFSET (CFG_MALLOC_BASE - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP CFG_GBL_DATA_OFFSET
+
+/*------------------------------------------------------------------------
+ * FLASH (AM29LV065D)
+ *----------------------------------------------------------------------*/
+#define CFG_MAX_FLASH_SECT 128 /* Max # sects per bank */
+#define CFG_MAX_FLASH_BANKS 1 /* Max # of flash banks */
+#define CFG_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */
+#define CFG_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */
+#define CFG_FLASH_WORD_SIZE unsigned char /* flash word size */
+
+/*------------------------------------------------------------------------
+ * ENVIRONMENT -- Put environment in sector CFG_MONITOR_LEN above
+ * CFG_RESET_ADDR, since we assume the monitor is stored at the
+ * reset address, no? This will keep the environment in user region
+ * of flash. NOTE: the monitor length must be multiple of sector size
+ * (which is common practice).
+ *----------------------------------------------------------------------*/
+#define CFG_ENV_IS_IN_FLASH 1 /* Environment in flash */
+#define CFG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */
+#define CONFIG_ENV_OVERWRITE /* Serial change Ok */
+#define CFG_ENV_ADDR (CFG_RESET_ADDR + CFG_MONITOR_LEN)
+
+/*------------------------------------------------------------------------
+ * CONSOLE
+ *----------------------------------------------------------------------*/
+#if defined(CONFIG_CONSOLE_JTAG)
+#define CFG_NIOS_CONSOLE 0x00920820 /* JTAG UART base addr */
+#else
+#define CFG_NIOS_CONSOLE 0x009208a0 /* UART base addr */
+#endif
+
+#define CFG_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */
+#define CONFIG_BAUDRATE 115200 /* Initial baudrate */
+#define CFG_BAUDRATE_TABLE {115200} /* It's fixed ;-) */
+
+#define CFG_CONSOLE_INFO_QUIET 1 /* Suppress console info*/
+
+/*------------------------------------------------------------------------
+ * DEBUG
+ *----------------------------------------------------------------------*/
+#undef CONFIG_ROM_STUBS /* Stubs not in ROM */
+
+/*------------------------------------------------------------------------
+ * TIMEBASE --
+ *
+ * The high res timer defaults to 1 msec. Since it includes the period
+ * registers, we can slow it down to 10 msec using TMRCNT. If the default
+ * period is acceptable, TMRCNT can be left undefined.
+ *----------------------------------------------------------------------*/
+#define CFG_NIOS_TMRBASE 0x00920860 /* Tick timer base addr */
+#define CFG_NIOS_TMRIRQ 3 /* Timer IRQ num */
+#define CFG_NIOS_TMRMS 10 /* 10 msec per tick */
+#define CFG_NIOS_TMRCNT (CFG_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000))
+#define CFG_HZ (CONFIG_SYS_CLK_FREQ/(CFG_NIOS_TMRCNT + 1))
+
+/*------------------------------------------------------------------------
+ * COMMANDS
+ *----------------------------------------------------------------------*/
+#define CONFIG_COMMANDS (CFG_CMD_BDI | \
+ CFG_CMD_ECHO | \
+ CFG_CMD_ENV | \
+ CFG_CMD_FLASH | \
+ CFG_CMD_IMI | \
+ CFG_CMD_IRQ | \
+ CFG_CMD_LOADS | \
+ CFG_CMD_LOADB | \
+ CFG_CMD_MEMORY | \
+ CFG_CMD_MISC | \
+ CFG_CMD_RUN | \
+ CFG_CMD_SAVES )
+#include <cmd_confdefs.h>
+
+/*------------------------------------------------------------------------
+ * MISC
+ *----------------------------------------------------------------------*/
+#define CFG_LONGHELP /* Provide extended help*/
+#define CFG_PROMPT "==> " /* Command prompt */
+#define CFG_CBSIZE 256 /* Console I/O buf size */
+#define CFG_MAXARGS 16 /* Max command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot arg buf size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print buf size */
+#define CFG_LOAD_ADDR CFG_SDRAM_BASE /* Default load address */
+#define CFG_MEMTEST_START CFG_SDRAM_BASE /* Start addr for test */
+#define CFG_MEMTEST_END CFG_INIT_SP - 0x00020000
+
+#endif /* __CONFIG_H */
--- /dev/null
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*------------------------------------------------------------------------
+ * BOARD/CPU
+ *----------------------------------------------------------------------*/
+#define CONFIG_PK1C20 1 /* PK1C20 board */
+#define CONFIG_SYS_CLK_FREQ 50000000 /* 50 MHz core clk */
+
+#define CFG_RESET_ADDR 0x00000000 /* Hard-reset address */
+#define CFG_EXCEPTION_ADDR 0x01000020 /* Exception entry point*/
+#define CFG_NIOS_SYSID_BASE 0x00920828 /* System id address */
+#define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/
+
+/*------------------------------------------------------------------------
+ * CACHE -- the following will support II/s and II/f. The II/s does not
+ * have dcache, so the cache instructions will behave as NOPs.
+ *----------------------------------------------------------------------*/
+#define CFG_ICACHE_SIZE 4096 /* 4 KByte total */
+#define CFG_ICACHELINE_SIZE 32 /* 32 bytes/line */
+#define CFG_DCACHE_SIZE 2048 /* 2 KByte (II/f) */
+#define CFG_DCACHELINE_SIZE 4 /* 4 bytes/line (II/f) */
+
+/*------------------------------------------------------------------------
+ * MEMORY BASE ADDRESSES
+ *----------------------------------------------------------------------*/
+#define CFG_FLASH_BASE 0x00000000 /* FLASH base addr */
+#define CFG_FLASH_SIZE 0x00800000 /* 8 MByte */
+#define CFG_SDRAM_BASE 0x01000000 /* SDRAM base addr */
+#define CFG_SDRAM_SIZE 0x01000000 /* 16 MByte */
+#define CFG_SRAM_BASE 0x00800000 /* SRAM base addr */
+#define CFG_SRAM_SIZE 0x00200000 /* 2 MByte */
+
+/*------------------------------------------------------------------------
+ * MEMORY ORGANIZATION
+ * -Monitor at top.
+ * -The heap is placed below the monitor.
+ * -Global data is placed below the heap.
+ * -The stack is placed below global data (&grows down).
+ *----------------------------------------------------------------------*/
+#define CFG_MONITOR_LEN (128 * 1024) /* Reserve 128k */
+#define CFG_GBL_DATA_SIZE 128 /* Global data size rsvd*/
+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
+
+#define CFG_MONITOR_BASE TEXT_BASE
+#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN)
+#define CFG_GBL_DATA_OFFSET (CFG_MALLOC_BASE - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP CFG_GBL_DATA_OFFSET
+
+/*------------------------------------------------------------------------
+ * FLASH (AM29LV065D)
+ *----------------------------------------------------------------------*/
+#define CFG_MAX_FLASH_SECT 128 /* Max # sects per bank */
+#define CFG_MAX_FLASH_BANKS 1 /* Max # of flash banks */
+#define CFG_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */
+#define CFG_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */
+#define CFG_FLASH_WORD_SIZE unsigned char /* flash word size */
+
+/*------------------------------------------------------------------------
+ * ENVIRONMENT -- Put environment in sector CFG_MONITOR_LEN above
+ * CFG_RESET_ADDR, since we assume the monitor is stored at the
+ * reset address, no? This will keep the environment in user region
+ * of flash. NOTE: the monitor length must be multiple of sector size
+ * (which is common practice).
+ *----------------------------------------------------------------------*/
+#define CFG_ENV_IS_IN_FLASH 1 /* Environment in flash */
+#define CFG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */
+#define CONFIG_ENV_OVERWRITE /* Serial change Ok */
+#define CFG_ENV_ADDR (CFG_RESET_ADDR + CFG_MONITOR_LEN)
+
+/*------------------------------------------------------------------------
+ * CONSOLE
+ *----------------------------------------------------------------------*/
+#if defined(CONFIG_CONSOLE_JTAG)
+#define CFG_NIOS_CONSOLE 0x00920820 /* JTAG UART base addr */
+#else
+#define CFG_NIOS_CONSOLE 0x009208a0 /* UART base addr */
+#endif
+
+#define CFG_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */
+#define CONFIG_BAUDRATE 115200 /* Initial baudrate */
+#define CFG_BAUDRATE_TABLE {115200} /* It's fixed ;-) */
+
+#define CFG_CONSOLE_INFO_QUIET 1 /* Suppress console info*/
+
+/*------------------------------------------------------------------------
+ * DEBUG
+ *----------------------------------------------------------------------*/
+#undef CONFIG_ROM_STUBS /* Stubs not in ROM */
+
+/*------------------------------------------------------------------------
+ * TIMEBASE --
+ *
+ * The high res timer defaults to 1 msec. Since it includes the period
+ * registers, we can slow it down to 10 msec using TMRCNT. If the default
+ * period is acceptable, TMRCNT can be left undefined.
+ *----------------------------------------------------------------------*/
+#define CFG_NIOS_TMRBASE 0x00920860 /* Tick timer base addr */
+#define CFG_NIOS_TMRIRQ 3 /* Timer IRQ num */
+#define CFG_NIOS_TMRMS 10 /* 10 msec per tick */
+#define CFG_NIOS_TMRCNT (CFG_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000))
+#define CFG_HZ (CONFIG_SYS_CLK_FREQ/(CFG_NIOS_TMRCNT + 1))
+
+/*------------------------------------------------------------------------
+ * STATUS LED -- Provides a simple blinking led. For Nios2 each board
+ * must implement its own led routines -- leds are, after all,
+ * board-specific, no?
+ *----------------------------------------------------------------------*/
+#define CFG_LEDPIO_ADDR 0x00920840 /* LED PIO base addr */
+#define CONFIG_STATUS_LED /* Enable status driver */
+
+#define STATUS_LED_BIT 1 /* Bit-0 on PIO */
+#define STATUS_LED_STATE 1 /* Blinking */
+#define STATUS_LED_PERIOD (500/CFG_NIOS_TMRMS) /* Every 500 msec */
+
+/*------------------------------------------------------------------------
+ * ETHERNET -- The header file for the SMC91111 driver hurts my eyes ...
+ * and really doesn't need any additional clutter. So I choose the lazy
+ * way out to avoid changes there -- define the base address to ensure
+ * cache bypass so there's no need to monkey with inx/outx macros.
+ *----------------------------------------------------------------------*/
+#define CONFIG_SMC91111_BASE 0x80910300 /* Base addr (bypass) */
+#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */
+#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
+#define CONFIG_SMC_USE_32_BIT /* 32-bit interface */
+
+#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
+#define CONFIG_NETMASK 255.255.255.0
+#define CONFIG_IPADDR 192.168.2.21
+#define CONFIG_SERVERIP 192.168.2.16
+
+/*------------------------------------------------------------------------
+ * COMMANDS
+ *----------------------------------------------------------------------*/
+#define CONFIG_COMMANDS (CFG_CMD_BDI | \
+ CFG_CMD_DHCP | \
+ CFG_CMD_ECHO | \
+ CFG_CMD_ENV | \
+ CFG_CMD_FLASH | \
+ CFG_CMD_IMI | \
+ CFG_CMD_IRQ | \
+ CFG_CMD_LOADS | \
+ CFG_CMD_LOADB | \
+ CFG_CMD_MEMORY | \
+ CFG_CMD_MISC | \
+ CFG_CMD_NET | \
+ CFG_CMD_PING | \
+ CFG_CMD_RUN | \
+ CFG_CMD_SAVES )
+#include <cmd_confdefs.h>
+
+/*------------------------------------------------------------------------
+ * MISC
+ *----------------------------------------------------------------------*/
+#define CFG_LONGHELP /* Provide extended help*/
+#define CFG_PROMPT "==> " /* Command prompt */
+#define CFG_CBSIZE 256 /* Console I/O buf size */
+#define CFG_MAXARGS 16 /* Max command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot arg buf size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print buf size */
+#define CFG_LOAD_ADDR CFG_SDRAM_BASE /* Default load address */
+#define CFG_MEMTEST_START CFG_SDRAM_BASE /* Start addr for test */
+#define CFG_MEMTEST_END CFG_INIT_SP - 0x00020000
+
+#endif /* __CONFIG_H */
#define IH_CPU_M68K 12 /* M68K */
#define IH_CPU_NIOS 13 /* Nios-32 */
#define IH_CPU_MICROBLAZE 14 /* MicroBlaze */
+#define IH_CPU_NIOS2 15 /* Nios-II */
/*
* Image Types
--- /dev/null
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*************************************************************************
+ * Altera Nios2 Standard Peripherals
+ ************************************************************************/
+
+#ifndef __NIOS2IO_H__
+#define __NIOS2IO_H__
+
+/*------------------------------------------------------------------------
+ * UART (http://www.altera.com/literature/ds/ds_nios_uart.pdf)
+ *----------------------------------------------------------------------*/
+typedef volatile struct nios_uart_t {
+ unsigned rxdata; /* Rx data reg */
+ unsigned txdata; /* Tx data reg */
+ unsigned status; /* Status reg */
+ unsigned control; /* Control reg */
+ unsigned divisor; /* Baud rate divisor reg */
+ unsigned endofpacket; /* End-of-packet reg */
+}nios_uart_t;
+
+/* status register */
+#define NIOS_UART_PE (1 << 0) /* parity error */
+#define NIOS_UART_FE (1 << 1) /* frame error */
+#define NIOS_UART_BRK (1 << 2) /* break detect */
+#define NIOS_UART_ROE (1 << 3) /* rx overrun */
+#define NIOS_UART_TOE (1 << 4) /* tx overrun */
+#define NIOS_UART_TMT (1 << 5) /* tx empty */
+#define NIOS_UART_TRDY (1 << 6) /* tx ready */
+#define NIOS_UART_RRDY (1 << 7) /* rx ready */
+#define NIOS_UART_E (1 << 8) /* exception */
+#define NIOS_UART_DCTS (1 << 10) /* cts change */
+#define NIOS_UART_CTS (1 << 11) /* cts */
+#define NIOS_UART_EOP (1 << 12) /* eop detected */
+
+/* control register */
+#define NIOS_UART_IPE (1 << 0) /* parity error int ena*/
+#define NIOS_UART_IFE (1 << 1) /* frame error int ena */
+#define NIOS_UART_IBRK (1 << 2) /* break detect int ena */
+#define NIOS_UART_IROE (1 << 3) /* rx overrun int ena */
+#define NIOS_UART_ITOE (1 << 4) /* tx overrun int ena */
+#define NIOS_UART_ITMT (1 << 5) /* tx empty int ena */
+#define NIOS_UART_ITRDY (1 << 6) /* tx ready int ena */
+#define NIOS_UART_IRRDY (1 << 7) /* rx ready int ena */
+#define NIOS_UART_IE (1 << 8) /* exception int ena */
+#define NIOS_UART_TBRK (1 << 9) /* transmit break */
+#define NIOS_UART_IDCTS (1 << 10) /* cts change int ena */
+#define NIOS_UART_RTS (1 << 11) /* rts */
+#define NIOS_UART_IEOP (1 << 12) /* eop detected int ena */
+
+
+/*------------------------------------------------------------------------
+ * TIMER (http://www.altera.com/literature/ds/ds_nios_timer.pdf)
+ *----------------------------------------------------------------------*/
+typedef volatile struct nios_timer_t {
+ unsigned status; /* Timer status reg */
+ unsigned control; /* Timer control reg */
+ unsigned periodl; /* Timeout period low */
+ unsigned periodh; /* Timeout period high */
+ unsigned snapl; /* Snapshot low */
+ unsigned snaph; /* Snapshot high */
+}nios_timer_t;
+
+/* status register */
+#define NIOS_TIMER_TO (1 << 0) /* Timeout */
+#define NIOS_TIMER_RUN (1 << 1) /* Timer running */
+
+/* control register */
+#define NIOS_TIMER_ITO (1 << 0) /* Timeout int ena */
+#define NIOS_TIMER_CONT (1 << 1) /* Continuous mode */
+#define NIOS_TIMER_START (1 << 2) /* Start timer */
+#define NIOS_TIMER_STOP (1 << 3) /* Stop timer */
+
+
+/*------------------------------------------------------------------------
+ * PIO (http://www.altera.com/literature/ds/ds_nios_pio.pdf)
+ *----------------------------------------------------------------------*/
+typedef volatile struct nios_pio_t {
+ unsigned int data; /* Data value at each PIO in/out */
+ unsigned int direction; /* Data direct. for each PIO bit */
+ unsigned int interruptmask; /* Per-bit IRQ enable/disable */
+ unsigned int edgecapture; /* Per-bit sync. edge detect & hold */
+}nios_pio_t;
+
+/* direction register */
+#define NIOS_PIO_OUT (1) /* PIO bit is output */
+#define NIOS_PIO_IN (0) /* PIO bit is input */
+
+
+/*------------------------------------------------------------------------
+ * SPI (http://www.altera.com/literature/ds/ds_nios_spi.pdf)
+ *----------------------------------------------------------------------*/
+typedef volatile struct nios_spi_t {
+ unsigned rxdata; /* Rx data reg */
+ unsigned txdata; /* Tx data reg */
+ unsigned status; /* Status reg */
+ unsigned control; /* Control reg */
+ unsigned reserved; /* (master only) */
+ unsigned slaveselect; /* SPI slave select mask (master only) */
+}nios_spi_t;
+
+/* status register */
+#define NIOS_SPI_ROE (1 << 3) /* rx overrun */
+#define NIOS_SPI_TOE (1 << 4) /* tx overrun */
+#define NIOS_SPI_TMT (1 << 5) /* tx empty */
+#define NIOS_SPI_TRDY (1 << 6) /* tx ready */
+#define NIOS_SPI_RRDY (1 << 7) /* rx ready */
+#define NIOS_SPI_E (1 << 8) /* exception */
+
+/* control register */
+#define NIOS_SPI_IROE (1 << 3) /* rx overrun int ena */
+#define NIOS_SPI_ITOE (1 << 4) /* tx overrun int ena */
+#define NIOS_SPI_ITRDY (1 << 6) /* tx ready int ena */
+#define NIOS_SPI_IRRDY (1 << 7) /* rx ready int ena */
+#define NIOS_SPI_IE (1 << 8) /* exception int ena */
+#define NIOS_SPI_SSO (1 << 10) /* override SS_n output */
+
+/*------------------------------------------------------------------------
+ * ASMI
+ *----------------------------------------------------------------------*/
+typedef volatile struct nios_asmi_t {
+ unsigned rxdata; /* Rx data reg */
+ unsigned txdata; /* Tx data reg */
+ unsigned status; /* Status reg */
+ unsigned control; /* Control reg */
+ unsigned reserved;
+ unsigned slavesel; /* Slave select */
+ unsigned endofpacket; /* End-of-packet reg */
+}nios_asmi_t;
+
+/* status register */
+#define NIOS_ASMI_ROE (1 << 3) /* rx overrun */
+#define NIOS_ASMI_TOE (1 << 4) /* tx overrun */
+#define NIOS_ASMI_TMT (1 << 5) /* tx empty */
+#define NIOS_ASMI_TRDY (1 << 6) /* tx ready */
+#define NIOS_ASMI_RRDY (1 << 7) /* rx ready */
+#define NIOS_ASMI_E (1 << 8) /* exception */
+#define NIOS_ASMI_EOP (1 << 9) /* eop detected */
+
+/* control register */
+#define NIOS_ASMI_IROE (1 << 3) /* rx overrun int ena */
+#define NIOS_ASMI_ITOE (1 << 4) /* tx overrun int ena */
+#define NIOS_ASMI_ITRDY (1 << 6) /* tx ready int ena */
+#define NIOS_ASMI_IRRDY (1 << 7) /* rx ready int ena */
+#define NIOS_ASMI_IE (1 << 8) /* exception int ena */
+#define NIOS_ASMI_IEOP (1 << 9) /* rx eop int ena */
+#define NIOS_ASMI_SSO (1 << 10) /* slave select enable */
+
+/*------------------------------------------------------------------------
+ * JTAG UART
+ *----------------------------------------------------------------------*/
+typedef volatile struct nios_jtag_t {
+ unsigned data; /* Data register */
+ unsigned control; /* Control register */
+}nios_jtag_t;
+
+/* data register */
+#define NIOS_JTAG_RVALID (1<<15) /* Read valid */
+#define NIOS_JTAG_DATA(d) ((d)&0x0ff) /* Read data */
+#define NIOS_JTAG_RAVAIL(d) ((d)>>16) /* Read space avail */
+
+/* control register */
+#define NIOS_JTAG_RE (1 << 0) /* read intr enable */
+#define NIOS_JTAG_WE (1 << 1) /* write intr enable */
+#define NIOS_JTAG_RI (1 << 8) /* read intr pending */
+#define NIOS_JTAG_WI (1 << 9) /* write intr pending*/
+#define NIOS_JTAG_AC (1 << 10) /* activity indicator */
+#define NIOS_JTAG_RRDY (1 << 12) /* read available */
+#define NIOS_JTAG_WSPACE(d) ((d)>>16) /* Write space avail */
+
+/*------------------------------------------------------------------------
+ * SYSTEM ID
+ *----------------------------------------------------------------------*/
+typedef volatile struct nios_sysid_t {
+ unsigned id; /* The system build id*/
+ unsigned timestamp; /* Timestamp */
+}nios_sysid_t;
+
+#endif /* __NIOS2IO_H__ */
--- /dev/null
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __NIOS2_H__
+#define __NIOS2_H__
+
+/*------------------------------------------------------------------------
+ * Control registers -- use with wrctl() & rdctl()
+ *----------------------------------------------------------------------*/
+#define CTL_STATUS 0 /* Processor status reg */
+#define CTL_ESTATUS 1 /* Exception status reg */
+#define CTL_BSTATUS 2 /* Break status reg */
+#define CTL_IENABLE 3 /* Interrut enable reg */
+#define CTL_IPENDING 4 /* Interrut pending reg */
+
+/*------------------------------------------------------------------------
+ * Access to control regs
+ *----------------------------------------------------------------------*/
+#define _str_(x) #x
+
+#define rdctl(reg)\
+ ({unsigned int val;\
+ asm volatile( "rdctl %0, ctl" _str_(reg)\
+ : "=r" (val) ); val;})
+
+#define wrctl(reg,val)\
+ asm volatile( "wrctl ctl" _str_(reg) ",%0"\
+ : : "r" (val))
+
+/*------------------------------------------------------------------------
+ * Control reg bit masks
+ *----------------------------------------------------------------------*/
+#define STATUS_IE (1<<0) /* Interrupt enable */
+#define STATUS_U (1<<1) /* User-mode */
+
+/*------------------------------------------------------------------------
+ * Bit-31 Cache bypass -- only valid for data access. When data cache
+ * is not implemented, bit 31 is ignored for compatibility.
+ *----------------------------------------------------------------------*/
+#define CACHE_BYPASS(a) ((a) | 0x80000000)
+#define CACHE_NO_BYPASS(a) ((a) & ~0x80000000)
+
+#endif /* __NIOS2_H__ */
#elif defined(CONFIG_WRSBC8240)
/* XXX empty just to avoid the error */
/************************************************************************/
+#elif defined(CONFIG_NIOS2)
+/* XXX empty just to avoid the error */
+/************************************************************************/
#else
# error Status LED configuration missing
#endif
--- /dev/null
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(ARCH).a
+
+AOBJS = cache.o
+
+COBJS = board.o divmod.o nios_linux.o mult.o time.o
+
+OBJS = $(AOBJS) $(COBJS)
+
+$(LIB): .depend $(OBJS)
+ $(AR) crv $@ $(OBJS)
+
+#########################################################################
+
+.depend: Makefile $(AOBJS:.o=.S) $(COBJS:.o=.c)
+ $(CC) -M $(CFLAGS) $(AOBJS:.o=.S) $(COBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
--- /dev/null
+/*
+ * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * (C) Copyright 2000-2002
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <devices.h>
+#include <watchdog.h>
+#include <net.h>
+#ifdef CONFIG_STATUS_LED
+#include <status_led.h>
+#endif
+
+
+/*
+ * All attempts to come up with a "common" initialization sequence
+ * that works for all boards and architectures failed: some of the
+ * requirements are just _too_ different. To get rid of the resulting
+ * mess of board dependend #ifdef'ed code we now make the whole
+ * initialization sequence configurable to the user.
+ *
+ * The requirements for any new initalization function is simple: it
+ * receives a pointer to the "global data" structure as it's only
+ * argument, and returns an integer return code, where 0 means
+ * "continue" and != 0 means "fatal error, hang the system".
+ */
+
+
+extern void malloc_bin_reloc (void);
+typedef int (init_fnc_t) (void);
+
+/*
+ * Begin and End of memory area for malloc(), and current "brk"
+ */
+static ulong mem_malloc_start = 0;
+static ulong mem_malloc_end = 0;
+static ulong mem_malloc_brk = 0;
+
+/*
+ * The Malloc area is immediately below the monitor copy in RAM
+ */
+static void mem_malloc_init (void)
+{
+ mem_malloc_start = CFG_MALLOC_BASE;
+ mem_malloc_end = mem_malloc_start + CFG_MALLOC_LEN;
+ mem_malloc_brk = mem_malloc_start;
+ memset ((void *) mem_malloc_start,
+ 0,
+ mem_malloc_end - mem_malloc_start);
+}
+
+void *sbrk (ptrdiff_t increment)
+{
+ ulong old = mem_malloc_brk;
+ ulong new = old + increment;
+
+ if ((new < mem_malloc_start) || (new > mem_malloc_end)) {
+ return (NULL);
+ }
+ mem_malloc_brk = new;
+ return ((void *) old);
+}
+
+
+/************************************************************************
+ * Initialization sequence *
+ ***********************************************************************/
+
+init_fnc_t *init_sequence[] = {
+
+#if defined(CONFIG_BOARD_EARLY_INIT_F)
+ board_early_init_f, /* Call board-specific init code early.*/
+#endif
+
+ env_init,
+ serial_init,
+ console_init_f,
+ display_options,
+ checkcpu,
+ checkboard,
+ NULL, /* Terminate this list */
+};
+
+
+/***********************************************************************/
+void board_init (void)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+
+ bd_t *bd;
+ init_fnc_t **init_fnc_ptr;
+ char *s, *e;
+ int i;
+
+ /* Pointer is writable since we allocated a register for it.
+ * Nios treats CFG_GBL_DATA_OFFSET as an address.
+ */
+ gd = (gd_t *)CFG_GBL_DATA_OFFSET;
+ /* compiler optimization barrier needed for GCC >= 3.4 */
+ __asm__ __volatile__("": : :"memory");
+
+ memset( gd, 0, CFG_GBL_DATA_SIZE );
+
+ gd->bd = (bd_t *)(gd+1); /* At end of global data */
+ gd->baudrate = CONFIG_BAUDRATE;
+ gd->cpu_clk = CONFIG_SYS_CLK_FREQ;
+
+ bd = gd->bd;
+ bd->bi_memstart = CFG_SDRAM_BASE;
+ bd->bi_memsize = CFG_SDRAM_SIZE;
+ bd->bi_flashstart = CFG_FLASH_BASE;
+#if defined(CFG_SRAM_BASE) && defined(CFG_SRAM_SIZE)
+ bd->bi_sramstart= CFG_SRAM_BASE;
+ bd->bi_sramsize = CFG_SRAM_SIZE;
+#endif
+ bd->bi_baudrate = CONFIG_BAUDRATE;
+
+ for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
+ WATCHDOG_RESET ();
+ if ((*init_fnc_ptr) () != 0) {
+ hang ();
+ }
+ }
+
+ WATCHDOG_RESET ();
+ bd->bi_flashsize = flash_init();
+
+ WATCHDOG_RESET ();
+ mem_malloc_init();
+ malloc_bin_reloc();
+ env_relocate();
+
+ bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
+ s = getenv ("ethaddr");
+ for (i = 0; i < 6; ++i) {
+ bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0;
+ if (s) s = (*e) ? e + 1 : e;
+ }
+
+ WATCHDOG_RESET ();
+ devices_init();
+ jumptable_init();
+ console_init_r();
+
+ WATCHDOG_RESET ();
+ interrupt_init ();
+
+ /* main_loop */
+ for (;;) {
+ WATCHDOG_RESET ();
+ main_loop ();
+ }
+}
+
+
+/***********************************************************************/
+
+void hang (void)
+{
+ disable_interrupts ();
+ puts("### ERROR ### Please reset board ###\n");
+ for (;;);
+}
--- /dev/null
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+
+ .text
+
+ .global flush_dcache
+
+flush_dcache:
+ add r5, r5, r4
+ movhi r8, %hi(CFG_DCACHELINE_SIZE)
+ ori r8, r8, %lo(CFG_DCACHELINE_SIZE)
+0: flushd 0(r4)
+ add r4, r4, r8
+ bltu r4, r5, 0b
+ ret
+
+
+ .global flush_icache
+
+flush_icache:
+ add r5, r5, r4
+ movhi r8, %hi(CFG_ICACHELINE_SIZE)
+ ori r8, r8, %lo(CFG_ICACHELINE_SIZE)
+1: flushi r4
+ add r4, r4, r8
+ bltu r4, r5, 1b
+ ret
+
+ .global flush_cache
+
+flush_cache:
+ add r5, r5, r4
+ mov r9, r4
+ mov r10, r5
+
+ movhi r8, %hi(CFG_DCACHELINE_SIZE)
+ ori r8, r8, %lo(CFG_DCACHELINE_SIZE)
+0: flushd 0(r4)
+ add r4, r4, r8
+ bltu r4, r5, 0b
+
+ mov r4, r9
+ mov r5, r10
+ movhi r8, %hi(CFG_ICACHELINE_SIZE)
+ ori r8, r8, %lo(CFG_ICACHELINE_SIZE)
+1: flushi r4
+ add r4, r4, r8
+ bltu r4, r5, 1b
+
+ sync
+ flushp
+ ret
--- /dev/null
+/*
+ * This file is part of GNU CC.
+ *
+ * GNU CC is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published
+ * by the Free Software Foundation; either version 2, or (at your
+ * option) any later version.
+ *
+ * GNU CC is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public
+ * License along with GNU CC; see the file COPYING. If not, write
+ * to the Free Software Foundation, 59 Temple Place - Suite 330,
+ * Boston, MA 02111-1307, USA.
+ */
+
+
+#include "math.h"
+
+USItype udivmodsi4 (USItype num, USItype den, word_type modwanted)
+{
+ USItype bit = 1;
+ USItype res = 0;
+
+ while (den < num && bit && !(den & (1L << 31))) {
+ den <<= 1;
+ bit <<= 1;
+ }
+ while (bit) {
+ if (num >= den) {
+ num -= den;
+ res |= bit;
+ }
+ bit >>= 1;
+ den >>= 1;
+ }
+ if (modwanted)
+ return num;
+ return res;
+}
+
+
+SItype __divsi3 (SItype a, SItype b)
+{
+ word_type neg = 0;
+ SItype res;
+
+ if (a < 0) {
+ a = -a;
+ neg = !neg;
+ }
+
+ if (b < 0) {
+ b = -b;
+ neg = !neg;
+ }
+
+ res = udivmodsi4 (a, b, 0);
+
+ if (neg)
+ res = -res;
+
+ return res;
+}
+
+
+SItype __modsi3 (SItype a, SItype b)
+{
+ word_type neg = 0;
+ SItype res;
+
+ if (a < 0) {
+ a = -a;
+ neg = 1;
+ }
+
+ if (b < 0)
+ b = -b;
+
+ res = udivmodsi4 (a, b, 1);
+
+ if (neg)
+ res = -res;
+
+ return res;
+}
+
+
+SItype __udivsi3 (SItype a, SItype b)
+{
+ return udivmodsi4 (a, b, 0);
+}
+
+
+SItype __umodsi3 (SItype a, SItype b)
+{
+ return udivmodsi4 (a, b, 1);
+}
--- /dev/null
+#define BITS_PER_UNIT 8
+
+typedef int HItype __attribute__ ((mode (HI)));
+typedef unsigned int UHItype __attribute__ ((mode (HI)));
+
+typedef int SItype __attribute__ ((mode (SI)));
+typedef unsigned int USItype __attribute__ ((mode (SI)));
+
+typedef int word_type __attribute__ ((mode (__word__)));
+
+struct SIstruct {HItype low, high;};
+
+typedef union {
+ struct SIstruct s;
+ SItype ll;
+} SIunion;
--- /dev/null
+/*
+ * This file is part of GNU CC.
+ *
+ * GNU CC is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published
+ * by the Free Software Foundation; either version 2, or (at your
+ * option) any later version.
+ *
+ * GNU CC is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public
+ * License along with GNU CC; see the file COPYING. If not, write
+ * to the Free Software Foundation, 59 Temple Place - Suite 330,
+ * Boston, MA 02111-1307, USA.
+ */
+
+
+#include <common.h>
+
+#if !defined(CFG_NIOS_MULT_HW) && !defined(CFG_NIOS_MULT_MSTEP)
+
+#include "math.h"
+
+USItype __mulsi3 (USItype a, USItype b)
+{
+ USItype c = 0;
+
+ while (a != 0) {
+ if (a & 1)
+ c += b;
+ a >>= 1;
+ b <<= 1;
+ }
+
+ return c;
+}
+
+
+UHItype __mulhi3 (UHItype a, UHItype b)
+{
+ UHItype c = 0;
+
+ while (a != 0) {
+ if (a & 1)
+ c += b;
+ a >>= 1;
+ b <<= 1;
+ }
+
+ return c;
+}
+
+#endif /*!defined(CFG_NIOS_MULT_HW) && !defined(CFG_NIOS_MULT_MSTEP) */
--- /dev/null
+/*
+ * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+
+/* TODO
+ */
+void do_bootm_linux(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[],
+ ulong addr, ulong *len_ptr, int verify)
+{
+}
--- /dev/null
+/*
+ * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <watchdog.h>
+
+
+extern void dly_clks( unsigned long ticks );
+
+void udelay(unsigned long usec)
+{
+ /* The Nios core doesn't have a timebase, so we do our
+ * best for now and call a low-level loop that counts
+ * cpu clocks.
+ */
+ unsigned long cnt = (CONFIG_SYS_CLK_FREQ/1000000) * usec;
+ WATCHDOG_RESET (); /* trigger watchdog if needed */
+ dly_clks (cnt);
+}
--- /dev/null
+#
+# (C) Copyright 2004
+# Psyent Corporation <www.psyent.com>
+# Scott McNutt <smcnutt@psyent.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+PLATFORM_CPPFLAGS += -DCONFIG_NIOS2 -D__NIOS2__
+PLATFORM_CPPFLAGS += -ffixed-r15
projects / u-boot.git / commitdiff