]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
mmc: zynq_sdhci: Return errors from arasan_sdhci_set_tapdelay
authorAshok Reddy Soma <ashok.reddy.soma@xilinx.com>
Tue, 3 Aug 2021 05:20:40 +0000 (23:20 -0600)
committerMichal Simek <michal.simek@xilinx.com>
Fri, 6 Aug 2021 07:35:34 +0000 (09:35 +0200)
Change return type of arasan_sdhci_set_tapdelay() to int, to facilitate
returning errors. Get return values from input and output set clock phase
functions inside arasan_sdhci_set_tapdelay() and return those errors.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drivers/mmc/zynq_sdhci.c

index ba87ee8dd5bd12c520da8e0c720d6f5bee7b3578..1ecc2ec66901e3717e28091c4d5b63aacd119568 100644 (file)
@@ -422,7 +422,7 @@ static int sdhci_versal_sampleclk_set_phase(struct sdhci_host *host,
        return 0;
 }
 
-static void arasan_sdhci_set_tapdelay(struct sdhci_host *host)
+static int arasan_sdhci_set_tapdelay(struct sdhci_host *host)
 {
        struct arasan_sdhci_priv *priv = dev_get_priv(host->mmc->dev);
        struct arasan_sdhci_clk_data *clk_data = &priv->clk_data;
@@ -431,18 +431,31 @@ static void arasan_sdhci_set_tapdelay(struct sdhci_host *host)
        u8 timing = mode2timing[mmc->selected_mode];
        u32 iclk_phase = clk_data->clk_phase_in[timing];
        u32 oclk_phase = clk_data->clk_phase_out[timing];
+       int ret;
 
        dev_dbg(dev, "%s, host:%s, mode:%d\n", __func__, host->name, timing);
 
        if (IS_ENABLED(CONFIG_ARCH_ZYNQMP) &&
            device_is_compatible(dev, "xlnx,zynqmp-8.9a")) {
-               sdhci_zynqmp_sampleclk_set_phase(host, iclk_phase);
-               sdhci_zynqmp_sdcardclk_set_phase(host, oclk_phase);
+               ret = sdhci_zynqmp_sampleclk_set_phase(host, iclk_phase);
+               if (ret)
+                       return ret;
+
+               ret = sdhci_zynqmp_sdcardclk_set_phase(host, oclk_phase);
+               if (ret)
+                       return ret;
        } else if (IS_ENABLED(CONFIG_ARCH_VERSAL) &&
                   device_is_compatible(dev, "xlnx,versal-8.9a")) {
-               sdhci_versal_sampleclk_set_phase(host, iclk_phase);
-               sdhci_versal_sdcardclk_set_phase(host, oclk_phase);
+               ret = sdhci_versal_sampleclk_set_phase(host, iclk_phase);
+               if (ret)
+                       return ret;
+
+               ret = sdhci_versal_sdcardclk_set_phase(host, oclk_phase);
+               if (ret)
+                       return ret;
        }
+
+       return 0;
 }
 
 static void arasan_dt_read_clk_phase(struct udevice *dev, unsigned char timing,