arm: mvebu: Disable L2 cache before enabling d-cache

L2 cache may still be enabled by the BootROM. We need to first disable
it before enabling d-cache support.

Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com>

diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index 04681fc5a0177db94220805653ff4d5b1e7920dc..417fc35149b538b83911140f79a711d22f095c67 100644 (file)
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <netdev.h>
 #include <asm/io.h>
+#include <asm/pl310.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
 
@@ -240,6 +241,13 @@ int cpu_eth_init(bd_t *bis)
 #ifndef CONFIG_SYS_DCACHE_OFF
 void enable_caches(void)
 {
+       struct pl310_regs *const pl310 =
+               (struct pl310_regs *)CONFIG_SYS_PL310_BASE;
+
+       /* First disable L2 cache - may still be enable from BootROM */
+       if (mvebu_soc_family() == MVEBU_SOC_A38X)
+               clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN);
+
        /* Avoid problem with e.g. neta ethernet driver */
        invalidate_dcache_all();