select USB
select DM_USB
+config TARGET_TOTAL_COMPUTE
+ bool "Support Total Compute Platform"
+ select ARM64
+ select PL01X_SERIAL
+ select DM
+ select DM_SERIAL
+ select DM_MMC
+ select DM_GPIO
+
config TARGET_LS2080A_EMU
bool "Support ls2080a_emu"
select ARCH_LS2080A
source "arch/arm/mach-nexell/Kconfig"
+source "board/armltd/total_compute/Kconfig"
+
source "board/bosch/shc/Kconfig"
source "board/bosch/guardian/Kconfig"
source "board/CarMediaLab/flea3/Kconfig"
dtb-$(CONFIG_TARGET_VEXPRESS_CA9X4) += vexpress-v2p-ca9.dtb
dtb-$(CONFIG_TARGET_VEXPRESS_CA15_TC2) += vexpress-v2p-ca15_a7.dtb
+dtb-$(CONFIG_TARGET_TOTAL_COMPUTE) += total_compute.dtb
+
dtb-$(CONFIG_TARGET_DURIAN) += phytium-durian.dtb
dtb-$(CONFIG_TARGET_PRESIDIO_ASIC) += ca-presidio-engboard.dtb
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2020 Arm Limited
+ */
+
+/dts-v1/;
+
+/ {
+ model = "total_compute";
+ compatible = "arm,total_compute";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ sysreg: sysreg@1c010000 {
+ compatible = "arm,vexpress-sysreg";
+ reg = <0x0 0x001c010000 0x0 0x1000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ fixed_3v3: v2m-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ mmci@1c050000 {
+ compatible = "arm,pl180", "arm,primecell";
+ reg = <0x0 0x001c050000 0x0 0x1000>;
+ cd-gpios = <&sysreg 0 0>;
+ arm,primecell-periphid = <0x00880180>;
+ wp-gpios = <&sysreg 1 0>;
+ bus-width = <8>;
+ max-frequency = <12000000>;
+ vmmc-supply = <&fixed_3v3>;
+ clocks = <&clock24mhz>, <&clock24mhz>;
+ clock-names = "mclk", "apb_pclk";
+ };
+
+ clock24mhz: clock24mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24000000>;
+ clock-output-names = "bp:clock24mhz";
+ };
+};
!defined(CONFIG_ARCH_BCM6858) && !defined(CONFIG_ARCH_BCM63158) && \
!defined(CONFIG_ARCH_ROCKCHIP) && !defined(CONFIG_ARCH_ASPEED) && \
!defined(CONFIG_ARCH_U8500) && !defined(CONFIG_CORTINA_PLATFORM) && \
- !defined(CONFIG_TARGET_BCMNS3)
+ !defined(CONFIG_TARGET_BCMNS3) && !defined(CONFIG_TARGET_TOTAL_COMPUTE)
#include <asm/arch/gpio.h>
#endif
#include <asm-generic/gpio.h>
--- /dev/null
+if TARGET_TOTAL_COMPUTE
+
+config SYS_BOARD
+ default "total_compute"
+
+config SYS_VENDOR
+ default "armltd"
+
+config SYS_CONFIG_NAME
+ default "total_compute"
+
+endif
--- /dev/null
+TOTAL_COMPUTE BOARD
+M: Usama Arif <usama.arif@arm.com>
+S: Maintained
+F: board/armltd/total_compute/
+F: include/configs/total_compute.h
+F: configs/total_compute_defconfig
+F: arch/arm/dts/total_compute.dts
--- /dev/null
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2020 Arm Limited
+# Usama Arif <usama.arif@arm.com>
+
+obj-y := total_compute.o
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2020 Arm Limited
+ * Usama Arif <usama.arif@arm.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/platform_data/serial_pl01x.h>
+#include <asm/armv8/mmu.h>
+
+static const struct pl01x_serial_platdata serial_platdata = {
+ .base = UART0_BASE,
+ .type = TYPE_PL011,
+ .clock = CONFIG_PL011_CLOCK,
+};
+
+U_BOOT_DEVICE(total_compute_serials) = {
+ .name = "serial_pl01x",
+ .platdata = &serial_platdata,
+};
+
+static struct mm_region total_compute_mem_map[] = {
+ {
+ .virt = 0x0UL,
+ .phys = 0x0UL,
+ .size = 0x80000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ .virt = 0x80000000UL,
+ .phys = 0x80000000UL,
+ .size = 0xff80000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE
+ }, {
+ /* List terminator */
+ 0,
+ }
+};
+
+struct mm_region *mem_map = total_compute_mem_map;
+
+int board_init(void)
+{
+ return 0;
+}
+
+int dram_init(void)
+{
+ gd->ram_size = PHYS_SDRAM_1_SIZE;
+ return 0;
+}
+
+int dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+ return 0;
+}
+
+/* Nothing to be done here as handled by PSCI interface */
+void reset_cpu(ulong addr)
+{
+}
--- /dev/null
+CONFIG_ARM=y
+CONFIG_TARGET_TOTAL_COMPUTE=y
+CONFIG_SYS_TEXT_BASE=0xe0000000
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ENV_SIZE=0x2a00000
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_DEFAULT_DEVICE_TREE="total_compute"
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_BOOTDELAY=5
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0 debug user_debug=31 earlycon=pl011,0x7ff80000 loglevel=9 androidboot.hardware=total_compute video=640x480-32@60 androidboot.boot_devices=1c050000.mmci ip=dhcp androidboot.selinux=permissive"
+# CONFIG_USE_BOOTCOMMAND is not set
+# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_AVB_VERIFY=y
+CONFIG_AVB_BUF_ADDR=0x90000000
+CONFIG_AVB_BUF_SIZE=0x10000000
+CONFIG_SYS_PROMPT="TOTAL_COMPUTE# "
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EDITENV is not set
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0xff000000
+CONFIG_CMD_ARMFLASH=y
+CONFIG_CMD_GPT=y
+# CONFIG_RANDOM_UUID is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_CACHE=y
+# CONFIG_CMD_MISC is not set
+CONFIG_CMD_AVB=y
+CONFIG_CMD_UBI=y
+# CONFIG_ISO_PARTITION is not set
+CONFIG_OF_CONTROL=y
+# CONFIG_NET is not set
+CONFIG_CLK=y
+# CONFIG_MMC_WRITE is not set
+CONFIG_ARM_PL180_MMCI=y
+CONFIG_MTD=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_PROTECTION=y
+CONFIG_SYS_FLASH_CFI=y
+CONFIG_LIBAVB=y
+CONFIG_OF_LIBFDT_OVERLAY=y
--- /dev/null
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Configuration for Total Compute platform. Parts were derived from other ARM
+ * configurations.
+ * (C) Copyright 2020 Arm Limited
+ * Usama Arif <usama.arif@arm.com>
+ */
+
+#ifndef __TOTAL_COMPUTE_H
+#define __TOTAL_COMPUTE_H
+
+#define CONFIG_REMAKE_ELF
+
+/* Link Definitions */
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
+
+#define CONFIG_SYS_BOOTM_LEN (64 << 20)
+
+#define UART0_BASE 0x7ff80000
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 << 20))
+
+/* PL011 Serial Configuration */
+#define CONFIG_PL011_CLOCK 7372800
+
+/* Miscellaneous configurable options */
+#define CONFIG_SYS_LOAD_ADDR 0x90000000
+
+/* Physical Memory Map */
+#define PHYS_SDRAM_1 0x80000000
+/* Top 48MB reserved for secure world use */
+#define DRAM_SEC_SIZE 0x03000000
+#define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+
+#define CONFIG_ARM_PL180_MMCI_BASE 0x001c050000
+#define CONFIG_SYS_MMC_MAX_BLK_COUNT 127
+#define CONFIG_ARM_PL180_MMCI_CLOCK_FREQ 12000000
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "bootm_size=0x20000000\0" \
+ "load_addr=0xa0000000\0" \
+ "kernel_addr_r=0x80080000\0" \
+ "initrd_addr_r=0x88000000\0" \
+ "fdt_addr_r=0x83000000\0"
+/*
+ * If vbmeta partition is present, boot Android with verification using AVB.
+ * Else if system partition is present (no vbmeta partition), boot Android
+ * without verification (for development purposes).
+ * Else boot FIT image.
+ */
+#define CONFIG_BOOTCOMMAND \
+ "if part number mmc 0 vbmeta is_avb; then" \
+ " echo MMC with vbmeta partition detected.;" \
+ " echo starting Android Verified boot.;" \
+ " avb init 0; " \
+ " if avb verify; then " \
+ " set bootargs $bootargs $avb_bootargs; " \
+ " part start mmc 0 boot boot_start; " \
+ " part size mmc 0 boot boot_size; " \
+ " mmc read ${load_addr} ${boot_start} ${boot_size}; " \
+ " bootm ${load_addr} ${load_addr} ${fdt_addr_r}; " \
+ " else; " \
+ " echo AVB verification failed.; " \
+ " exit; " \
+ " fi; " \
+ "elif part number mmc 0 system is_non_avb_android; then " \
+ " booti ${kernel_addr_r} ${initrd_addr_r} ${fdt_addr_r};" \
+ "else;" \
+ " echo Booting FIT image.;" \
+ " bootm ${load_addr} ${load_addr} ${fdt_addr_r}; " \
+ "fi;"
+
+/* Monitor Command Prompt */
+#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
+#define CONFIG_SYS_MAXARGS 64 /* max command args */
+
+#define CONFIG_SYS_FLASH_BASE 0x0C000000
+/* 256 x 256KiB sectors */
+#define CONFIG_SYS_MAX_FLASH_SECT 256
+
+#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT
+#define CONFIG_SYS_MAX_FLASH_BANKS 1
+
+#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */
+#define FLASH_MAX_SECTOR_SIZE 0x00040000
+
+#endif /* __TOTAL_COMPUTE_H */
projects / u-boot.git / commitdiff