MIPS: Move Inca-IP targets to boards.cfg

At the same time, fix up CPU_CLOCK_RATE to have the CONFIG_ prefix to
work with boards.cfg.

Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>

diff --git a/Makefile b/Makefile
index 9e6cf25470a072dc95b3e5acf2df457f07546eb2..3fe0596213bd5f600ef35e91c6016eb232efa8d0 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -1098,19 +1098,6 @@ smdk6400_config  :       unconfig
 ## MIPS32 4Kc
 #########################################################################
 
-incaip_100MHz_config   \
-incaip_133MHz_config   \
-incaip_150MHz_config   \
-incaip_config: unconfig
-       @mkdir -p $(obj)include
-       @[ -z "$(findstring _100MHz,$@)" ] || \
-               echo "#define CPU_CLOCK_RATE 100000000" >>$(obj)include/config.h
-       @[ -z "$(findstring _133MHz,$@)" ] || \
-               echo "#define CPU_CLOCK_RATE 133000000" >>$(obj)include/config.h
-       @[ -z "$(findstring _150MHz,$@)" ] || \
-               echo "#define CPU_CLOCK_RATE 150000000" >>$(obj)include/config.h
-       @$(MKCONFIG) -n $@ -a incaip mips mips incaip
-
 vct_premium_config             \
 vct_premium_small_config       \
 vct_premium_onenand_config     \

diff --git a/board/incaip/lowlevel_init.S b/board/incaip/lowlevel_init.S
index fe525ec70e00793aac190a85a1113abba2858c94..b76579568627df1d83929da47d6528ca569d161d 100644 (file)
--- a/board/incaip/lowlevel_init.S
+++ b/board/incaip/lowlevel_init.S
@@ -283,7 +283,7 @@ lowlevel_init:
 
        /* EBU, CGU and SDRAM Initialization.
         */
-       li      a0, CPU_CLOCK_RATE
+       li      a0, CONFIG_CPU_CLOCK_RATE
        move    t0, ra
 
        /* We rely on the fact that neither ebu_init() nor cgu_init() nor sdram_init()

diff --git a/boards.cfg b/boards.cfg
index cb67d2a0fb1dc99645d1841280bb0ea4a47e86ed..d3edc9f81a1705355cae3669728454b86c34b0ee 100644 (file)
--- a/boards.cfg
+++ b/boards.cfg
@@ -219,6 +219,10 @@ dbau1500                     mips        mips        dbau1x00            -
 dbau1550                     mips        mips        dbau1x00            -              -           dbau1x00:DBAU1550
 dbau1550_el                  mips        mips        dbau1x00            -              -           dbau1x00:DBAU1550
 gth2                         mips        mips
+incaip                       mips        mips
+incaip_100MHz                mips        mips        incaip              -              -           incaip:CPU_CLOCK_RATE=100000000
+incaip_133MHz                mips        mips        incaip              -              -           incaip:CPU_CLOCK_RATE=133000000
+incaip_150MHz                mips        mips        incaip              -              -           incaip:CPU_CLOCK_RATE=150000000
 pb1000                       mips        mips        pb1x00              -              -           pb1x00:PB1000
 purple                       mips        mips
 qemu_mips                    mips        mips        qemu-mips           -              -           qemu-mips

diff --git a/include/configs/incaip.h b/include/configs/incaip.h
index b7ba6f4fbb54458e09db1e74282a57ff213457a4..f2950e8d5bc96603ff348bce09696f396af5bdf1 100644 (file)
--- a/include/configs/incaip.h
+++ b/include/configs/incaip.h
@@ -31,9 +31,12 @@
 #define CONFIG_MIPS32          1       /* MIPS 4Kc CPU core    */
 #define CONFIG_INCA_IP         1       /* on a INCA-IP Board   */
 
-#ifndef        CPU_CLOCK_RATE
-/* allowed values: 100000000, 133000000, and 150000000 */
-#define CPU_CLOCK_RATE 150000000       /* default: 150 MHz clock for the MIPS core */
+/*
+ * Clock for the MIPS core (MHz)
+ * allowed values: 100000000, 133000000, and 150000000 (default)
+ */
+#ifndef CONFIG_CPU_CLOCK_RATE
+#define CONFIG_CPU_CLOCK_RATE  150000000
 #endif
 
 #define INFINEON_EBU_BOOTCFG   0x40C4  /* CMULT = 8 */