arm: vf610: Add iomux support for DSPI

Add iomux definitions for DSPI second instance.

Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>

diff --git a/arch/arm/include/asm/arch-vf610/iomux-vf610.h b/arch/arm/include/asm/arch-vf610/iomux-vf610.h
index e22e3f94c489095950bb3d6b0302418d6f5e2774..b8b22b13089c55613293ea8c6881446ca66499ea 100644 (file)
--- a/arch/arm/include/asm/arch-vf610/iomux-vf610.h
+++ b/arch/arm/include/asm/arch-vf610/iomux-vf610.h
@@ -35,6 +35,11 @@
 #define VF610_GPIO_PAD_CTRL    (PAD_CTL_SPEED_MED | PAD_CTL_DSE_50ohm | \
                                PAD_CTL_PUS_47K_UP | PAD_CTL_IBE_ENABLE)
 
+#define VF610_DSPI_PAD_CTRL    (PAD_CTL_OBE_ENABLE | PAD_CTL_DSE_20ohm | \
+                               PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_HIGH)
+#define VF610_DSPI_SIN_PAD_CTRL        (PAD_CTL_IBE_ENABLE | PAD_CTL_DSE_20ohm | \
+                               PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_HIGH)
+
 enum {
        VF610_PAD_PTA6__RMII0_CLKIN             = IOMUX_PAD(0x0000, 0x0000, 2, __NA_, 0, VF610_ENET_PAD_CTRL),
        VF610_PAD_PTA6__RMII0_CLKOUT            = IOMUX_PAD(0x0000, 0x0000, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
@@ -91,6 +96,10 @@ enum {
        VF610_PAD_PTC15__RMII1_TD1              = IOMUX_PAD(0x00f0, 0x00f0, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
        VF610_PAD_PTC16__RMII1_TD0              = IOMUX_PAD(0x00f4, 0x00f4, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
        VF610_PAD_PTC17__RMII1_TXEN             = IOMUX_PAD(0x00f8, 0x00f8, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+       VF610_PAD_PTD5__DSPI1_CS0               = IOMUX_PAD(0x0150, 0x0150, 3, 0x300, 1, VF610_DSPI_PAD_CTRL),
+       VF610_PAD_PTD6__DSPI1_SIN               = IOMUX_PAD(0x0154, 0x0154, 3, 0x2fc, 1, VF610_DSPI_SIN_PAD_CTRL),
+       VF610_PAD_PTD7__DSPI1_SOUT              = IOMUX_PAD(0x0158, 0x0158, 3, __NA_, 0, VF610_DSPI_PAD_CTRL),
+       VF610_PAD_PTD8__DSPI1_SCK               = IOMUX_PAD(0x015c, 0x015c, 3, 0x2f8, 1, VF610_DSPI_PAD_CTRL),
        VF610_PAD_PTC29__GPIO_102               = IOMUX_PAD(0x0198, 0x0198, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
        VF610_PAD_PTC30__GPIO_103               = IOMUX_PAD(0x019c, 0x019c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
        VF610_PAD_PTA24__ESDHC1_CLK             = IOMUX_PAD(0x0038, 0x0038, 5, __NA_, 0, VF610_SDHC_PAD_CTRL),

diff --git a/board/toradex/colibri_vf/colibri_vf.c b/board/toradex/colibri_vf/colibri_vf.c
index e354c6d1d1d07d6ebca394aca51caa29b0699657..717302239515eb5f8de64b64e689b40f16a32b62 100644 (file)
--- a/board/toradex/colibri_vf/colibri_vf.c
+++ b/board/toradex/colibri_vf/colibri_vf.c
@@ -146,6 +146,20 @@ static void setup_iomux_nfc(void)
 }
 #endif
 
+#ifdef CONFIG_FSL_DSPI
+static void setup_iomux_dspi(void)
+{
+       static const iomux_v3_cfg_t dspi1_pads[] = {
+               VF610_PAD_PTD5__DSPI1_CS0,
+               VF610_PAD_PTD6__DSPI1_SIN,
+               VF610_PAD_PTD7__DSPI1_SOUT,
+               VF610_PAD_PTD8__DSPI1_SCK,
+       };
+
+       imx_iomux_v3_setup_multiple_pads(dspi1_pads, ARRAY_SIZE(dspi1_pads));
+}
+#endif
+
 #ifdef CONFIG_VYBRID_GPIO
 static void setup_iomux_gpio(void)
 {
@@ -252,6 +266,9 @@ static void clock_init(void)
 
        clrsetbits_le32(&ccm->ccgr0, CCM_REG_CTRL_MASK,
                        CCM_CCGR0_UART0_CTRL_MASK);
+#ifdef CONFIG_FSL_DSPI
+       setbits_le32(&ccm->ccgr0, CCM_CCGR0_DSPI1_CTRL_MASK);
+#endif
        clrsetbits_le32(&ccm->ccgr1, CCM_REG_CTRL_MASK,
                        CCM_CCGR1_PIT_CTRL_MASK | CCM_CCGR1_WDOGA5_CTRL_MASK);
        clrsetbits_le32(&ccm->ccgr2, CCM_REG_CTRL_MASK,
@@ -364,6 +381,10 @@ int board_early_init_f(void)
        setup_iomux_gpio();
 #endif
 
+#ifdef CONFIG_FSL_DSPI
+       setup_iomux_dspi();
+#endif
+
        return 0;
 }