ppc4xx: Make Sequoia boot vxWorks

vxWorks expects in
TLB 0 a entry for the Machine Check interrupt
TLB 1 a entry for the RAM
TLB 2 a entry for the EBC
TLB 3 a entry for the boot flash

After changing the baudrate to 9600 I had no problems to boot the
vxWorks image as distributed by WindRiver (Revision 2.0/1 from
June 18, 2007)

Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>

diff --git a/board/amcc/sequoia/init.S b/board/amcc/sequoia/init.S
index ff6ae669efb7bed64e0e5b55f51355ea1039d3f1..306c92c157ed8c3406e0c2bffc2b2cf7f3a5d990 100644 (file)
--- a/board/amcc/sequoia/init.S
+++ b/board/amcc/sequoia/init.S
@@ -39,15 +39,8 @@
 tlbtab:
        tlbtab_start
 
-       /*
-        * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
-        * speed up boot process. It is patched after relocation to enable SA_I
-        */
-#ifndef CONFIG_NAND_SPL
-       tlbentry( CFG_BOOT_BASE_ADDR, SZ_256M, CFG_BOOT_BASE_ADDR, 1, AC_R|AC_W|AC_X|SA_G )
-#else
-       tlbentry( CFG_NAND_BOOT_SPL_SRC, SZ_4K, CFG_NAND_BOOT_SPL_SRC, 1, AC_R|AC_W|AC_X|SA_G )
-#endif
+       /* vxWorks needs this as first entry for the Machine Check interrupt */
+       tlbentry( 0x40000000, SZ_256M, 0, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
 
        /* TLB-entry for DDR SDRAM (Up to 2GB) */
 #ifdef CONFIG_4xx_DCACHE
@@ -56,6 +49,18 @@ tlbtab:
        tlbentry( CFG_SDRAM_BASE, SZ_256M, CFG_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
 #endif
 
+       /* TLB-entry for EBC */
+       tlbentry( CFG_BCSR_BASE, SZ_256M, CFG_BCSR_BASE, 1, AC_R|AC_W|AC_X|SA_G|SA_I )
+
+       /* BOOT_CS (FLASH) must be forth. Before relocation SA_I can be off to use the
+        * speed up boot process. It is patched after relocation to enable SA_I
+        */
+#ifndef CONFIG_NAND_SPL
+       tlbentry( CFG_BOOT_BASE_ADDR, SZ_256M, CFG_BOOT_BASE_ADDR, 1, AC_R|AC_W|AC_X|SA_G )
+#else
+       tlbentry( CFG_NAND_BOOT_SPL_SRC, SZ_4K, CFG_NAND_BOOT_SPL_SRC, 1, AC_R|AC_W|AC_X|SA_G )
+#endif
+
 #ifdef CFG_INIT_RAM_DCACHE
        /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
        tlbentry( CFG_INIT_RAM_ADDR, SZ_64K, CFG_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G )
@@ -67,9 +72,6 @@ tlbtab:
        tlbentry( CFG_PCI_MEMBASE2, SZ_256M, CFG_PCI_MEMBASE2, 1, AC_R|AC_W|SA_G|SA_I )
        tlbentry( CFG_PCI_MEMBASE3, SZ_256M, CFG_PCI_MEMBASE3, 1, AC_R|AC_W|SA_G|SA_I )
 
-       /* TLB-entry for EBC */
-       tlbentry( CFG_BCSR_BASE, SZ_1K, CFG_BCSR_BASE, 1, AC_R|AC_W|AC_X|SA_G|SA_I )
-
        /* TLB-entry for NAND */
        tlbentry( CFG_NAND_ADDR, SZ_1K, CFG_NAND_ADDR, 1, AC_R|AC_W|AC_X|SA_G|SA_I )
 

diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h
index 8929134b5ffa547f98be55ddafe32272bae853ed..056c2889bfb26850f9fbf73c9beb6187cc88f5b7 100644 (file)
--- a/include/configs/sequoia.h
+++ b/include/configs/sequoia.h
@@ -61,6 +61,7 @@
 #define CFG_MONITOR_LEN                (384 * 1024)    /* Reserve 384 kB for Monitor   */
 #define CFG_MALLOC_LEN         (256 * 1024)    /* Reserve 256 kB for malloc()  */
 
+#define CFG_TLB_FOR_BOOT_FLASH 0x0003
 #define CFG_BOOT_BASE_ADDR     0xf0000000
 #define CFG_SDRAM_BASE         0x00000000      /* _must_ be 0          */
 #define CFG_FLASH_BASE         0xfc000000      /* start of FLASH       */